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OpenCloudOS-Kernel/drivers/clk/ti/clock.h

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clk: ti: add core support for initializing legacy clocks Legacy clock data for OMAP3 is being moved under clock driver, thus base support for this is needed. This patch adds basic definitions for clock init descriptors and core infrastructure for initialization, which will be called from the OMAP3 clock init. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Michael Turquette <mturquette@linaro.org>
2014-12-17 00:20:46 +08:00
/*
* TI Clock driver internal definitions
*
* Copyright (C) 2014 Texas Instruments, Inc
* Tero Kristo (t-kristo@ti.com)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation version 2.
*
* This program is distributed "as is" WITHOUT ANY WARRANTY of any
* kind, whether express or implied; without even the implied warranty
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __DRIVERS_CLK_TI_CLOCK__
#define __DRIVERS_CLK_TI_CLOCK__
clk: ti: divider: convert TI divider clock to use its own data representation Instead of using the generic clock driver data struct, use one internal for the TI clock driver itself. This allows modifying the register access parts in subsequent patch. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2017-02-09 20:45:45 +08:00
struct clk_omap_divider {
struct clk_hw hw;
clk: ti: convert to use proper register definition for all accesses Currently, TI clock driver uses an encapsulated struct that is cast into a void pointer to store all register addresses. This can be considered as rather nasty hackery, and prevents from expanding the register address field also. Instead, replace all the code to use proper struct in place for this, which contains all the previously used data. This patch is rather large as it is touching multiple files, but this can't be split up as we need to avoid any boot breakage. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2017-02-09 17:24:37 +08:00
struct clk_omap_reg reg;
clk: ti: divider: convert TI divider clock to use its own data representation Instead of using the generic clock driver data struct, use one internal for the TI clock driver itself. This allows modifying the register access parts in subsequent patch. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2017-02-09 20:45:45 +08:00
u8 shift;
u8 flags;
clk: ti: add support for clock latching to divider clocks Latching the clock settings is needed with certain clocks, where the setting is "cached" in HW before doing the actual re-programming of the clock source. This patch adds support for clock latching to the divider clock. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2018-02-15 15:49:27 +08:00
s8 latch;
clk: ti: divider: convert to use min,max,mask instead of width The existing width field used to check divider validity does not provide enough protection against bad values. For example, if max divider value is 4, the smallest all-1 bitmask that can hold this value is 7, which allows values higher than 4 to be used. This typically causes unpredictable results with hardware. So far this issue hasn't been noticed as most of the dividers actually have maximum values which fit the whole bitfield, but there are certain clocks for which this is a problem, like dpll4_m4 divider on omap3 devices. Thus, convert the whole validity logic to use min,max and mask values for determining if a specific divider is valid or not. This prevents the odd cases where bad value would otherwise be written to a divider config register. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Adam Ford <aford173@gmail.com>
2019-10-02 20:06:10 +08:00
u16 min;
u16 max;
u16 mask;
clk: ti: divider: convert TI divider clock to use its own data representation Instead of using the generic clock driver data struct, use one internal for the TI clock driver itself. This allows modifying the register access parts in subsequent patch. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2017-02-09 20:45:45 +08:00
const struct clk_div_table *table;
clk: ti: Add functions to save/restore clk context SoCs like AM43XX lose clock registers context during RTC-only suspend. Hence add functions to save/restore the clock registers context. Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Russ Dill <Russ.Dill@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
2018-09-04 14:49:37 +08:00
u32 context;
clk: ti: divider: convert TI divider clock to use its own data representation Instead of using the generic clock driver data struct, use one internal for the TI clock driver itself. This allows modifying the register access parts in subsequent patch. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2017-02-09 20:45:45 +08:00
};
#define to_clk_omap_divider(_hw) container_of(_hw, struct clk_omap_divider, hw)
clk: ti: mux: convert TI mux clock to use its internal data representation Instead of using the generic clock driver data struct, use one internal for the TI clock driver itself. This allows modifying the register access parts in subsequent patch. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2017-02-09 20:40:40 +08:00
struct clk_omap_mux {
struct clk_hw hw;
clk: ti: convert to use proper register definition for all accesses Currently, TI clock driver uses an encapsulated struct that is cast into a void pointer to store all register addresses. This can be considered as rather nasty hackery, and prevents from expanding the register address field also. Instead, replace all the code to use proper struct in place for this, which contains all the previously used data. This patch is rather large as it is touching multiple files, but this can't be split up as we need to avoid any boot breakage. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2017-02-09 17:24:37 +08:00
struct clk_omap_reg reg;
clk: ti: mux: convert TI mux clock to use its internal data representation Instead of using the generic clock driver data struct, use one internal for the TI clock driver itself. This allows modifying the register access parts in subsequent patch. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2017-02-09 20:40:40 +08:00
u32 *table;
u32 mask;
u8 shift;
clk: ti: add support for clock latching to mux clocks Latching the clock settings is needed with certain clocks, where the setting is "cached" in HW before doing the actual re-programming of the clock source. This patch adds support for clock latching to the mux clock. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2018-02-15 15:50:02 +08:00
s8 latch;
clk: ti: mux: convert TI mux clock to use its internal data representation Instead of using the generic clock driver data struct, use one internal for the TI clock driver itself. This allows modifying the register access parts in subsequent patch. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2017-02-09 20:40:40 +08:00
u8 flags;
clk: ti: Add functions to save/restore clk context SoCs like AM43XX lose clock registers context during RTC-only suspend. Hence add functions to save/restore the clock registers context. Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Russ Dill <Russ.Dill@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
2018-09-04 14:49:37 +08:00
u8 saved_parent;
clk: ti: mux: convert TI mux clock to use its internal data representation Instead of using the generic clock driver data struct, use one internal for the TI clock driver itself. This allows modifying the register access parts in subsequent patch. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2017-02-09 20:40:40 +08:00
};
#define to_clk_omap_mux(_hw) container_of(_hw, struct clk_omap_mux, hw)
clk: ti: add core support for initializing legacy clocks Legacy clock data for OMAP3 is being moved under clock driver, thus base support for this is needed. This patch adds basic definitions for clock init descriptors and core infrastructure for initialization, which will be called from the OMAP3 clock init. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Michael Turquette <mturquette@linaro.org>
2014-12-17 00:20:46 +08:00
enum {
TI_CLK_FIXED,
TI_CLK_MUX,
TI_CLK_DIVIDER,
TI_CLK_COMPOSITE,
TI_CLK_FIXED_FACTOR,
TI_CLK_GATE,
TI_CLK_DPLL,
};
/* Global flags */
#define CLKF_INDEX_POWER_OF_TWO (1 << 0)
#define CLKF_INDEX_STARTS_AT_ONE (1 << 1)
#define CLKF_SET_RATE_PARENT (1 << 2)
#define CLKF_OMAP3 (1 << 3)
#define CLKF_AM35XX (1 << 4)
/* Gate flags */
#define CLKF_SET_BIT_TO_DISABLE (1 << 5)
#define CLKF_INTERFACE (1 << 6)
#define CLKF_SSI (1 << 7)
#define CLKF_DSS (1 << 8)
#define CLKF_HSOTGUSB (1 << 9)
#define CLKF_WAIT (1 << 10)
#define CLKF_NO_WAIT (1 << 11)
#define CLKF_HSDIV (1 << 12)
#define CLKF_CLKDM (1 << 13)
/* DPLL flags */
#define CLKF_LOW_POWER_STOP (1 << 5)
#define CLKF_LOCK (1 << 6)
#define CLKF_LOW_POWER_BYPASS (1 << 7)
#define CLKF_PER (1 << 8)
#define CLKF_CORE (1 << 9)
#define CLKF_J_TYPE (1 << 10)
clk: ti: fix flag space conflict with clkctrl clocks The introduction of support for CLK_SET_RATE_PARENT flag for clkctrl clocks used a generic clock flag, which causes a conflict with the rest of the clkctrl flags, namely the NO_IDLEST flag. This can cause boot failures on certain platforms where this flag is introduced, by omitting the wait for the clockctrl module to be fully enabled before proceeding with rest of the code. Fix this by moving all the clkctrl specific flags to their own bit-range. Signed-off-by: Tero Kristo <t-kristo@ti.com> Fixes: 49159a9dc3da ("clk: ti: add support for CLK_SET_RATE_PARENT flag") Reported-by: Christophe Lyon <christophe.lyon@linaro.org> Tested-by: Tony Lindgren <tony@atomide.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-03-28 01:47:04 +08:00
/* CLKCTRL flags */
#define CLKF_SW_SUP BIT(5)
#define CLKF_HW_SUP BIT(6)
#define CLKF_NO_IDLEST BIT(7)
clk: ti: dra7: disable the RNG and TIMER12 clkctrl clocks on HS devices RNG and TIMER12 are reserved for secure side usage only on HS devices, so disable their clkctrl clocks on HS SoCs also. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-04-04 16:11:05 +08:00
#define CLKF_SOC_MASK GENMASK(11, 8)
clk: ti: dra7x: prevent non-existing clkctrl clocks from registering Certain clkctrl clocks (like the USB_OTG_SS4) do not exist on some variants of the dra7x SoC. Append a flag for these clocks and skip the registration in cases where the clocks do not exist. Reported-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-04-04 16:11:04 +08:00
clk: ti: dra7: disable the RNG and TIMER12 clkctrl clocks on HS devices RNG and TIMER12 are reserved for secure side usage only on HS devices, so disable their clkctrl clocks on HS SoCs also. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-04-04 16:11:05 +08:00
#define CLKF_SOC_NONSEC BIT(8)
#define CLKF_SOC_DRA72 BIT(9)
#define CLKF_SOC_DRA74 BIT(10)
#define CLKF_SOC_DRA76 BIT(11)
clk: ti: dra7x: prevent non-existing clkctrl clocks from registering Certain clkctrl clocks (like the USB_OTG_SS4) do not exist on some variants of the dra7x SoC. Append a flag for these clocks and skip the registration in cases where the clocks do not exist. Reported-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-04-04 16:11:04 +08:00
clk: ti: add core support for initializing legacy clocks Legacy clock data for OMAP3 is being moved under clock driver, thus base support for this is needed. This patch adds basic definitions for clock init descriptors and core infrastructure for initialization, which will be called from the OMAP3 clock init. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Michael Turquette <mturquette@linaro.org>
2014-12-17 00:20:46 +08:00
#define CLK(dev, con, ck) \
{ \
.lk = { \
.dev_id = dev, \
.con_id = con, \
}, \
.clk = ck, \
}
struct ti_clk {
const char *name;
const char *clkdm_name;
int type;
void *data;
struct ti_clk *patch;
struct clk *clk;
};
struct ti_clk_mux {
u8 bit_shift;
int num_parents;
u16 reg;
u8 module;
clk: ti: enforce const types on string arrays Constant string arrays should use const char * const instead of just const char *. Change the implementations using these to proper type. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2016-10-05 20:37:02 +08:00
const char * const *parents;
clk: ti: add core support for initializing legacy clocks Legacy clock data for OMAP3 is being moved under clock driver, thus base support for this is needed. This patch adds basic definitions for clock init descriptors and core infrastructure for initialization, which will be called from the OMAP3 clock init. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Michael Turquette <mturquette@linaro.org>
2014-12-17 00:20:46 +08:00
u16 flags;
};
struct ti_clk_divider {
const char *parent;
u8 bit_shift;
u16 max_div;
u16 reg;
u8 module;
int *dividers;
int num_dividers;
u16 flags;
};
struct ti_clk_gate {
const char *parent;
u8 bit_shift;
u16 reg;
u8 module;
u16 flags;
};
clk: ti: move some public definitions to private header Several exported TI clock driver features are no longer needed outside the clock driver itself, thus move all of these to the driver private header file. Also, update some of the driver files to actually include this header. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2015-03-05 03:02:05 +08:00
/* Composite clock component types */
enum {
CLK_COMPONENT_TYPE_GATE = 0,
CLK_COMPONENT_TYPE_DIVIDER,
CLK_COMPONENT_TYPE_MUX,
CLK_COMPONENT_TYPE_MAX,
};
/**
* struct ti_dt_clk - OMAP DT clock alias declarations
* @lk: clock lookup definition
* @node_name: clock DT node to map to
*/
struct ti_dt_clk {
struct clk_lookup lk;
char *node_name;
};
#define DT_CLK(dev, con, name) \
{ \
.lk = { \
.dev_id = dev, \
.con_id = con, \
}, \
.node_name = name, \
}
clk: ti: add support for clkctrl clocks Previously, hwmod core has been used for controlling the hwmod level clocks directly. This has certain drawbacks, like being unable to share the clocks for multiple users, missing usecounting and generally being totally incompatible with the common clock framework. This patch adds support for clkctrl clocks for addressing the above issues. These support the modulemode handling, which will replace the direct hwmod clkctrl linkage. Any optional clocks are also supported, gate, mux and divider. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2017-02-09 17:27:11 +08:00
/* CLKCTRL type definitions */
struct omap_clkctrl_div_data {
const int *dividers;
int max_div;
clk: ti: clkctrl: fix flags for mux and divider opt clocks Flag handling was missing for these two, so add it. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2017-10-11 22:56:10 +08:00
u32 flags;
clk: ti: add support for clkctrl clocks Previously, hwmod core has been used for controlling the hwmod level clocks directly. This has certain drawbacks, like being unable to share the clocks for multiple users, missing usecounting and generally being totally incompatible with the common clock framework. This patch adds support for clkctrl clocks for addressing the above issues. These support the modulemode handling, which will replace the direct hwmod clkctrl linkage. Any optional clocks are also supported, gate, mux and divider. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2017-02-09 17:27:11 +08:00
};
struct omap_clkctrl_bit_data {
u8 bit;
u8 type;
const char * const *parents;
const void *data;
};
struct omap_clkctrl_reg_data {
u16 offset;
const struct omap_clkctrl_bit_data *bit_data;
u16 flags;
const char *parent;
clk: ti: clkctrl: add support for clkdm init for clkctrl clocks Clkctrl clocks now support clockdomain init also. This will be needed so that hwmod core can drop the support for clockdomain handling. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2017-09-19 02:02:24 +08:00
const char *clkdm_name;
clk: ti: add support for clkctrl clocks Previously, hwmod core has been used for controlling the hwmod level clocks directly. This has certain drawbacks, like being unable to share the clocks for multiple users, missing usecounting and generally being totally incompatible with the common clock framework. This patch adds support for clkctrl clocks for addressing the above issues. These support the modulemode handling, which will replace the direct hwmod clkctrl linkage. Any optional clocks are also supported, gate, mux and divider. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2017-02-09 17:27:11 +08:00
};
struct omap_clkctrl_data {
u32 addr;
const struct omap_clkctrl_reg_data *regs;
};
clk: ti: omap4: add clkctrl clock data Add data for omap4 clkctrl clocks, and register it within the clkctrl driver. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2017-02-09 17:34:23 +08:00
extern const struct omap_clkctrl_data omap4_clkctrl_data[];
clk: ti: omap5: add clkctrl clock data Add data for omap5 clkctrl clocks, and register it within the clkctrl driver. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2017-07-31 17:16:24 +08:00
extern const struct omap_clkctrl_data omap5_clkctrl_data[];
clk: ti: dra7: add new clkctrl data The new clkctrl data layout for dra7xx is split based on clockdomain boundaries. Previously the split was based on CM boundaries. This patch adds the new data as separate data entity, retaining the compatibility data also for now. The compatibility data can be removed once no longer needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Tony Lindgren <tony@atomide.com>
2018-08-13 19:30:49 +08:00
extern const struct omap_clkctrl_data dra7_clkctrl_data[];
clk: ti: dra7xx: rename existing clkctrl data as compat data Rename the existing clkctrl data in preparation of upcoming clkdm based split for it. Once the DT data has transitioned also, the compat data can be removed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Tony Lindgren <tony@atomide.com>
2018-08-13 16:11:33 +08:00
extern const struct omap_clkctrl_data dra7_clkctrl_compat_data[];
extern struct ti_dt_clk dra7xx_compat_clks[];
clk: ti: am33xx: add new clkctrl data for am33xx The new clkctrl data layout for am33xx is split based on clockdomain boundaries. Previously the split was based on CM boundaries. This patch adds the new data as separate data entity, retaining the compatibility data also for now. The compatibility data can be removed once no longer needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Tony Lindgren <tony@atomide.com>
2018-08-10 23:35:03 +08:00
extern const struct omap_clkctrl_data am3_clkctrl_data[];
clk: ti: am33xx: rename existing clkctrl data as compat data Rename the existing clkctrl data in preparation of upcoming clkdm based split for it. Once the DT data has transitioned also, the compat data can be removed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Tony Lindgren <tony@atomide.com>
2018-08-10 23:22:02 +08:00
extern const struct omap_clkctrl_data am3_clkctrl_compat_data[];
extern struct ti_dt_clk am33xx_compat_clks[];
clk: ti: am43xx: add new clkctrl data for am43xx The new clkctrl data layout for am43xx is split based on clockdomain boundaries. Previously the split was based on CM boundaries. This patch adds the new data as separate data entity, retaining the compatibility data also for now. The compatibility data can be removed once no longer needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Tony Lindgren <tony@atomide.com>
2018-08-13 15:48:52 +08:00
extern const struct omap_clkctrl_data am4_clkctrl_data[];
clk: ti: am43xx: rename existing clkctrl data as compat data Rename the existing clkctrl data in preparation of upcoming clkdm based split for it. Once the DT data has transitioned also, the compat data can be removed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Tony Lindgren <tony@atomide.com>
2018-08-13 15:38:40 +08:00
extern const struct omap_clkctrl_data am4_clkctrl_compat_data[];
extern struct ti_dt_clk am43xx_compat_clks[];
clk: ti: am43xx: add new clkctrl data for am43xx The new clkctrl data layout for am43xx is split based on clockdomain boundaries. Previously the split was based on CM boundaries. This patch adds the new data as separate data entity, retaining the compatibility data also for now. The compatibility data can be removed once no longer needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Tony Lindgren <tony@atomide.com>
2018-08-13 15:48:52 +08:00
extern const struct omap_clkctrl_data am438x_clkctrl_data[];
clk: ti: am43xx: rename existing clkctrl data as compat data Rename the existing clkctrl data in preparation of upcoming clkdm based split for it. Once the DT data has transitioned also, the compat data can be removed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Tony Lindgren <tony@atomide.com>
2018-08-13 15:38:40 +08:00
extern const struct omap_clkctrl_data am438x_clkctrl_compat_data[];
clk: ti: dm814: add clkctrl clock data Add data for dm814 clkctrl clocks, and register it within the clkctrl driver. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2017-08-24 20:41:37 +08:00
extern const struct omap_clkctrl_data dm814_clkctrl_data[];
clk: ti: dm816: add clkctrl clock data Add data for dm816 clkctrl clocks, and register it within the clkctrl driver. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2017-08-24 20:44:14 +08:00
extern const struct omap_clkctrl_data dm816_clkctrl_data[];
clk: ti: omap4: add clkctrl clock data Add data for omap4 clkctrl clocks, and register it within the clkctrl driver. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2017-02-09 17:34:23 +08:00
clk: ti: convert retry_init param to use void data type User data should be void type, as the core framework doesn't need to know what is passed through. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Stephen Boyd <sboyd@codeaurora.org>
2017-11-06 15:43:16 +08:00
typedef void (*ti_of_clk_init_cb_t)(void *, struct device_node *);
clk: ti: move some public definitions to private header Several exported TI clock driver features are no longer needed outside the clock driver itself, thus move all of these to the driver private header file. Also, update some of the driver files to actually include this header. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2015-03-05 03:02:05 +08:00
clk: ti: add support for automatic clock alias generation Large portions of the OMAP framework still depend on the support of having clock aliases in place, so add support functions for generating these automatically. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2016-09-29 17:00:57 +08:00
struct clk *ti_clk_register(struct device *dev, struct clk_hw *hw,
const char *con);
clk: ti: generalize the init sequence of clk_hw_omap clocks Add a generic API for initializing clocks of clk_hw_omap type clocks, and convert the whole TI clock driver suite to use this for registering the clocks. Also, get rid of the now redundant API for adding the clocks to the OMAP HW clocks list; instead this is used directly from the register API. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Tested-by: Keerthy <j-keerthy@ti.com>
2019-01-15 17:15:15 +08:00
struct clk *ti_clk_register_omap_hw(struct device *dev, struct clk_hw *hw,
const char *con);
clk: ti: add support for automatic clock alias generation Large portions of the OMAP framework still depend on the support of having clock aliases in place, so add support functions for generating these automatically. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2016-09-29 17:00:57 +08:00
int ti_clk_add_alias(struct device *dev, struct clk *clk, const char *con);
clk: ti: add API for creating aliases automatically for simple clock types This API generates clock aliases automatically for simple clock types (fixed-clock, fixed-factor-clock), so that we don't need to add the data for these statically into tables. Shall be called from the SoC specific clock init. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2016-09-29 17:05:00 +08:00
void ti_clk_add_aliases(void);
clk: ti: mux: add support for legacy mux init Legacy clock data is initialized slightly differently compared to DT clocks, thus add support for this. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Michael Turquette <mturquette@linaro.org>
2014-12-17 00:20:47 +08:00
clk: ti: add generic support for clock latching Certain clocks require latching to be done, so that the actual settings get updated on the HW that generates the clock signal. One example of such a clock is the dra76x GMAC DPLL H14 output, which requires its divider settings to be latched when updated. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2017-07-26 21:47:28 +08:00
void ti_clk_latch(struct clk_omap_reg *reg, s8 shift);
clk: ti: mux: add support for legacy mux init Legacy clock data is initialized slightly differently compared to DT clocks, thus add support for this. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Michael Turquette <mturquette@linaro.org>
2014-12-17 00:20:47 +08:00
struct clk_hw *ti_clk_build_component_mux(struct ti_clk_mux *setup);
clk: ti: divider: add driver internal API for parsing divider data This can be used from the divider itself, and also from the clkctrl clocks once this is introduced. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2017-02-09 20:46:53 +08:00
int ti_clk_parse_divider_data(int *div_table, int num_dividers, int max_div,
clk: ti: divider: cleanup ti_clk_parse_divider_data API Cleanup the ti_clk_parse_divider_data to pass the divider data struct directly instead of individual values of it. This makes it easier to modify the implementation later on. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Adam Ford <aford173@gmail.com>
2019-10-02 20:06:09 +08:00
u8 flags, struct clk_omap_divider *div);
clk: ti: divider: add driver internal API for parsing divider data This can be used from the divider itself, and also from the clkctrl clocks once this is introduced. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2017-02-09 20:46:53 +08:00
clk: ti: convert to use proper register definition for all accesses Currently, TI clock driver uses an encapsulated struct that is cast into a void pointer to store all register addresses. This can be considered as rather nasty hackery, and prevents from expanding the register address field also. Instead, replace all the code to use proper struct in place for this, which contains all the previously used data. This patch is rather large as it is touching multiple files, but this can't be split up as we need to avoid any boot breakage. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2017-02-09 17:24:37 +08:00
int ti_clk_get_reg_addr(struct device_node *node, int index,
struct clk_omap_reg *reg);
clk: ti: move some public definitions to private header Several exported TI clock driver features are no longer needed outside the clock driver itself, thus move all of these to the driver private header file. Also, update some of the driver files to actually include this header. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2015-03-05 03:02:05 +08:00
void ti_dt_clocks_register(struct ti_dt_clk *oclks);
clk: ti: convert retry_init param to use void data type User data should be void type, as the core framework doesn't need to know what is passed through. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Stephen Boyd <sboyd@codeaurora.org>
2017-11-06 15:43:16 +08:00
int ti_clk_retry_init(struct device_node *node, void *user,
clk: ti: move some public definitions to private header Several exported TI clock driver features are no longer needed outside the clock driver itself, thus move all of these to the driver private header file. Also, update some of the driver files to actually include this header. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2015-03-05 03:02:05 +08:00
ti_of_clk_init_cb_t func);
int ti_clk_add_component(struct device_node *node, struct clk_hw *hw, int type);
clk: ti: autoidle: move generic autoidle handling code to clock driver This is no longer needed in platform directory, as the legacy clock data is gone, so move it under TI clock driver. Some static functions are renamed also. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2015-03-03 01:06:54 +08:00
int of_ti_clk_autoidle_setup(struct device_node *node);
clk: ti: move omap2_clk_enable_init_clocks under clock driver This is no longer used outside clock driver, so move it under the driver and remove the export for it from the global header file. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2015-03-03 16:51:01 +08:00
void omap2_clk_enable_init_clocks(const char **clk_names, u8 num_clocks);
clk: ti: autoidle: move generic autoidle handling code to clock driver This is no longer needed in platform directory, as the legacy clock data is gone, so move it under TI clock driver. Some static functions are renamed also. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2015-03-03 01:06:54 +08:00
clk: ti: dpll: move omap3 DPLL functionality to clock driver With the legacy clock support gone, OMAP3 generic DPLL code can now be moved over to the clock driver also. A few un-unused clkoutx2 functions are also removed at the same time. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2015-03-03 19:27:48 +08:00
extern const struct clk_hw_omap_ops clkhwops_omap3_dpll;
clk: ti: move OMAP4+ DPLL implementation under drivers/clk With the legacy clock support gone, the OMAP4 specific DPLL implementations can be moved under the clock driver. Change some of the function prototypes to be static at the same time, and remove some exports from the global TI clock driver header. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2015-03-02 17:07:35 +08:00
extern const struct clk_hw_omap_ops clkhwops_omap4_dpllmx;
clk: ti: dflt: move support for default gate clock to clock driver With the legacy support gone, OMAP2+ default gate clock can be moved under clock driver. Create a new file for the purpose, and clean-up the header exports a bit as some clock APIs are no longer needed outside clock driver itself. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2015-03-03 21:28:53 +08:00
extern const struct clk_hw_omap_ops clkhwops_wait;
clk: ti: move interface clock implementation under drivers/clk With the legacy clock support gone, the OMAP interface clock implementation can be moved under the clock driver. Some temporary header file tweaks are also needed to make this change work properly. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2015-03-02 20:33:54 +08:00
extern const struct clk_hw_omap_ops clkhwops_iclk;
extern const struct clk_hw_omap_ops clkhwops_iclk_wait;
clk: ti: omap2430: move clock support code under clock driver With the legacy clock support gone, this is no longer needed under platform code-base. Thus, move this under the TI clock driver, and remove the exported API from the public header. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2015-03-03 22:08:42 +08:00
extern const struct clk_hw_omap_ops clkhwops_omap2430_i2chs_wait;
clk: ti: omap34xx: move omap34xx clock type support code to clock driver With the legacy clock data gone, this is no longer needed under platform, so move it under the clock driver itself. Remove unnecessary declarations from the TI clock header also. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2015-03-03 23:28:12 +08:00
extern const struct clk_hw_omap_ops clkhwops_omap3430es2_dss_usbhost_wait;
extern const struct clk_hw_omap_ops clkhwops_omap3430es2_iclk_hsotgusb_wait;
extern const struct clk_hw_omap_ops clkhwops_omap3430es2_iclk_dss_usbhost_wait;
extern const struct clk_hw_omap_ops clkhwops_omap3430es2_iclk_ssi_wait;
clk: ti: am3517: move remaining am3517 clock support code to clock driver With legacy clock support gone, this is no longer needed under platform, so move it under the clock driver itself. Make some exports be driver internal definitions at the same time. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2015-03-04 03:19:25 +08:00
extern const struct clk_hw_omap_ops clkhwops_am35xx_ipss_module_wait;
extern const struct clk_hw_omap_ops clkhwops_am35xx_ipss_wait;
clk: ti: move OMAP4+ DPLL implementation under drivers/clk With the legacy clock support gone, the OMAP4 specific DPLL implementations can be moved under the clock driver. Change some of the function prototypes to be static at the same time, and remove some exports from the global TI clock driver header. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2015-03-02 17:07:35 +08:00
clk: ti: move some public definitions to private header Several exported TI clock driver features are no longer needed outside the clock driver itself, thus move all of these to the driver private header file. Also, update some of the driver files to actually include this header. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2015-03-05 03:02:05 +08:00
extern const struct clk_ops ti_clk_divider_ops;
extern const struct clk_ops ti_clk_mux_ops;
clk: ti: gate: export gate_clk_ops locally These are going to be used by the clkctrl support that will be introduced later. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2017-02-09 17:10:19 +08:00
extern const struct clk_ops omap_gate_clk_ops;
clk: ti: move some public definitions to private header Several exported TI clock driver features are no longer needed outside the clock driver itself, thus move all of these to the driver private header file. Also, update some of the driver files to actually include this header. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2015-03-05 03:02:05 +08:00
clk: ti: clkctrl: support multiple clkctrl nodes under a cm node Currently, only one clkctrl node can be added under a specific CM node due to limitation with the implementation. Modify the code to pick-up clockdomain name from the clkctrl node instead of CM node if provided. Also, add a new flag to the TI clock driver so that both modes can be supported simultaneously. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Tony Lindgren <tony@atomide.com>
2018-08-10 16:29:09 +08:00
extern struct ti_clk_features ti_clk_features;
clk: let init callback return an error code If the init callback is allowed to request resources, it needs a return value to report the outcome of such a request. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lkml.kernel.org/r/20190924123954.31561-3-jbrunet@baylibre.com Reviewed-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-09-24 20:39:53 +08:00
int omap2_init_clk_clkdm(struct clk_hw *hw);
clk: ti: clkdm: move clkdm gate clock support code to clock driver With the legacy clock data gone, this is no longer needed under platform, so move it under the clock driver itself. Remove the exported clock driver APIs as well, as these are not needed outside clock driver anymore. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2015-03-03 22:22:50 +08:00
int omap2_clkops_enable_clkdm(struct clk_hw *hw);
void omap2_clkops_disable_clkdm(struct clk_hw *hw);
clk: ti: dflt: move support for default gate clock to clock driver With the legacy support gone, OMAP2+ default gate clock can be moved under clock driver. Create a new file for the purpose, and clean-up the header exports a bit as some clock APIs are no longer needed outside clock driver itself. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2015-03-03 21:28:53 +08:00
int omap2_dflt_clk_enable(struct clk_hw *hw);
void omap2_dflt_clk_disable(struct clk_hw *hw);
int omap2_dflt_clk_is_enabled(struct clk_hw *hw);
clk: ti: move some public definitions to private header Several exported TI clock driver features are no longer needed outside the clock driver itself, thus move all of these to the driver private header file. Also, update some of the driver files to actually include this header. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2015-03-05 03:02:05 +08:00
void omap2_clk_dflt_find_companion(struct clk_hw_omap *clk,
clk: ti: convert to use proper register definition for all accesses Currently, TI clock driver uses an encapsulated struct that is cast into a void pointer to store all register addresses. This can be considered as rather nasty hackery, and prevents from expanding the register address field also. Instead, replace all the code to use proper struct in place for this, which contains all the previously used data. This patch is rather large as it is touching multiple files, but this can't be split up as we need to avoid any boot breakage. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2017-02-09 17:24:37 +08:00
struct clk_omap_reg *other_reg,
clk: ti: move some public definitions to private header Several exported TI clock driver features are no longer needed outside the clock driver itself, thus move all of these to the driver private header file. Also, update some of the driver files to actually include this header. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2015-03-05 03:02:05 +08:00
u8 *other_bit);
void omap2_clk_dflt_find_idlest(struct clk_hw_omap *clk,
clk: ti: convert to use proper register definition for all accesses Currently, TI clock driver uses an encapsulated struct that is cast into a void pointer to store all register addresses. This can be considered as rather nasty hackery, and prevents from expanding the register address field also. Instead, replace all the code to use proper struct in place for this, which contains all the previously used data. This patch is rather large as it is touching multiple files, but this can't be split up as we need to avoid any boot breakage. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2017-02-09 17:24:37 +08:00
struct clk_omap_reg *idlest_reg,
clk: ti: move some public definitions to private header Several exported TI clock driver features are no longer needed outside the clock driver itself, thus move all of these to the driver private header file. Also, update some of the driver files to actually include this header. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2015-03-05 03:02:05 +08:00
u8 *idlest_bit, u8 *idlest_val);
void omap2_clkt_iclk_allow_idle(struct clk_hw_omap *clk);
void omap2_clkt_iclk_deny_idle(struct clk_hw_omap *clk);
clk: ti: dflt: move support for default gate clock to clock driver With the legacy support gone, OMAP2+ default gate clock can be moved under clock driver. Create a new file for the purpose, and clean-up the header exports a bit as some clock APIs are no longer needed outside clock driver itself. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2015-03-03 21:28:53 +08:00
clk: ti: move generic OMAP DPLL implementation under drivers/clk With the legacy clock data now gone, we can start moving OMAP clock type implementations under clock driver. Start this with moving the generic OMAP DPLL clock type under TI clock driver. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2015-03-02 15:57:28 +08:00
u8 omap2_init_dpll_parent(struct clk_hw *hw);
clk: ti: dpll: move omap3 DPLL functionality to clock driver With the legacy clock support gone, OMAP3 generic DPLL code can now be moved over to the clock driver also. A few un-unused clkoutx2 functions are also removed at the same time. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2015-03-03 19:27:48 +08:00
int omap3_noncore_dpll_enable(struct clk_hw *hw);
void omap3_noncore_dpll_disable(struct clk_hw *hw);
int omap3_noncore_dpll_set_parent(struct clk_hw *hw, u8 index);
int omap3_noncore_dpll_set_rate(struct clk_hw *hw, unsigned long rate,
unsigned long parent_rate);
int omap3_noncore_dpll_set_rate_and_parent(struct clk_hw *hw,
unsigned long rate,
unsigned long parent_rate,
u8 index);
Merge branch 'for-4.2/ti-clk-move' of https://github.com/t-kristo/linux-pm into clk-next From Tero Kristo: "This pull request contains the TI clock driver set to move the clock implementations under clock driver. Some small portions of the clock driver code still remain under mach-omap2 after this, it should be decided whether this code is now obsolete and should be deleted or should someone try to fix it." Slight merge conflicts with determine_rate prototype changes.
2015-07-29 02:58:26 +08:00
int omap3_noncore_dpll_determine_rate(struct clk_hw *hw,
struct clk_rate_request *req);
clk: ti: dpll: move omap3 DPLL functionality to clock driver With the legacy clock support gone, OMAP3 generic DPLL code can now be moved over to the clock driver also. A few un-unused clkoutx2 functions are also removed at the same time. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2015-03-03 19:27:48 +08:00
long omap2_dpll_round_rate(struct clk_hw *hw, unsigned long target_rate,
unsigned long *parent_rate);
unsigned long omap3_clkoutx2_recalc(struct clk_hw *hw,
unsigned long parent_rate);
clk: ti: omap36xx: Work around sprz319 advisory 2.1 The OMAP36xx DPLL5, driving EHCI USB, can be subject to a long-term frequency drift. The frequency drift magnitude depends on the VCO update rate, which is inversely proportional to the PLL divider. The kernel DPLL configuration code results in a high value for the divider, leading to a long term drift high enough to cause USB transmission errors. In the worst case the USB PHY's ULPI interface can stop responding, breaking USB operation completely. This manifests itself on the Beagleboard xM by the LAN9514 reporting 'Cannot enable port 2. Maybe the cable is bad?' in the kernel log. Errata sprz319 advisory 2.1 documents PLL values that minimize the drift. Use them automatically when DPLL5 is used for USB operation, which we detect based on the requested clock rate. The clock framework will still compute the PLL parameters and resulting rate as usual, but the PLL M and N values will then be overridden. This can result in the effective clock rate being slightly different than the rate cached by the clock framework, but won't cause any adverse effect to USB operation. Signed-off-by: Richard Watts <rrw@kynesim.co.uk> [Upported from v3.2 to v4.9] Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Tested-by: Ladislav Michl <ladis@linux-mips.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-12-03 05:14:38 +08:00
/*
* OMAP3_DPLL5_FREQ_FOR_USBHOST: USBHOST and USBTLL are the only clocks
* that are sourced by DPLL5, and both of these require this clock
* to be at 120 MHz for proper operation.
*/
#define OMAP3_DPLL5_FREQ_FOR_USBHOST 120000000
clk: ti: dpll: move omap3 DPLL functionality to clock driver With the legacy clock support gone, OMAP3 generic DPLL code can now be moved over to the clock driver also. A few un-unused clkoutx2 functions are also removed at the same time. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2015-03-03 19:27:48 +08:00
unsigned long omap3_dpll_recalc(struct clk_hw *hw, unsigned long parent_rate);
int omap3_dpll4_set_rate(struct clk_hw *clk, unsigned long rate,
unsigned long parent_rate);
int omap3_dpll4_set_rate_and_parent(struct clk_hw *hw, unsigned long rate,
unsigned long parent_rate, u8 index);
clk: ti: omap36xx: Work around sprz319 advisory 2.1 The OMAP36xx DPLL5, driving EHCI USB, can be subject to a long-term frequency drift. The frequency drift magnitude depends on the VCO update rate, which is inversely proportional to the PLL divider. The kernel DPLL configuration code results in a high value for the divider, leading to a long term drift high enough to cause USB transmission errors. In the worst case the USB PHY's ULPI interface can stop responding, breaking USB operation completely. This manifests itself on the Beagleboard xM by the LAN9514 reporting 'Cannot enable port 2. Maybe the cable is bad?' in the kernel log. Errata sprz319 advisory 2.1 documents PLL values that minimize the drift. Use them automatically when DPLL5 is used for USB operation, which we detect based on the requested clock rate. The clock framework will still compute the PLL parameters and resulting rate as usual, but the PLL M and N values will then be overridden. This can result in the effective clock rate being slightly different than the rate cached by the clock framework, but won't cause any adverse effect to USB operation. Signed-off-by: Richard Watts <rrw@kynesim.co.uk> [Upported from v3.2 to v4.9] Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Tested-by: Ladislav Michl <ladis@linux-mips.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-12-03 05:14:38 +08:00
int omap3_dpll5_set_rate(struct clk_hw *hw, unsigned long rate,
unsigned long parent_rate);
clk: ti: dpll: move omap3 DPLL functionality to clock driver With the legacy clock support gone, OMAP3 generic DPLL code can now be moved over to the clock driver also. A few un-unused clkoutx2 functions are also removed at the same time. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2015-03-03 19:27:48 +08:00
void omap3_clk_lock_dpll5(void);
clk: ti: move generic OMAP DPLL implementation under drivers/clk With the legacy clock data now gone, we can start moving OMAP clock type implementations under clock driver. Start this with moving the generic OMAP DPLL clock type under TI clock driver. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2015-03-02 15:57:28 +08:00
clk: ti: move OMAP4+ DPLL implementation under drivers/clk With the legacy clock support gone, the OMAP4 specific DPLL implementations can be moved under the clock driver. Change some of the function prototypes to be static at the same time, and remove some exports from the global TI clock driver header. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2015-03-02 17:07:35 +08:00
unsigned long omap4_dpll_regm4xen_recalc(struct clk_hw *hw,
unsigned long parent_rate);
long omap4_dpll_regm4xen_round_rate(struct clk_hw *hw,
unsigned long target_rate,
unsigned long *parent_rate);
Merge branch 'for-4.2/ti-clk-move' of https://github.com/t-kristo/linux-pm into clk-next From Tero Kristo: "This pull request contains the TI clock driver set to move the clock implementations under clock driver. Some small portions of the clock driver code still remain under mach-omap2 after this, it should be decided whether this code is now obsolete and should be deleted or should someone try to fix it." Slight merge conflicts with determine_rate prototype changes.
2015-07-29 02:58:26 +08:00
int omap4_dpll_regm4xen_determine_rate(struct clk_hw *hw,
struct clk_rate_request *req);
clk: ti: move clk_hw_omap list handling under generic part of the driver Currently the clk_hw_omap list is handled under the autoidle code, but it should be accessible generically. Add a few APIs towards this, and update the autoidle code to use the generic implementations. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Tested-by: Keerthy <j-keerthy@ti.com>
2019-01-15 17:15:12 +08:00
int omap2_clk_for_each(int (*fn)(struct clk_hw_omap *hw));
clk: ti: move OMAP4+ DPLL implementation under drivers/clk With the legacy clock support gone, the OMAP4 specific DPLL implementations can be moved under the clock driver. Change some of the function prototypes to be static at the same time, and remove some exports from the global TI clock driver header. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2015-03-02 17:07:35 +08:00
clk: ti: remove exported ll_ops struct, instead add an API for registration We should avoid exporting data from drivers, instead use an API for registering the clock low level operations. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2015-04-28 02:55:42 +08:00
extern struct ti_clk_ll_ops *ti_clk_ll_ops;
clk: ti: add core support for initializing legacy clocks Legacy clock data for OMAP3 is being moved under clock driver, thus base support for this is needed. This patch adds basic definitions for clock init descriptors and core infrastructure for initialization, which will be called from the OMAP3 clock init. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Michael Turquette <mturquette@linaro.org>
2014-12-17 00:20:46 +08:00
#endif