2010-08-19 19:06:32 +08:00
|
|
|
/*
|
|
|
|
* Copyright (C) ST-Ericsson SA 2010
|
|
|
|
*
|
|
|
|
* Author: Hanumath Prasad <hanumath.prasad@stericsson.com>
|
|
|
|
* License terms: GNU General Public License (GPL) version 2
|
|
|
|
*/
|
|
|
|
|
|
|
|
#include <linux/kernel.h>
|
|
|
|
#include <linux/gpio.h>
|
|
|
|
#include <linux/amba/bus.h>
|
|
|
|
#include <linux/amba/mmci.h>
|
|
|
|
#include <linux/mmc/host.h>
|
|
|
|
#include <linux/platform_device.h>
|
2012-10-18 20:20:16 +08:00
|
|
|
#include <linux/platform_data/dma-ste-dma40.h>
|
2010-08-19 19:06:32 +08:00
|
|
|
|
2011-02-15 22:01:35 +08:00
|
|
|
#include <asm/mach-types.h>
|
2013-03-22 05:51:12 +08:00
|
|
|
#include "devices.h"
|
2010-08-19 19:06:32 +08:00
|
|
|
|
2013-03-19 22:41:55 +08:00
|
|
|
#include "db8500-regs.h"
|
2010-09-29 22:16:32 +08:00
|
|
|
#include "devices-db8500.h"
|
2010-08-19 19:06:32 +08:00
|
|
|
#include "board-mop500.h"
|
2010-10-14 19:57:59 +08:00
|
|
|
#include "ste-dma40-db8500.h"
|
2010-08-19 19:06:32 +08:00
|
|
|
|
2011-12-15 20:38:40 +08:00
|
|
|
/*
|
|
|
|
* v2 has a new version of this block that need to be forced, the number found
|
|
|
|
* in hardware is incorrect
|
|
|
|
*/
|
|
|
|
#define U8500_SDI_V2_PERIPHID 0x10480180
|
|
|
|
|
2010-08-09 21:48:17 +08:00
|
|
|
/*
|
|
|
|
* SDI 0 (MicroSD slot)
|
|
|
|
*/
|
|
|
|
|
2010-10-14 19:57:59 +08:00
|
|
|
#ifdef CONFIG_STE_DMA40
|
|
|
|
struct stedma40_chan_cfg mop500_sdi0_dma_cfg_rx = {
|
|
|
|
.mode = STEDMA40_MODE_LOGICAL,
|
|
|
|
.dir = STEDMA40_PERIPH_TO_MEM,
|
|
|
|
.src_dev_type = DB8500_DMA_DEV29_SD_MM0_RX,
|
|
|
|
.dst_dev_type = STEDMA40_DEV_DST_MEMORY,
|
|
|
|
.src_info.data_width = STEDMA40_WORD_WIDTH,
|
|
|
|
.dst_info.data_width = STEDMA40_WORD_WIDTH,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct stedma40_chan_cfg mop500_sdi0_dma_cfg_tx = {
|
|
|
|
.mode = STEDMA40_MODE_LOGICAL,
|
|
|
|
.dir = STEDMA40_MEM_TO_PERIPH,
|
|
|
|
.src_dev_type = STEDMA40_DEV_SRC_MEMORY,
|
|
|
|
.dst_dev_type = DB8500_DMA_DEV29_SD_MM0_TX,
|
|
|
|
.src_info.data_width = STEDMA40_WORD_WIDTH,
|
|
|
|
.dst_info.data_width = STEDMA40_WORD_WIDTH,
|
|
|
|
};
|
|
|
|
#endif
|
|
|
|
|
2012-05-29 14:40:04 +08:00
|
|
|
struct mmci_platform_data mop500_sdi0_data = {
|
2010-08-09 21:48:17 +08:00
|
|
|
.ocr_mask = MMC_VDD_29_30,
|
2011-03-30 22:00:39 +08:00
|
|
|
.f_max = 50000000,
|
|
|
|
.capabilities = MMC_CAP_4_BIT_DATA |
|
|
|
|
MMC_CAP_SD_HIGHSPEED |
|
|
|
|
MMC_CAP_MMC_HIGHSPEED,
|
2010-08-09 21:48:17 +08:00
|
|
|
.gpio_wp = -1,
|
2011-12-13 23:57:55 +08:00
|
|
|
.sigdir = MCI_ST_FBCLKEN |
|
|
|
|
MCI_ST_CMDDIREN |
|
|
|
|
MCI_ST_DATA0DIREN |
|
|
|
|
MCI_ST_DATA2DIREN,
|
2010-10-14 19:57:59 +08:00
|
|
|
#ifdef CONFIG_STE_DMA40
|
|
|
|
.dma_filter = stedma40_filter,
|
|
|
|
.dma_rx_param = &mop500_sdi0_dma_cfg_rx,
|
|
|
|
.dma_tx_param = &mop500_sdi0_dma_cfg_tx,
|
|
|
|
#endif
|
2010-08-09 21:48:17 +08:00
|
|
|
};
|
|
|
|
|
2012-02-07 03:22:21 +08:00
|
|
|
static void sdi0_configure(struct device *parent)
|
2010-08-09 21:48:17 +08:00
|
|
|
{
|
2011-03-24 23:13:13 +08:00
|
|
|
/* Add the device, force v2 to subrevision 1 */
|
2012-02-07 03:22:21 +08:00
|
|
|
db8500_add_sdi0(parent, &mop500_sdi0_data, U8500_SDI_V2_PERIPHID);
|
2010-08-09 21:48:17 +08:00
|
|
|
}
|
|
|
|
|
2012-02-07 03:22:21 +08:00
|
|
|
void mop500_sdi_tc35892_init(struct device *parent)
|
2011-02-15 22:01:35 +08:00
|
|
|
{
|
|
|
|
mop500_sdi0_data.gpio_cd = GPIO_SDMMC_CD;
|
2012-02-07 03:22:21 +08:00
|
|
|
sdi0_configure(parent);
|
2011-02-15 22:01:35 +08:00
|
|
|
}
|
|
|
|
|
2011-10-26 16:50:42 +08:00
|
|
|
/*
|
|
|
|
* SDI1 (SDIO WLAN)
|
|
|
|
*/
|
|
|
|
#ifdef CONFIG_STE_DMA40
|
|
|
|
static struct stedma40_chan_cfg sdi1_dma_cfg_rx = {
|
|
|
|
.mode = STEDMA40_MODE_LOGICAL,
|
|
|
|
.dir = STEDMA40_PERIPH_TO_MEM,
|
|
|
|
.src_dev_type = DB8500_DMA_DEV32_SD_MM1_RX,
|
|
|
|
.dst_dev_type = STEDMA40_DEV_DST_MEMORY,
|
|
|
|
.src_info.data_width = STEDMA40_WORD_WIDTH,
|
|
|
|
.dst_info.data_width = STEDMA40_WORD_WIDTH,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct stedma40_chan_cfg sdi1_dma_cfg_tx = {
|
|
|
|
.mode = STEDMA40_MODE_LOGICAL,
|
|
|
|
.dir = STEDMA40_MEM_TO_PERIPH,
|
|
|
|
.src_dev_type = STEDMA40_DEV_SRC_MEMORY,
|
|
|
|
.dst_dev_type = DB8500_DMA_DEV32_SD_MM1_TX,
|
|
|
|
.src_info.data_width = STEDMA40_WORD_WIDTH,
|
|
|
|
.dst_info.data_width = STEDMA40_WORD_WIDTH,
|
|
|
|
};
|
|
|
|
#endif
|
|
|
|
|
2012-08-30 23:11:08 +08:00
|
|
|
struct mmci_platform_data mop500_sdi1_data = {
|
2011-10-26 16:50:42 +08:00
|
|
|
.ocr_mask = MMC_VDD_29_30,
|
|
|
|
.f_max = 50000000,
|
|
|
|
.capabilities = MMC_CAP_4_BIT_DATA,
|
|
|
|
.gpio_cd = -1,
|
|
|
|
.gpio_wp = -1,
|
|
|
|
#ifdef CONFIG_STE_DMA40
|
|
|
|
.dma_filter = stedma40_filter,
|
|
|
|
.dma_rx_param = &sdi1_dma_cfg_rx,
|
|
|
|
.dma_tx_param = &sdi1_dma_cfg_tx,
|
|
|
|
#endif
|
|
|
|
};
|
|
|
|
|
2010-08-19 19:06:32 +08:00
|
|
|
/*
|
|
|
|
* SDI 2 (POP eMMC, not on DB8500ed)
|
|
|
|
*/
|
|
|
|
|
2010-10-14 19:57:59 +08:00
|
|
|
#ifdef CONFIG_STE_DMA40
|
|
|
|
struct stedma40_chan_cfg mop500_sdi2_dma_cfg_rx = {
|
|
|
|
.mode = STEDMA40_MODE_LOGICAL,
|
|
|
|
.dir = STEDMA40_PERIPH_TO_MEM,
|
|
|
|
.src_dev_type = DB8500_DMA_DEV28_SD_MM2_RX,
|
|
|
|
.dst_dev_type = STEDMA40_DEV_DST_MEMORY,
|
|
|
|
.src_info.data_width = STEDMA40_WORD_WIDTH,
|
|
|
|
.dst_info.data_width = STEDMA40_WORD_WIDTH,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct stedma40_chan_cfg mop500_sdi2_dma_cfg_tx = {
|
|
|
|
.mode = STEDMA40_MODE_LOGICAL,
|
|
|
|
.dir = STEDMA40_MEM_TO_PERIPH,
|
|
|
|
.src_dev_type = STEDMA40_DEV_SRC_MEMORY,
|
|
|
|
.dst_dev_type = DB8500_DMA_DEV28_SD_MM2_TX,
|
|
|
|
.src_info.data_width = STEDMA40_WORD_WIDTH,
|
|
|
|
.dst_info.data_width = STEDMA40_WORD_WIDTH,
|
|
|
|
};
|
|
|
|
#endif
|
|
|
|
|
2012-08-30 23:11:08 +08:00
|
|
|
struct mmci_platform_data mop500_sdi2_data = {
|
2010-08-19 19:06:32 +08:00
|
|
|
.ocr_mask = MMC_VDD_165_195,
|
2011-03-30 22:00:39 +08:00
|
|
|
.f_max = 50000000,
|
2011-12-15 20:38:40 +08:00
|
|
|
.capabilities = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA |
|
|
|
|
MMC_CAP_MMC_HIGHSPEED,
|
2010-08-19 19:06:32 +08:00
|
|
|
.gpio_cd = -1,
|
|
|
|
.gpio_wp = -1,
|
2010-10-14 19:57:59 +08:00
|
|
|
#ifdef CONFIG_STE_DMA40
|
|
|
|
.dma_filter = stedma40_filter,
|
|
|
|
.dma_rx_param = &mop500_sdi2_dma_cfg_rx,
|
|
|
|
.dma_tx_param = &mop500_sdi2_dma_cfg_tx,
|
|
|
|
#endif
|
2010-08-19 19:06:32 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
/*
|
|
|
|
* SDI 4 (on-board eMMC)
|
|
|
|
*/
|
|
|
|
|
2010-10-14 19:57:59 +08:00
|
|
|
#ifdef CONFIG_STE_DMA40
|
|
|
|
struct stedma40_chan_cfg mop500_sdi4_dma_cfg_rx = {
|
|
|
|
.mode = STEDMA40_MODE_LOGICAL,
|
|
|
|
.dir = STEDMA40_PERIPH_TO_MEM,
|
|
|
|
.src_dev_type = DB8500_DMA_DEV42_SD_MM4_RX,
|
|
|
|
.dst_dev_type = STEDMA40_DEV_DST_MEMORY,
|
|
|
|
.src_info.data_width = STEDMA40_WORD_WIDTH,
|
|
|
|
.dst_info.data_width = STEDMA40_WORD_WIDTH,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct stedma40_chan_cfg mop500_sdi4_dma_cfg_tx = {
|
|
|
|
.mode = STEDMA40_MODE_LOGICAL,
|
|
|
|
.dir = STEDMA40_MEM_TO_PERIPH,
|
|
|
|
.src_dev_type = STEDMA40_DEV_SRC_MEMORY,
|
|
|
|
.dst_dev_type = DB8500_DMA_DEV42_SD_MM4_TX,
|
|
|
|
.src_info.data_width = STEDMA40_WORD_WIDTH,
|
|
|
|
.dst_info.data_width = STEDMA40_WORD_WIDTH,
|
|
|
|
};
|
|
|
|
#endif
|
|
|
|
|
2012-05-29 14:40:04 +08:00
|
|
|
struct mmci_platform_data mop500_sdi4_data = {
|
2010-08-19 19:06:32 +08:00
|
|
|
.ocr_mask = MMC_VDD_29_30,
|
2011-03-30 22:00:39 +08:00
|
|
|
.f_max = 50000000,
|
2010-08-19 19:06:32 +08:00
|
|
|
.capabilities = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA |
|
|
|
|
MMC_CAP_MMC_HIGHSPEED,
|
|
|
|
.gpio_cd = -1,
|
|
|
|
.gpio_wp = -1,
|
2010-10-14 19:57:59 +08:00
|
|
|
#ifdef CONFIG_STE_DMA40
|
|
|
|
.dma_filter = stedma40_filter,
|
|
|
|
.dma_rx_param = &mop500_sdi4_dma_cfg_rx,
|
|
|
|
.dma_tx_param = &mop500_sdi4_dma_cfg_tx,
|
|
|
|
#endif
|
2010-08-19 19:06:32 +08:00
|
|
|
};
|
|
|
|
|
2012-02-07 03:22:21 +08:00
|
|
|
void __init mop500_sdi_init(struct device *parent)
|
2010-08-19 19:06:32 +08:00
|
|
|
{
|
2011-12-15 20:38:40 +08:00
|
|
|
/* PoP:ed eMMC */
|
2012-02-07 03:22:21 +08:00
|
|
|
db8500_add_sdi2(parent, &mop500_sdi2_data, U8500_SDI_V2_PERIPHID);
|
2011-02-15 17:46:59 +08:00
|
|
|
/* On-board eMMC */
|
2012-02-07 03:22:21 +08:00
|
|
|
db8500_add_sdi4(parent, &mop500_sdi4_data, U8500_SDI_V2_PERIPHID);
|
|
|
|
|
2010-12-02 19:05:18 +08:00
|
|
|
/*
|
2011-02-15 22:01:35 +08:00
|
|
|
* On boards with the TC35892 GPIO expander, sdi0 will finally
|
|
|
|
* be added when the TC35892 initializes and calls
|
2010-12-02 19:05:18 +08:00
|
|
|
* mop500_sdi_tc35892_init() above.
|
|
|
|
*/
|
2010-08-19 19:06:32 +08:00
|
|
|
}
|
2011-08-26 23:54:07 +08:00
|
|
|
|
2012-02-07 03:22:21 +08:00
|
|
|
void __init snowball_sdi_init(struct device *parent)
|
2011-08-26 23:54:07 +08:00
|
|
|
{
|
2012-01-20 16:20:40 +08:00
|
|
|
/* On Snowball MMC_CAP_SD_HIGHSPEED isn't supported (Hardware issue?) */
|
|
|
|
mop500_sdi0_data.capabilities &= ~MMC_CAP_SD_HIGHSPEED;
|
2011-08-26 23:54:07 +08:00
|
|
|
/* On-board eMMC */
|
2012-02-07 03:22:21 +08:00
|
|
|
db8500_add_sdi4(parent, &mop500_sdi4_data, U8500_SDI_V2_PERIPHID);
|
2011-12-15 20:38:40 +08:00
|
|
|
/* External Micro SD slot */
|
2011-08-26 23:54:07 +08:00
|
|
|
mop500_sdi0_data.gpio_cd = SNOWBALL_SDMMC_CD_GPIO;
|
|
|
|
mop500_sdi0_data.cd_invert = true;
|
2012-02-07 03:22:21 +08:00
|
|
|
sdi0_configure(parent);
|
2011-08-26 23:54:07 +08:00
|
|
|
}
|
|
|
|
|
2012-02-07 03:22:21 +08:00
|
|
|
void __init hrefv60_sdi_init(struct device *parent)
|
2011-08-26 23:54:07 +08:00
|
|
|
{
|
2011-12-15 20:38:40 +08:00
|
|
|
/* PoP:ed eMMC */
|
2012-02-07 03:22:21 +08:00
|
|
|
db8500_add_sdi2(parent, &mop500_sdi2_data, U8500_SDI_V2_PERIPHID);
|
2011-08-26 23:54:07 +08:00
|
|
|
/* On-board eMMC */
|
2012-02-07 03:22:21 +08:00
|
|
|
db8500_add_sdi4(parent, &mop500_sdi4_data, U8500_SDI_V2_PERIPHID);
|
2011-12-15 20:38:40 +08:00
|
|
|
/* External Micro SD slot */
|
2011-08-26 23:54:07 +08:00
|
|
|
mop500_sdi0_data.gpio_cd = HREFV60_SDMMC_CD_GPIO;
|
2012-02-07 03:22:21 +08:00
|
|
|
sdi0_configure(parent);
|
2011-12-15 20:38:40 +08:00
|
|
|
/* WLAN SDIO channel */
|
2012-02-07 03:22:21 +08:00
|
|
|
db8500_add_sdi1(parent, &mop500_sdi1_data, U8500_SDI_V2_PERIPHID);
|
2011-08-26 23:54:07 +08:00
|
|
|
}
|