2011-12-17 06:13:09 +08:00
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/*
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* Device Tree Source for OMAP2 SoC
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*
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* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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/include/ "skeleton.dtsi"
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/ {
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compatible = "ti,omap2430", "ti,omap2420", "ti,omap2";
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aliases {
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serial0 = &uart1;
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serial1 = &uart2;
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serial2 = &uart3;
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};
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cpus {
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cpu@0 {
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compatible = "arm,arm1136jf-s";
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};
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};
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soc {
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compatible = "ti,omap-infra";
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mpu {
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compatible = "ti,omap2-mpu";
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ti,hwmods = "mpu";
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};
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};
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ocp {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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ti,hwmods = "l3_main";
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intc: interrupt-controller@1 {
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compatible = "ti,omap2-intc";
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interrupt-controller;
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#interrupt-cells = <1>;
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2012-06-13 08:40:46 +08:00
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ti,intc-size = <96>;
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reg = <0x480FE000 0x1000>;
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2011-12-17 06:13:09 +08:00
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};
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uart1: serial@4806a000 {
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compatible = "ti,omap2-uart";
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ti,hwmods = "uart1";
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clock-frequency = <48000000>;
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};
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uart2: serial@4806c000 {
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compatible = "ti,omap2-uart";
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ti,hwmods = "uart2";
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clock-frequency = <48000000>;
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};
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uart3: serial@4806e000 {
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compatible = "ti,omap2-uart";
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ti,hwmods = "uart3";
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clock-frequency = <48000000>;
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};
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};
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};
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