2019-05-27 14:55:01 +08:00
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// SPDX-License-Identifier: GPL-2.0-or-later
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2006-09-19 20:17:49 +08:00
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/*
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* I/O string operations
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* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
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* Copyright (C) 2006 IBM Corporation
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*
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* Largely rewritten by Cort Dougan (cort@cs.nmt.edu)
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* and Paul Mackerras.
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*
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* Adapted for iSeries by Mike Corrigan (mikejc@us.ibm.com)
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* PPC64 updates by Dave Engebretsen (engebret@us.ibm.com)
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*
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* Rewritten in C by Stephen Rothwell.
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/compiler.h>
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2011-07-23 06:24:23 +08:00
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#include <linux/export.h>
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2006-09-19 20:17:49 +08:00
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#include <asm/io.h>
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2006-09-21 16:00:00 +08:00
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#include <asm/firmware.h>
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#include <asm/bug.h>
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2006-09-19 20:17:49 +08:00
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2013-07-15 11:03:11 +08:00
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/* See definition in io.h */
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bool isa_io_special;
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[POWERPC] Allow hooking of PCI MMIO & PIO accessors on 64 bits
This patch reworks the way iSeries hooks on PCI IO operations (both MMIO
and PIO) and provides a generic way for other platforms to do so (we
have need to do that for various other platforms).
While reworking the IO ops, I ended up doing some spring cleaning in
io.h and eeh.h which I might want to split into 2 or 3 patches (among
others, eeh.h had a lot of useless stuff in it).
A side effect is that EEH for PIO should work now (it used to pass IO
ports down to the eeh address check functions which is bogus).
Also, new are MMIO "repeat" ops, which other archs like ARM already had,
and that we have too now: readsb, readsw, readsl, writesb, writesw,
writesl.
In the long run, I might also make EEH use the hooks instead
of wrapping at the toplevel, which would make things even cleaner and
relegate EEH completely in platforms/iseries, but we have to measure the
performance impact there (though it's really only on MMIO reads)
Since I also need to hook on ioremap, I shuffled the functions a bit
there. I introduced ioremap_flags() to use by drivers who want to pass
explicit flags to ioremap (and it can be hooked). The old __ioremap() is
still there as a low level and cannot be hooked, thus drivers who use it
should migrate unless they know they want the low level version.
The patch "arch provides generic iomap missing accessors" (should be
number 4 in this series) is a pre-requisite to provide full iomap
API support with this patch.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-11-11 14:25:10 +08:00
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void _insb(const volatile u8 __iomem *port, void *buf, long count)
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2006-09-19 20:17:49 +08:00
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{
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u8 *tbuf = buf;
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u8 tmp;
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if (unlikely(count <= 0))
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return;
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asm volatile("sync");
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do {
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tmp = *port;
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2007-07-10 12:49:09 +08:00
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eieio();
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2006-09-19 20:17:49 +08:00
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*tbuf++ = tmp;
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} while (--count != 0);
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asm volatile("twi 0,%0,0; isync" : : "r" (tmp));
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}
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EXPORT_SYMBOL(_insb);
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void _outsb(volatile u8 __iomem *port, const void *buf, long count)
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{
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const u8 *tbuf = buf;
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if (unlikely(count <= 0))
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return;
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asm volatile("sync");
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do {
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*port = *tbuf++;
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} while (--count != 0);
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asm volatile("sync");
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}
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EXPORT_SYMBOL(_outsb);
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[POWERPC] Allow hooking of PCI MMIO & PIO accessors on 64 bits
This patch reworks the way iSeries hooks on PCI IO operations (both MMIO
and PIO) and provides a generic way for other platforms to do so (we
have need to do that for various other platforms).
While reworking the IO ops, I ended up doing some spring cleaning in
io.h and eeh.h which I might want to split into 2 or 3 patches (among
others, eeh.h had a lot of useless stuff in it).
A side effect is that EEH for PIO should work now (it used to pass IO
ports down to the eeh address check functions which is bogus).
Also, new are MMIO "repeat" ops, which other archs like ARM already had,
and that we have too now: readsb, readsw, readsl, writesb, writesw,
writesl.
In the long run, I might also make EEH use the hooks instead
of wrapping at the toplevel, which would make things even cleaner and
relegate EEH completely in platforms/iseries, but we have to measure the
performance impact there (though it's really only on MMIO reads)
Since I also need to hook on ioremap, I shuffled the functions a bit
there. I introduced ioremap_flags() to use by drivers who want to pass
explicit flags to ioremap (and it can be hooked). The old __ioremap() is
still there as a low level and cannot be hooked, thus drivers who use it
should migrate unless they know they want the low level version.
The patch "arch provides generic iomap missing accessors" (should be
number 4 in this series) is a pre-requisite to provide full iomap
API support with this patch.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-11-11 14:25:10 +08:00
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void _insw_ns(const volatile u16 __iomem *port, void *buf, long count)
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2006-09-19 20:17:49 +08:00
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{
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u16 *tbuf = buf;
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u16 tmp;
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if (unlikely(count <= 0))
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return;
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asm volatile("sync");
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do {
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tmp = *port;
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2007-07-10 12:49:09 +08:00
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eieio();
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2006-09-19 20:17:49 +08:00
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*tbuf++ = tmp;
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} while (--count != 0);
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asm volatile("twi 0,%0,0; isync" : : "r" (tmp));
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}
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EXPORT_SYMBOL(_insw_ns);
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void _outsw_ns(volatile u16 __iomem *port, const void *buf, long count)
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{
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const u16 *tbuf = buf;
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if (unlikely(count <= 0))
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return;
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asm volatile("sync");
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do {
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*port = *tbuf++;
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} while (--count != 0);
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asm volatile("sync");
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}
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EXPORT_SYMBOL(_outsw_ns);
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[POWERPC] Allow hooking of PCI MMIO & PIO accessors on 64 bits
This patch reworks the way iSeries hooks on PCI IO operations (both MMIO
and PIO) and provides a generic way for other platforms to do so (we
have need to do that for various other platforms).
While reworking the IO ops, I ended up doing some spring cleaning in
io.h and eeh.h which I might want to split into 2 or 3 patches (among
others, eeh.h had a lot of useless stuff in it).
A side effect is that EEH for PIO should work now (it used to pass IO
ports down to the eeh address check functions which is bogus).
Also, new are MMIO "repeat" ops, which other archs like ARM already had,
and that we have too now: readsb, readsw, readsl, writesb, writesw,
writesl.
In the long run, I might also make EEH use the hooks instead
of wrapping at the toplevel, which would make things even cleaner and
relegate EEH completely in platforms/iseries, but we have to measure the
performance impact there (though it's really only on MMIO reads)
Since I also need to hook on ioremap, I shuffled the functions a bit
there. I introduced ioremap_flags() to use by drivers who want to pass
explicit flags to ioremap (and it can be hooked). The old __ioremap() is
still there as a low level and cannot be hooked, thus drivers who use it
should migrate unless they know they want the low level version.
The patch "arch provides generic iomap missing accessors" (should be
number 4 in this series) is a pre-requisite to provide full iomap
API support with this patch.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-11-11 14:25:10 +08:00
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void _insl_ns(const volatile u32 __iomem *port, void *buf, long count)
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2006-09-19 20:17:49 +08:00
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{
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u32 *tbuf = buf;
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u32 tmp;
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if (unlikely(count <= 0))
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return;
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asm volatile("sync");
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do {
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tmp = *port;
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2007-07-10 12:49:09 +08:00
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eieio();
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2006-09-19 20:17:49 +08:00
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*tbuf++ = tmp;
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} while (--count != 0);
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asm volatile("twi 0,%0,0; isync" : : "r" (tmp));
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}
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EXPORT_SYMBOL(_insl_ns);
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void _outsl_ns(volatile u32 __iomem *port, const void *buf, long count)
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{
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const u32 *tbuf = buf;
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if (unlikely(count <= 0))
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return;
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asm volatile("sync");
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do {
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*port = *tbuf++;
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} while (--count != 0);
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asm volatile("sync");
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}
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EXPORT_SYMBOL(_outsl_ns);
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2006-11-13 06:27:39 +08:00
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#define IO_CHECK_ALIGN(v,a) ((((unsigned long)(v)) & ((a) - 1)) == 0)
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2008-05-15 11:49:44 +08:00
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notrace void
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_memset_io(volatile void __iomem *addr, int c, unsigned long n)
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2006-11-13 06:27:39 +08:00
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{
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void *p = (void __force *)addr;
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u32 lc = c;
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lc |= lc << 8;
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lc |= lc << 16;
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__asm__ __volatile__ ("sync" : : : "memory");
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while(n && !IO_CHECK_ALIGN(p, 4)) {
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*((volatile u8 *)p) = c;
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p++;
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n--;
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}
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while(n >= 4) {
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*((volatile u32 *)p) = lc;
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p += 4;
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n -= 4;
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}
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while(n) {
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*((volatile u8 *)p) = c;
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p++;
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n--;
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}
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__asm__ __volatile__ ("sync" : : : "memory");
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}
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EXPORT_SYMBOL(_memset_io);
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void _memcpy_fromio(void *dest, const volatile void __iomem *src,
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unsigned long n)
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{
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void *vsrc = (void __force *) src;
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__asm__ __volatile__ ("sync" : : : "memory");
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while(n && (!IO_CHECK_ALIGN(vsrc, 4) || !IO_CHECK_ALIGN(dest, 4))) {
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*((u8 *)dest) = *((volatile u8 *)vsrc);
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2007-07-10 12:49:09 +08:00
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eieio();
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2006-11-13 06:27:39 +08:00
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vsrc++;
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dest++;
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n--;
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}
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2009-11-05 07:43:12 +08:00
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while(n >= 4) {
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2006-11-13 06:27:39 +08:00
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*((u32 *)dest) = *((volatile u32 *)vsrc);
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2007-07-10 12:49:09 +08:00
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eieio();
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2006-11-13 06:27:39 +08:00
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vsrc += 4;
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dest += 4;
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n -= 4;
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}
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while(n) {
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*((u8 *)dest) = *((volatile u8 *)vsrc);
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2007-07-10 12:49:09 +08:00
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eieio();
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2006-11-13 06:27:39 +08:00
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vsrc++;
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dest++;
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n--;
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}
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__asm__ __volatile__ ("sync" : : : "memory");
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}
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EXPORT_SYMBOL(_memcpy_fromio);
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void _memcpy_toio(volatile void __iomem *dest, const void *src, unsigned long n)
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{
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void *vdest = (void __force *) dest;
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__asm__ __volatile__ ("sync" : : : "memory");
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while(n && (!IO_CHECK_ALIGN(vdest, 4) || !IO_CHECK_ALIGN(src, 4))) {
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*((volatile u8 *)vdest) = *((u8 *)src);
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src++;
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vdest++;
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n--;
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}
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2009-11-05 07:43:12 +08:00
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while(n >= 4) {
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2006-11-13 06:27:39 +08:00
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*((volatile u32 *)vdest) = *((volatile u32 *)src);
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src += 4;
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vdest += 4;
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n-=4;
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}
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while(n) {
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*((volatile u8 *)vdest) = *((u8 *)src);
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src++;
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vdest++;
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n--;
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}
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__asm__ __volatile__ ("sync" : : : "memory");
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}
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EXPORT_SYMBOL(_memcpy_toio);
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