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OpenCloudOS-Kernel/drivers/soc/renesas/rcar-rst.c

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soc: renesas: convert to SPDX identifiers This patch updates license to use SPDX-License-Identifier instead of verbose license text. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-07 10:04:19 +08:00
// SPDX-License-Identifier: GPL-2.0
soc: renesas: Add R-Car RST driver Add a driver for the Renesas R-Car Gen1 RESET/WDT and R-Car Gen2/Gen3 and RZ/G RST module. For now this driver just provides an API to obtain the state of the mode pins, as latched at reset time. As this is typically called from the probe function of a clock driver, which can run much earlier than any initcall, calling rcar_rst_read_mode_pins() just forces an early initialization of the driver. Despite the current simple and almost identical handling for all supported SoCs, the driver matches against SoC-specific compatible values, as the features provided by the hardware module differ a lot across the various SoC families and members. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
2016-05-27 17:56:53 +08:00
/*
* R-Car Gen1 RESET/WDT, R-Car Gen2, Gen3, and RZ/G RST Driver
*
* Copyright (C) 2016 Glider bvba
*/
#include <linux/err.h>
#include <linux/io.h>
#include <linux/of_address.h>
#include <linux/soc/renesas/rcar-rst.h>
soc: renesas: rcar-rst: Enable watchdog as reset trigger for Gen2 This patch allows for platform specific quirks as some of the SoC need further customization for the watchdog to work properly, like for R-Car Gen2 and for RZ/G. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-13 21:02:44 +08:00
#define WDTRSTCR_RESET 0xA55A0002
#define WDTRSTCR 0x0054
soc: renesas: rcar-rst: Add support to set rproc boot address R-Car Gen3 SoC series has a realtime processor, the boot address of this processor can be set thanks to CR7BAR register of the reset module. Export this function so that it's possible to set the boot address from a remoteproc driver. Also drop the __initdata qualifier on rcar_rst_base, since we will use this address later than init time. Signed-off-by: Julien Massot <julien.massot@iot.bzh> Link: https://lore.kernel.org/r/20211022122101.66998-1-julien.massot@iot.bzh Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-10-22 20:21:01 +08:00
#define CR7BAR 0x0070
#define CR7BAREN BIT(4)
#define CR7BAR_MASK 0xFFFC0000
static void __iomem *rcar_rst_base;
static u32 saved_mode __initdata;
static int (*rcar_rst_set_rproc_boot_addr_func)(u64 boot_addr);
soc: renesas: rcar-rst: Enable watchdog as reset trigger for Gen2 This patch allows for platform specific quirks as some of the SoC need further customization for the watchdog to work properly, like for R-Car Gen2 and for RZ/G. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-13 21:02:44 +08:00
static int rcar_rst_enable_wdt_reset(void __iomem *base)
{
iowrite32(WDTRSTCR_RESET, base + WDTRSTCR);
return 0;
}
soc: renesas: rcar-rst: Add support to set rproc boot address R-Car Gen3 SoC series has a realtime processor, the boot address of this processor can be set thanks to CR7BAR register of the reset module. Export this function so that it's possible to set the boot address from a remoteproc driver. Also drop the __initdata qualifier on rcar_rst_base, since we will use this address later than init time. Signed-off-by: Julien Massot <julien.massot@iot.bzh> Link: https://lore.kernel.org/r/20211022122101.66998-1-julien.massot@iot.bzh Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-10-22 20:21:01 +08:00
/*
* Most of the R-Car Gen3 SoCs have an ARM Realtime Core.
* Firmware boot address has to be set in CR7BAR before
* starting the realtime core.
* Boot address must be aligned on a 256k boundary.
*/
static int rcar_rst_set_gen3_rproc_boot_addr(u64 boot_addr)
{
if (boot_addr & ~(u64)CR7BAR_MASK) {
pr_err("Invalid boot address got %llx\n", boot_addr);
return -EINVAL;
}
iowrite32(boot_addr, rcar_rst_base + CR7BAR);
iowrite32(boot_addr | CR7BAREN, rcar_rst_base + CR7BAR);
return 0;
}
soc: renesas: Add R-Car RST driver Add a driver for the Renesas R-Car Gen1 RESET/WDT and R-Car Gen2/Gen3 and RZ/G RST module. For now this driver just provides an API to obtain the state of the mode pins, as latched at reset time. As this is typically called from the probe function of a clock driver, which can run much earlier than any initcall, calling rcar_rst_read_mode_pins() just forces an early initialization of the driver. Despite the current simple and almost identical handling for all supported SoCs, the driver matches against SoC-specific compatible values, as the features provided by the hardware module differ a lot across the various SoC families and members. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
2016-05-27 17:56:53 +08:00
struct rst_config {
soc: renesas: rcar-rst: Enable watchdog as reset trigger for Gen2 This patch allows for platform specific quirks as some of the SoC need further customization for the watchdog to work properly, like for R-Car Gen2 and for RZ/G. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-13 21:02:44 +08:00
unsigned int modemr; /* Mode Monitoring Register Offset */
soc: renesas: rcar-rst: Fix __iomem on configure call The configure call back takes a register pointer, so should have been marked with __iomem. Add this to silence the following sparse warnings: drivers/soc/renesas/rcar-rst.c:33:22: warning: incorrect type in initializer (incompatible argument 1 (different address spaces)) drivers/soc/renesas/rcar-rst.c:33:22: expected int ( *configure )( ... ) drivers/soc/renesas/rcar-rst.c:33:22: got int ( * )( ... ) drivers/soc/renesas/rcar-rst.c:97:40: warning: incorrect type in argument 1 (different address spaces) drivers/soc/renesas/rcar-rst.c:97:40: expected void *base drivers/soc/renesas/rcar-rst.c:97:40: got void [noderef] <asn:2> *[assigned] base Signed-off-by: Ben Dooks (Codethink) <ben.dooks@codethink.co.uk> Link: https://lore.kernel.org/r/20191218135230.2610161-1-ben.dooks@codethink.co.uk Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-12-18 21:52:30 +08:00
int (*configure)(void __iomem *base); /* Platform specific config */
soc: renesas: rcar-rst: Add support to set rproc boot address R-Car Gen3 SoC series has a realtime processor, the boot address of this processor can be set thanks to CR7BAR register of the reset module. Export this function so that it's possible to set the boot address from a remoteproc driver. Also drop the __initdata qualifier on rcar_rst_base, since we will use this address later than init time. Signed-off-by: Julien Massot <julien.massot@iot.bzh> Link: https://lore.kernel.org/r/20211022122101.66998-1-julien.massot@iot.bzh Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-10-22 20:21:01 +08:00
int (*set_rproc_boot_addr)(u64 boot_addr);
soc: renesas: Add R-Car RST driver Add a driver for the Renesas R-Car Gen1 RESET/WDT and R-Car Gen2/Gen3 and RZ/G RST module. For now this driver just provides an API to obtain the state of the mode pins, as latched at reset time. As this is typically called from the probe function of a clock driver, which can run much earlier than any initcall, calling rcar_rst_read_mode_pins() just forces an early initialization of the driver. Despite the current simple and almost identical handling for all supported SoCs, the driver matches against SoC-specific compatible values, as the features provided by the hardware module differ a lot across the various SoC families and members. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
2016-05-27 17:56:53 +08:00
};
static const struct rst_config rcar_rst_gen1 __initconst = {
.modemr = 0x20,
};
static const struct rst_config rcar_rst_gen2 __initconst = {
.modemr = 0x60,
soc: renesas: rcar-rst: Enable watchdog as reset trigger for Gen2 This patch allows for platform specific quirks as some of the SoC need further customization for the watchdog to work properly, like for R-Car Gen2 and for RZ/G. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-13 21:02:44 +08:00
.configure = rcar_rst_enable_wdt_reset,
};
static const struct rst_config rcar_rst_gen3 __initconst = {
.modemr = 0x60,
soc: renesas: rcar-rst: Add support to set rproc boot address R-Car Gen3 SoC series has a realtime processor, the boot address of this processor can be set thanks to CR7BAR register of the reset module. Export this function so that it's possible to set the boot address from a remoteproc driver. Also drop the __initdata qualifier on rcar_rst_base, since we will use this address later than init time. Signed-off-by: Julien Massot <julien.massot@iot.bzh> Link: https://lore.kernel.org/r/20211022122101.66998-1-julien.massot@iot.bzh Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-10-22 20:21:01 +08:00
.set_rproc_boot_addr = rcar_rst_set_gen3_rproc_boot_addr,
soc: renesas: Add R-Car RST driver Add a driver for the Renesas R-Car Gen1 RESET/WDT and R-Car Gen2/Gen3 and RZ/G RST module. For now this driver just provides an API to obtain the state of the mode pins, as latched at reset time. As this is typically called from the probe function of a clock driver, which can run much earlier than any initcall, calling rcar_rst_read_mode_pins() just forces an early initialization of the driver. Despite the current simple and almost identical handling for all supported SoCs, the driver matches against SoC-specific compatible values, as the features provided by the hardware module differ a lot across the various SoC families and members. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
2016-05-27 17:56:53 +08:00
};
soc: renesas: rcar-rst: Add support for R-Car S4-8 Add support for R-Car S4-8 (R8A779F0) to the R-Car RST driver. The register map of R-Car S4-8 is the same as R-Car V3U so that renames "V3U" and "r8a779a0" to "Gen4". Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20211201073308.1003945-11-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-12-01 15:33:04 +08:00
static const struct rst_config rcar_rst_gen4 __initconst = {
soc: renesas: rcar-rst: Add support for R-Car V3U Add support for R-Car V3U (R8A779A0) to the R-Car RST driver. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/1599470390-29719-12-git-send-email-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-09-07 17:19:47 +08:00
.modemr = 0x00, /* MODEMR0 and it has CPG related bits */
};
soc: renesas: Add R-Car RST driver Add a driver for the Renesas R-Car Gen1 RESET/WDT and R-Car Gen2/Gen3 and RZ/G RST module. For now this driver just provides an API to obtain the state of the mode pins, as latched at reset time. As this is typically called from the probe function of a clock driver, which can run much earlier than any initcall, calling rcar_rst_read_mode_pins() just forces an early initialization of the driver. Despite the current simple and almost identical handling for all supported SoCs, the driver matches against SoC-specific compatible values, as the features provided by the hardware module differ a lot across the various SoC families and members. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
2016-05-27 17:56:53 +08:00
static const struct of_device_id rcar_rst_matches[] __initconst = {
soc: renesas: rcar-rst: Add support for RZ/G2M Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Chris Paterson <chris.paterson2@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-08-02 22:55:04 +08:00
/* RZ/G1 is handled like R-Car Gen2 */
soc: renesas: rcar-rst: Add support for RZ/G1H Add support for RZ/G1H (R8A7742) to the R-Car RST driver. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Link: https://lore.kernel.org/r/1587678050-23468-6-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-04-24 05:40:45 +08:00
{ .compatible = "renesas,r8a7742-rst", .data = &rcar_rst_gen2 },
soc: renesas: Add R-Car RST driver Add a driver for the Renesas R-Car Gen1 RESET/WDT and R-Car Gen2/Gen3 and RZ/G RST module. For now this driver just provides an API to obtain the state of the mode pins, as latched at reset time. As this is typically called from the probe function of a clock driver, which can run much earlier than any initcall, calling rcar_rst_read_mode_pins() just forces an early initialization of the driver. Despite the current simple and almost identical handling for all supported SoCs, the driver matches against SoC-specific compatible values, as the features provided by the hardware module differ a lot across the various SoC families and members. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
2016-05-27 17:56:53 +08:00
{ .compatible = "renesas,r8a7743-rst", .data = &rcar_rst_gen2 },
soc: renesas: rcar-rst: Add support for RZ/G1N Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-11 18:12:46 +08:00
{ .compatible = "renesas,r8a7744-rst", .data = &rcar_rst_gen2 },
soc: renesas: Add R-Car RST driver Add a driver for the Renesas R-Car Gen1 RESET/WDT and R-Car Gen2/Gen3 and RZ/G RST module. For now this driver just provides an API to obtain the state of the mode pins, as latched at reset time. As this is typically called from the probe function of a clock driver, which can run much earlier than any initcall, calling rcar_rst_read_mode_pins() just forces an early initialization of the driver. Despite the current simple and almost identical handling for all supported SoCs, the driver matches against SoC-specific compatible values, as the features provided by the hardware module differ a lot across the various SoC families and members. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
2016-05-27 17:56:53 +08:00
{ .compatible = "renesas,r8a7745-rst", .data = &rcar_rst_gen2 },
soc: renesas: rcar-rst: Add support for RZ/G1C Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-03-27 22:37:14 +08:00
{ .compatible = "renesas,r8a77470-rst", .data = &rcar_rst_gen2 },
soc: renesas: rcar-rst: Add support for RZ/G2M Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Chris Paterson <chris.paterson2@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-08-02 22:55:04 +08:00
/* RZ/G2 is handled like R-Car Gen3 */
{ .compatible = "renesas,r8a774a1-rst", .data = &rcar_rst_gen3 },
soc: renesas: rcar-rst: Add support for RZ/G2N Add support for RZ/G2N (R8A774B1) to the R-Car RST driver. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Link: https://lore.kernel.org/r/1568881036-4404-5-git-send-email-biju.das@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-09-19 16:17:12 +08:00
{ .compatible = "renesas,r8a774b1-rst", .data = &rcar_rst_gen3 },
soc: renesas: rcar-rst: Add support for RZ/G2E Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Biju Das <biju.das@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-10 23:09:41 +08:00
{ .compatible = "renesas,r8a774c0-rst", .data = &rcar_rst_gen3 },
soc: renesas: rcar-rst: Add support for RZ/G2H Add support for RZ/G2H (R8A774E1) to the R-Car RST driver. Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/1594138692-16816-8-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-07-08 00:18:07 +08:00
{ .compatible = "renesas,r8a774e1-rst", .data = &rcar_rst_gen3 },
soc: renesas: Add R-Car RST driver Add a driver for the Renesas R-Car Gen1 RESET/WDT and R-Car Gen2/Gen3 and RZ/G RST module. For now this driver just provides an API to obtain the state of the mode pins, as latched at reset time. As this is typically called from the probe function of a clock driver, which can run much earlier than any initcall, calling rcar_rst_read_mode_pins() just forces an early initialization of the driver. Despite the current simple and almost identical handling for all supported SoCs, the driver matches against SoC-specific compatible values, as the features provided by the hardware module differ a lot across the various SoC families and members. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
2016-05-27 17:56:53 +08:00
/* R-Car Gen1 */
{ .compatible = "renesas,r8a7778-reset-wdt", .data = &rcar_rst_gen1 },
{ .compatible = "renesas,r8a7779-reset-wdt", .data = &rcar_rst_gen1 },
/* R-Car Gen2 */
{ .compatible = "renesas,r8a7790-rst", .data = &rcar_rst_gen2 },
{ .compatible = "renesas,r8a7791-rst", .data = &rcar_rst_gen2 },
{ .compatible = "renesas,r8a7792-rst", .data = &rcar_rst_gen2 },
{ .compatible = "renesas,r8a7793-rst", .data = &rcar_rst_gen2 },
{ .compatible = "renesas,r8a7794-rst", .data = &rcar_rst_gen2 },
soc: renesas: rcar-rst: Enable watchdog as reset trigger for Gen2 This patch allows for platform specific quirks as some of the SoC need further customization for the watchdog to work properly, like for R-Car Gen2 and for RZ/G. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-13 21:02:44 +08:00
/* R-Car Gen3 */
{ .compatible = "renesas,r8a7795-rst", .data = &rcar_rst_gen3 },
{ .compatible = "renesas,r8a7796-rst", .data = &rcar_rst_gen3 },
soc: renesas: rcar-rst: Add R8A77961 support Add support for the Reset block in the R-Car M3-W+ (R8A77961) SoC to the Renesas R-Car RST driver. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20191023123342.13100-6-geert+renesas@glider.be
2019-10-23 20:33:36 +08:00
{ .compatible = "renesas,r8a77961-rst", .data = &rcar_rst_gen3 },
soc: renesas: rcar-rst: Add support for R-Car M3-N Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-20 23:12:04 +08:00
{ .compatible = "renesas,r8a77965-rst", .data = &rcar_rst_gen3 },
soc: renesas: rcar-rst: Enable watchdog as reset trigger for Gen2 This patch allows for platform specific quirks as some of the SoC need further customization for the watchdog to work properly, like for R-Car Gen2 and for RZ/G. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-13 21:02:44 +08:00
{ .compatible = "renesas,r8a77970-rst", .data = &rcar_rst_gen3 },
{ .compatible = "renesas,r8a77980-rst", .data = &rcar_rst_gen3 },
soc: renesas: rcar-rst: Add support for R-Car E3 Add support for R-Car E3 (R8A77990) to the R-Car RST driver. This driver is needed for the clock driver to work. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> [shimoda: rebase] Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-04-11 17:36:26 +08:00
{ .compatible = "renesas,r8a77990-rst", .data = &rcar_rst_gen3 },
soc: renesas: rcar-rst: Enable watchdog as reset trigger for Gen2 This patch allows for platform specific quirks as some of the SoC need further customization for the watchdog to work properly, like for R-Car Gen2 and for RZ/G. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-13 21:02:44 +08:00
{ .compatible = "renesas,r8a77995-rst", .data = &rcar_rst_gen3 },
soc: renesas: rcar-rst: Add support for R-Car S4-8 Add support for R-Car S4-8 (R8A779F0) to the R-Car RST driver. The register map of R-Car S4-8 is the same as R-Car V3U so that renames "V3U" and "r8a779a0" to "Gen4". Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20211201073308.1003945-11-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-12-01 15:33:04 +08:00
/* R-Car Gen4 */
{ .compatible = "renesas,r8a779a0-rst", .data = &rcar_rst_gen4 },
{ .compatible = "renesas,r8a779f0-rst", .data = &rcar_rst_gen4 },
soc: renesas: rcar-rst: Add support for R-Car V4H Add support for R-Car V4H (R8A779G0) to the R-Car RST driver. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20220420084255.375700-12-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-20 16:42:51 +08:00
{ .compatible = "renesas,r8a779g0-rst", .data = &rcar_rst_gen4 },
soc: renesas: Add R-Car RST driver Add a driver for the Renesas R-Car Gen1 RESET/WDT and R-Car Gen2/Gen3 and RZ/G RST module. For now this driver just provides an API to obtain the state of the mode pins, as latched at reset time. As this is typically called from the probe function of a clock driver, which can run much earlier than any initcall, calling rcar_rst_read_mode_pins() just forces an early initialization of the driver. Despite the current simple and almost identical handling for all supported SoCs, the driver matches against SoC-specific compatible values, as the features provided by the hardware module differ a lot across the various SoC families and members. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
2016-05-27 17:56:53 +08:00
{ /* sentinel */ }
};
static int __init rcar_rst_init(void)
{
const struct of_device_id *match;
const struct rst_config *cfg;
struct device_node *np;
void __iomem *base;
int error = 0;
np = of_find_matching_node_and_match(NULL, rcar_rst_matches, &match);
if (!np)
return -ENODEV;
base = of_iomap(np, 0);
if (!base) {
soc: Convert to using %pOF instead of full_name Now that we have a custom printf format specifier, convert users of full_name to use %pOF instead. This is preparation to remove storing of the full path string for each node. Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Simon Horman <horms+renesas@verge.net.au> Cc: Scott Wood <oss@buserror.net> Cc: Qiang Zhao <qiang.zhao@nxp.com> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Kukjin Kim <kgene@kernel.org> Cc: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2017-07-19 05:43:29 +08:00
pr_warn("%pOF: Cannot map regs\n", np);
soc: renesas: Add R-Car RST driver Add a driver for the Renesas R-Car Gen1 RESET/WDT and R-Car Gen2/Gen3 and RZ/G RST module. For now this driver just provides an API to obtain the state of the mode pins, as latched at reset time. As this is typically called from the probe function of a clock driver, which can run much earlier than any initcall, calling rcar_rst_read_mode_pins() just forces an early initialization of the driver. Despite the current simple and almost identical handling for all supported SoCs, the driver matches against SoC-specific compatible values, as the features provided by the hardware module differ a lot across the various SoC families and members. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
2016-05-27 17:56:53 +08:00
error = -ENOMEM;
goto out_put;
}
rcar_rst_base = base;
cfg = match->data;
soc: renesas: rcar-rst: Add support to set rproc boot address R-Car Gen3 SoC series has a realtime processor, the boot address of this processor can be set thanks to CR7BAR register of the reset module. Export this function so that it's possible to set the boot address from a remoteproc driver. Also drop the __initdata qualifier on rcar_rst_base, since we will use this address later than init time. Signed-off-by: Julien Massot <julien.massot@iot.bzh> Link: https://lore.kernel.org/r/20211022122101.66998-1-julien.massot@iot.bzh Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-10-22 20:21:01 +08:00
rcar_rst_set_rproc_boot_addr_func = cfg->set_rproc_boot_addr;
soc: renesas: Add R-Car RST driver Add a driver for the Renesas R-Car Gen1 RESET/WDT and R-Car Gen2/Gen3 and RZ/G RST module. For now this driver just provides an API to obtain the state of the mode pins, as latched at reset time. As this is typically called from the probe function of a clock driver, which can run much earlier than any initcall, calling rcar_rst_read_mode_pins() just forces an early initialization of the driver. Despite the current simple and almost identical handling for all supported SoCs, the driver matches against SoC-specific compatible values, as the features provided by the hardware module differ a lot across the various SoC families and members. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
2016-05-27 17:56:53 +08:00
saved_mode = ioread32(base + cfg->modemr);
soc: renesas: rcar-rst: Enable watchdog as reset trigger for Gen2 This patch allows for platform specific quirks as some of the SoC need further customization for the watchdog to work properly, like for R-Car Gen2 and for RZ/G. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-13 21:02:44 +08:00
if (cfg->configure) {
error = cfg->configure(base);
if (error) {
pr_warn("%pOF: Cannot run SoC specific configuration\n",
np);
goto out_put;
}
}
soc: renesas: Add R-Car RST driver Add a driver for the Renesas R-Car Gen1 RESET/WDT and R-Car Gen2/Gen3 and RZ/G RST module. For now this driver just provides an API to obtain the state of the mode pins, as latched at reset time. As this is typically called from the probe function of a clock driver, which can run much earlier than any initcall, calling rcar_rst_read_mode_pins() just forces an early initialization of the driver. Despite the current simple and almost identical handling for all supported SoCs, the driver matches against SoC-specific compatible values, as the features provided by the hardware module differ a lot across the various SoC families and members. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
2016-05-27 17:56:53 +08:00
soc: Convert to using %pOF instead of full_name Now that we have a custom printf format specifier, convert users of full_name to use %pOF instead. This is preparation to remove storing of the full path string for each node. Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Simon Horman <horms+renesas@verge.net.au> Cc: Scott Wood <oss@buserror.net> Cc: Qiang Zhao <qiang.zhao@nxp.com> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Kukjin Kim <kgene@kernel.org> Cc: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2017-07-19 05:43:29 +08:00
pr_debug("%pOF: MODE = 0x%08x\n", np, saved_mode);
soc: renesas: Add R-Car RST driver Add a driver for the Renesas R-Car Gen1 RESET/WDT and R-Car Gen2/Gen3 and RZ/G RST module. For now this driver just provides an API to obtain the state of the mode pins, as latched at reset time. As this is typically called from the probe function of a clock driver, which can run much earlier than any initcall, calling rcar_rst_read_mode_pins() just forces an early initialization of the driver. Despite the current simple and almost identical handling for all supported SoCs, the driver matches against SoC-specific compatible values, as the features provided by the hardware module differ a lot across the various SoC families and members. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
2016-05-27 17:56:53 +08:00
out_put:
of_node_put(np);
return error;
}
int __init rcar_rst_read_mode_pins(u32 *mode)
{
int error;
if (!rcar_rst_base) {
error = rcar_rst_init();
if (error)
return error;
}
*mode = saved_mode;
return 0;
}
soc: renesas: rcar-rst: Add support to set rproc boot address R-Car Gen3 SoC series has a realtime processor, the boot address of this processor can be set thanks to CR7BAR register of the reset module. Export this function so that it's possible to set the boot address from a remoteproc driver. Also drop the __initdata qualifier on rcar_rst_base, since we will use this address later than init time. Signed-off-by: Julien Massot <julien.massot@iot.bzh> Link: https://lore.kernel.org/r/20211022122101.66998-1-julien.massot@iot.bzh Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-10-22 20:21:01 +08:00
int rcar_rst_set_rproc_boot_addr(u64 boot_addr)
{
if (!rcar_rst_set_rproc_boot_addr_func)
return -EIO;
return rcar_rst_set_rproc_boot_addr_func(boot_addr);
}
EXPORT_SYMBOL_GPL(rcar_rst_set_rproc_boot_addr);