2019-05-27 14:55:05 +08:00
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// SPDX-License-Identifier: GPL-2.0-or-later
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2011-07-26 03:46:09 +08:00
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/***************************************************************************
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2012-03-18 20:05:08 +08:00
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* Copyright (C) 2010-2012 Hans de Goede <hdegoede@redhat.com> *
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2011-07-26 03:46:09 +08:00
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* *
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***************************************************************************/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/module.h>
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2022-02-01 05:19:33 +08:00
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#include <linux/mod_devicetable.h>
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2011-07-26 03:46:09 +08:00
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#include <linux/init.h>
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#include <linux/platform_device.h>
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2022-02-01 05:19:33 +08:00
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#include <linux/dmi.h>
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2011-07-26 03:46:09 +08:00
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/acpi.h>
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#include <linux/delay.h>
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2012-03-18 20:05:08 +08:00
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#include <linux/fs.h>
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#include <linux/watchdog.h>
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#include <linux/uaccess.h>
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#include <linux/slab.h>
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2011-07-26 03:46:09 +08:00
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#include "sch56xx-common.h"
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2022-02-01 05:19:33 +08:00
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static bool ignore_dmi;
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module_param(ignore_dmi, bool, 0);
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MODULE_PARM_DESC(ignore_dmi, "Omit DMI check for supported devices (default=0)");
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2021-05-08 21:14:56 +08:00
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static bool nowayout = WATCHDOG_NOWAYOUT;
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module_param(nowayout, bool, 0);
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2012-03-18 20:05:08 +08:00
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MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
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__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
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2011-07-26 03:46:09 +08:00
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#define SIO_SCH56XX_LD_EM 0x0C /* Embedded uController Logical Dev */
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#define SIO_UNLOCK_KEY 0x55 /* Key to enable Super-I/O */
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#define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */
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#define SIO_REG_LDSEL 0x07 /* Logical device select */
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#define SIO_REG_DEVID 0x20 /* Device ID */
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#define SIO_REG_ENABLE 0x30 /* Logical device enable */
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#define SIO_REG_ADDR 0x66 /* Logical device address (2 bytes) */
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#define SIO_SCH5627_ID 0xC6 /* Chipset ID */
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2011-07-26 03:46:09 +08:00
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#define SIO_SCH5636_ID 0xC7 /* Chipset ID */
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2011-07-26 03:46:09 +08:00
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2012-03-18 20:05:08 +08:00
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#define REGION_LENGTH 10
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2011-07-26 03:46:09 +08:00
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#define SCH56XX_CMD_READ 0x02
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#define SCH56XX_CMD_WRITE 0x03
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2012-03-18 20:05:08 +08:00
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/* Watchdog registers */
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#define SCH56XX_REG_WDOG_PRESET 0x58B
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#define SCH56XX_REG_WDOG_CONTROL 0x58C
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#define SCH56XX_WDOG_TIME_BASE_SEC 0x01
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#define SCH56XX_REG_WDOG_OUTPUT_ENABLE 0x58E
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#define SCH56XX_WDOG_OUTPUT_ENABLE 0x02
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struct sch56xx_watchdog_data {
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u16 addr;
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struct mutex *io_lock;
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2012-05-22 17:40:24 +08:00
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struct watchdog_info wdinfo;
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struct watchdog_device wddev;
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2012-03-18 20:05:08 +08:00
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u8 watchdog_preset;
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u8 watchdog_control;
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u8 watchdog_output_enable;
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};
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2011-07-26 03:46:09 +08:00
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static struct platform_device *sch56xx_pdev;
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/* Super I/O functions */
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static inline int superio_inb(int base, int reg)
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{
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outb(reg, base);
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return inb(base + 1);
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}
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static inline int superio_enter(int base)
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{
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/* Don't step on other drivers' I/O space by accident */
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if (!request_muxed_region(base, 2, "sch56xx")) {
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pr_err("I/O address 0x%04x already in use\n", base);
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return -EBUSY;
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}
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outb(SIO_UNLOCK_KEY, base);
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return 0;
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}
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static inline void superio_select(int base, int ld)
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{
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outb(SIO_REG_LDSEL, base);
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outb(ld, base + 1);
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}
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static inline void superio_exit(int base)
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{
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outb(SIO_LOCK_KEY, base);
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release_region(base, 2);
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}
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static int sch56xx_send_cmd(u16 addr, u8 cmd, u16 reg, u8 v)
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{
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u8 val;
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int i;
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/*
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* According to SMSC for the commands we use the maximum time for
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* the EM to respond is 15 ms, but testing shows in practice it
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* responds within 15-32 reads, so we first busy poll, and if
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* that fails sleep a bit and try again until we are way past
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* the 15 ms maximum response time.
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*/
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const int max_busy_polls = 64;
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const int max_lazy_polls = 32;
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/* (Optional) Write-Clear the EC to Host Mailbox Register */
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val = inb(addr + 1);
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outb(val, addr + 1);
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/* Set Mailbox Address Pointer to first location in Region 1 */
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outb(0x00, addr + 2);
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outb(0x80, addr + 3);
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/* Write Request Packet Header */
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outb(cmd, addr + 4); /* VREG Access Type read:0x02 write:0x03 */
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outb(0x01, addr + 5); /* # of Entries: 1 Byte (8-bit) */
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outb(0x04, addr + 2); /* Mailbox AP to first data entry loc. */
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/* Write Value field */
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if (cmd == SCH56XX_CMD_WRITE)
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outb(v, addr + 4);
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/* Write Address field */
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outb(reg & 0xff, addr + 6);
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outb(reg >> 8, addr + 7);
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/* Execute the Random Access Command */
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outb(0x01, addr); /* Write 01h to the Host-to-EC register */
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/* EM Interface Polling "Algorithm" */
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for (i = 0; i < max_busy_polls + max_lazy_polls; i++) {
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if (i >= max_busy_polls)
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2022-02-01 05:19:34 +08:00
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usleep_range(1000, 2000);
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2011-07-26 03:46:09 +08:00
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/* Read Interrupt source Register */
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val = inb(addr + 8);
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/* Write Clear the interrupt source bits */
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if (val)
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outb(val, addr + 8);
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/* Command Completed ? */
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if (val & 0x01)
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break;
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}
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if (i == max_busy_polls + max_lazy_polls) {
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2013-01-11 02:01:24 +08:00
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pr_err("Max retries exceeded reading virtual register 0x%04hx (%d)\n",
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reg, 1);
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2011-07-26 03:46:09 +08:00
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return -EIO;
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}
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/*
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* According to SMSC we may need to retry this, but sofar I've always
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* seen this succeed in 1 try.
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*/
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for (i = 0; i < max_busy_polls; i++) {
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/* Read EC-to-Host Register */
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val = inb(addr + 1);
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/* Command Completed ? */
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if (val == 0x01)
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break;
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if (i == 0)
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2013-01-11 02:01:24 +08:00
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pr_warn("EC reports: 0x%02x reading virtual register 0x%04hx\n",
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(unsigned int)val, reg);
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2011-07-26 03:46:09 +08:00
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}
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if (i == max_busy_polls) {
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2013-01-11 02:01:24 +08:00
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pr_err("Max retries exceeded reading virtual register 0x%04hx (%d)\n",
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reg, 2);
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2011-07-26 03:46:09 +08:00
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return -EIO;
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}
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/*
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* According to the SMSC app note we should now do:
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*
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* Set Mailbox Address Pointer to first location in Region 1 *
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* outb(0x00, addr + 2);
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* outb(0x80, addr + 3);
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*
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* But if we do that things don't work, so let's not.
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*/
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/* Read Value field */
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if (cmd == SCH56XX_CMD_READ)
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return inb(addr + 4);
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return 0;
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}
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int sch56xx_read_virtual_reg(u16 addr, u16 reg)
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{
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return sch56xx_send_cmd(addr, SCH56XX_CMD_READ, reg, 0);
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}
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EXPORT_SYMBOL(sch56xx_read_virtual_reg);
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int sch56xx_write_virtual_reg(u16 addr, u16 reg, u8 val)
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{
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return sch56xx_send_cmd(addr, SCH56XX_CMD_WRITE, reg, val);
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}
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EXPORT_SYMBOL(sch56xx_write_virtual_reg);
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int sch56xx_read_virtual_reg16(u16 addr, u16 reg)
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{
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int lsb, msb;
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/* Read LSB first, this will cause the matching MSB to be latched */
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lsb = sch56xx_read_virtual_reg(addr, reg);
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if (lsb < 0)
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return lsb;
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msb = sch56xx_read_virtual_reg(addr, reg + 1);
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if (msb < 0)
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return msb;
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return lsb | (msb << 8);
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}
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EXPORT_SYMBOL(sch56xx_read_virtual_reg16);
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int sch56xx_read_virtual_reg12(u16 addr, u16 msb_reg, u16 lsn_reg,
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int high_nibble)
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{
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int msb, lsn;
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/* Read MSB first, this will cause the matching LSN to be latched */
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msb = sch56xx_read_virtual_reg(addr, msb_reg);
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if (msb < 0)
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return msb;
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lsn = sch56xx_read_virtual_reg(addr, lsn_reg);
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if (lsn < 0)
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return lsn;
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if (high_nibble)
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return (msb << 4) | (lsn >> 4);
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else
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return (msb << 4) | (lsn & 0x0f);
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}
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EXPORT_SYMBOL(sch56xx_read_virtual_reg12);
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2012-03-18 20:05:08 +08:00
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/*
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* Watchdog routines
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*/
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2012-05-22 17:40:24 +08:00
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static int watchdog_set_timeout(struct watchdog_device *wddev,
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unsigned int timeout)
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2012-03-18 20:05:08 +08:00
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{
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2012-05-22 17:40:24 +08:00
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struct sch56xx_watchdog_data *data = watchdog_get_drvdata(wddev);
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unsigned int resolution;
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2012-03-18 20:05:08 +08:00
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u8 control;
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2012-05-22 17:40:24 +08:00
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int ret;
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2012-03-18 20:05:08 +08:00
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/* 1 second or 60 second resolution? */
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if (timeout <= 255)
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resolution = 1;
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else
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resolution = 60;
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if (timeout < resolution || timeout > (resolution * 255))
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return -EINVAL;
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if (resolution == 1)
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control = data->watchdog_control | SCH56XX_WDOG_TIME_BASE_SEC;
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else
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control = data->watchdog_control & ~SCH56XX_WDOG_TIME_BASE_SEC;
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if (data->watchdog_control != control) {
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mutex_lock(data->io_lock);
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ret = sch56xx_write_virtual_reg(data->addr,
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SCH56XX_REG_WDOG_CONTROL,
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control);
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mutex_unlock(data->io_lock);
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if (ret)
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2012-05-22 17:40:24 +08:00
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return ret;
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2012-03-18 20:05:08 +08:00
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data->watchdog_control = control;
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}
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/*
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* Remember new timeout value, but do not write as that (re)starts
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* the watchdog countdown.
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*/
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data->watchdog_preset = DIV_ROUND_UP(timeout, resolution);
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2012-05-22 17:40:24 +08:00
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wddev->timeout = data->watchdog_preset * resolution;
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2012-03-18 20:05:08 +08:00
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2012-05-22 17:40:24 +08:00
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return 0;
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2012-03-18 20:05:08 +08:00
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}
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2012-05-22 17:40:24 +08:00
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static int watchdog_start(struct watchdog_device *wddev)
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2012-03-18 20:05:08 +08:00
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{
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2012-05-22 17:40:24 +08:00
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struct sch56xx_watchdog_data *data = watchdog_get_drvdata(wddev);
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2012-03-18 20:05:08 +08:00
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int ret;
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u8 val;
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/*
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* The sch56xx's watchdog cannot really be started / stopped
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* it is always running, but we can avoid the timer expiring
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* from causing a system reset by clearing the output enable bit.
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*
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* The sch56xx's watchdog will set the watchdog event bit, bit 0
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* of the second interrupt source register (at base-address + 9),
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* when the timer expires.
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*
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* This will only cause a system reset if the 0-1 flank happens when
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* output enable is true. Setting output enable after the flank will
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* not cause a reset, nor will the timer expiring a second time.
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* This means we must clear the watchdog event bit in case it is set.
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*
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* The timer may still be running (after a recent watchdog_stop) and
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* mere milliseconds away from expiring, so the timer must be reset
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* first!
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*/
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mutex_lock(data->io_lock);
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/* 1. Reset the watchdog countdown counter */
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ret = sch56xx_write_virtual_reg(data->addr, SCH56XX_REG_WDOG_PRESET,
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data->watchdog_preset);
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if (ret)
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goto leave;
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2012-05-22 17:40:25 +08:00
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/* 2. Enable output */
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val = data->watchdog_output_enable | SCH56XX_WDOG_OUTPUT_ENABLE;
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ret = sch56xx_write_virtual_reg(data->addr,
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SCH56XX_REG_WDOG_OUTPUT_ENABLE, val);
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if (ret)
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goto leave;
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2012-03-18 20:05:08 +08:00
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2012-05-22 17:40:25 +08:00
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data->watchdog_output_enable = val;
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2012-03-18 20:05:08 +08:00
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|
/* 3. Clear the watchdog event bit if set */
|
|
|
|
val = inb(data->addr + 9);
|
|
|
|
if (val & 0x01)
|
|
|
|
outb(0x01, data->addr + 9);
|
|
|
|
|
|
|
|
leave:
|
|
|
|
mutex_unlock(data->io_lock);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2012-05-22 17:40:24 +08:00
|
|
|
static int watchdog_trigger(struct watchdog_device *wddev)
|
2012-03-18 20:05:08 +08:00
|
|
|
{
|
2012-05-22 17:40:24 +08:00
|
|
|
struct sch56xx_watchdog_data *data = watchdog_get_drvdata(wddev);
|
2012-03-18 20:05:08 +08:00
|
|
|
int ret;
|
|
|
|
|
|
|
|
/* Reset the watchdog countdown counter */
|
|
|
|
mutex_lock(data->io_lock);
|
|
|
|
ret = sch56xx_write_virtual_reg(data->addr, SCH56XX_REG_WDOG_PRESET,
|
|
|
|
data->watchdog_preset);
|
|
|
|
mutex_unlock(data->io_lock);
|
2012-05-22 17:40:24 +08:00
|
|
|
|
2012-03-18 20:05:08 +08:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2012-05-22 17:40:24 +08:00
|
|
|
static int watchdog_stop(struct watchdog_device *wddev)
|
2012-03-18 20:05:08 +08:00
|
|
|
{
|
2012-05-22 17:40:24 +08:00
|
|
|
struct sch56xx_watchdog_data *data = watchdog_get_drvdata(wddev);
|
2012-03-18 20:05:08 +08:00
|
|
|
int ret = 0;
|
|
|
|
u8 val;
|
|
|
|
|
2012-05-22 17:40:25 +08:00
|
|
|
val = data->watchdog_output_enable & ~SCH56XX_WDOG_OUTPUT_ENABLE;
|
|
|
|
mutex_lock(data->io_lock);
|
|
|
|
ret = sch56xx_write_virtual_reg(data->addr,
|
|
|
|
SCH56XX_REG_WDOG_OUTPUT_ENABLE, val);
|
|
|
|
mutex_unlock(data->io_lock);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
2012-03-18 20:05:08 +08:00
|
|
|
|
2012-05-22 17:40:25 +08:00
|
|
|
data->watchdog_output_enable = val;
|
|
|
|
return 0;
|
2012-03-18 20:05:08 +08:00
|
|
|
}
|
|
|
|
|
2012-05-22 17:40:24 +08:00
|
|
|
static const struct watchdog_ops watchdog_ops = {
|
|
|
|
.owner = THIS_MODULE,
|
|
|
|
.start = watchdog_start,
|
|
|
|
.stop = watchdog_stop,
|
|
|
|
.ping = watchdog_trigger,
|
|
|
|
.set_timeout = watchdog_set_timeout,
|
2012-03-18 20:05:08 +08:00
|
|
|
};
|
|
|
|
|
2021-05-08 21:14:54 +08:00
|
|
|
void sch56xx_watchdog_register(struct device *parent, u16 addr, u32 revision,
|
|
|
|
struct mutex *io_lock, int check_enabled)
|
2012-03-18 20:05:08 +08:00
|
|
|
{
|
|
|
|
struct sch56xx_watchdog_data *data;
|
2012-05-22 17:40:24 +08:00
|
|
|
int err, control, output_enable;
|
2012-03-18 20:05:08 +08:00
|
|
|
|
|
|
|
/* Cache the watchdog registers */
|
|
|
|
mutex_lock(io_lock);
|
|
|
|
control =
|
|
|
|
sch56xx_read_virtual_reg(addr, SCH56XX_REG_WDOG_CONTROL);
|
|
|
|
output_enable =
|
|
|
|
sch56xx_read_virtual_reg(addr, SCH56XX_REG_WDOG_OUTPUT_ENABLE);
|
|
|
|
mutex_unlock(io_lock);
|
|
|
|
|
|
|
|
if (control < 0)
|
2021-05-08 21:14:54 +08:00
|
|
|
return;
|
2012-03-18 20:05:08 +08:00
|
|
|
if (output_enable < 0)
|
2021-05-08 21:14:54 +08:00
|
|
|
return;
|
2012-03-18 20:05:08 +08:00
|
|
|
if (check_enabled && !(output_enable & SCH56XX_WDOG_OUTPUT_ENABLE)) {
|
|
|
|
pr_warn("Watchdog not enabled by BIOS, not registering\n");
|
2021-05-08 21:14:54 +08:00
|
|
|
return;
|
2012-03-18 20:05:08 +08:00
|
|
|
}
|
|
|
|
|
2021-05-08 21:14:54 +08:00
|
|
|
data = devm_kzalloc(parent, sizeof(struct sch56xx_watchdog_data), GFP_KERNEL);
|
2012-03-18 20:05:08 +08:00
|
|
|
if (!data)
|
2021-05-08 21:14:54 +08:00
|
|
|
return;
|
2012-03-18 20:05:08 +08:00
|
|
|
|
|
|
|
data->addr = addr;
|
|
|
|
data->io_lock = io_lock;
|
|
|
|
|
2021-05-08 21:14:55 +08:00
|
|
|
strscpy(data->wdinfo.identity, "sch56xx watchdog", sizeof(data->wdinfo.identity));
|
2012-05-22 17:40:24 +08:00
|
|
|
data->wdinfo.firmware_version = revision;
|
|
|
|
data->wdinfo.options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT;
|
|
|
|
if (!nowayout)
|
|
|
|
data->wdinfo.options |= WDIOF_MAGICCLOSE;
|
|
|
|
|
|
|
|
data->wddev.info = &data->wdinfo;
|
|
|
|
data->wddev.ops = &watchdog_ops;
|
|
|
|
data->wddev.parent = parent;
|
|
|
|
data->wddev.timeout = 60;
|
|
|
|
data->wddev.min_timeout = 1;
|
|
|
|
data->wddev.max_timeout = 255 * 60;
|
2021-05-08 21:14:56 +08:00
|
|
|
watchdog_set_nowayout(&data->wddev, nowayout);
|
2012-05-22 17:40:24 +08:00
|
|
|
if (output_enable & SCH56XX_WDOG_OUTPUT_ENABLE)
|
2022-02-01 05:19:35 +08:00
|
|
|
set_bit(WDOG_HW_RUNNING, &data->wddev.status);
|
2012-05-22 17:40:24 +08:00
|
|
|
|
|
|
|
/* Since the watchdog uses a downcounter there is no register to read
|
|
|
|
the BIOS set timeout from (if any was set at all) ->
|
|
|
|
Choose a preset which will give us a 1 minute timeout */
|
|
|
|
if (control & SCH56XX_WDOG_TIME_BASE_SEC)
|
|
|
|
data->watchdog_preset = 60; /* seconds */
|
|
|
|
else
|
|
|
|
data->watchdog_preset = 1; /* minute */
|
2012-03-18 20:05:08 +08:00
|
|
|
|
2012-05-22 17:40:24 +08:00
|
|
|
data->watchdog_control = control;
|
|
|
|
data->watchdog_output_enable = output_enable;
|
2012-03-18 20:05:08 +08:00
|
|
|
|
2012-05-22 17:40:24 +08:00
|
|
|
watchdog_set_drvdata(&data->wddev, data);
|
2021-05-08 21:14:54 +08:00
|
|
|
err = devm_watchdog_register_device(parent, &data->wddev);
|
2012-03-18 20:05:08 +08:00
|
|
|
if (err) {
|
|
|
|
pr_err("Registering watchdog chardev: %d\n", err);
|
2021-05-08 21:14:54 +08:00
|
|
|
devm_kfree(parent, data);
|
2012-03-18 20:05:08 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(sch56xx_watchdog_register);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* platform dev find, add and remove functions
|
|
|
|
*/
|
|
|
|
|
2012-08-05 00:54:16 +08:00
|
|
|
static int __init sch56xx_find(int sioaddr, const char **name)
|
2011-07-26 03:46:09 +08:00
|
|
|
{
|
|
|
|
u8 devid;
|
2012-08-05 00:54:16 +08:00
|
|
|
unsigned short address;
|
2011-07-26 03:46:09 +08:00
|
|
|
int err;
|
|
|
|
|
|
|
|
err = superio_enter(sioaddr);
|
|
|
|
if (err)
|
|
|
|
return err;
|
|
|
|
|
|
|
|
devid = superio_inb(sioaddr, SIO_REG_DEVID);
|
|
|
|
switch (devid) {
|
|
|
|
case SIO_SCH5627_ID:
|
|
|
|
*name = "sch5627";
|
|
|
|
break;
|
2011-07-26 03:46:09 +08:00
|
|
|
case SIO_SCH5636_ID:
|
|
|
|
*name = "sch5636";
|
|
|
|
break;
|
2011-07-26 03:46:09 +08:00
|
|
|
default:
|
|
|
|
pr_debug("Unsupported device id: 0x%02x\n",
|
|
|
|
(unsigned int)devid);
|
|
|
|
err = -ENODEV;
|
|
|
|
goto exit;
|
|
|
|
}
|
|
|
|
|
|
|
|
superio_select(sioaddr, SIO_SCH56XX_LD_EM);
|
|
|
|
|
|
|
|
if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) {
|
|
|
|
pr_warn("Device not activated\n");
|
|
|
|
err = -ENODEV;
|
|
|
|
goto exit;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Warning the order of the low / high byte is the other way around
|
|
|
|
* as on most other superio devices!!
|
|
|
|
*/
|
2012-08-05 00:54:16 +08:00
|
|
|
address = superio_inb(sioaddr, SIO_REG_ADDR) |
|
2011-07-26 03:46:09 +08:00
|
|
|
superio_inb(sioaddr, SIO_REG_ADDR + 1) << 8;
|
2012-08-05 00:54:16 +08:00
|
|
|
if (address == 0) {
|
2011-07-26 03:46:09 +08:00
|
|
|
pr_warn("Base address not set\n");
|
|
|
|
err = -ENODEV;
|
|
|
|
goto exit;
|
|
|
|
}
|
2012-08-05 00:54:16 +08:00
|
|
|
err = address;
|
2011-07-26 03:46:09 +08:00
|
|
|
|
|
|
|
exit:
|
|
|
|
superio_exit(sioaddr);
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
2012-08-05 00:54:16 +08:00
|
|
|
static int __init sch56xx_device_add(int address, const char *name)
|
2011-07-26 03:46:09 +08:00
|
|
|
{
|
|
|
|
struct resource res = {
|
|
|
|
.start = address,
|
|
|
|
.end = address + REGION_LENGTH - 1,
|
2021-05-08 21:14:57 +08:00
|
|
|
.name = name,
|
2011-07-26 03:46:09 +08:00
|
|
|
.flags = IORESOURCE_IO,
|
|
|
|
};
|
|
|
|
int err;
|
|
|
|
|
|
|
|
err = acpi_check_resource_conflict(&res);
|
|
|
|
if (err)
|
2021-05-08 21:14:57 +08:00
|
|
|
return err;
|
2011-07-26 03:46:09 +08:00
|
|
|
|
2021-05-08 21:14:57 +08:00
|
|
|
sch56xx_pdev = platform_device_register_simple(name, -1, &res, 1);
|
2011-07-26 03:46:09 +08:00
|
|
|
|
2021-05-08 21:14:57 +08:00
|
|
|
return PTR_ERR_OR_ZERO(sch56xx_pdev);
|
2011-07-26 03:46:09 +08:00
|
|
|
}
|
|
|
|
|
2022-02-01 05:19:33 +08:00
|
|
|
/* For autoloading only */
|
|
|
|
static const struct dmi_system_id sch56xx_dmi_table[] __initconst = {
|
|
|
|
{
|
|
|
|
.matches = {
|
|
|
|
DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
|
|
|
|
},
|
|
|
|
},
|
|
|
|
{ }
|
|
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(dmi, sch56xx_dmi_table);
|
|
|
|
|
2011-07-26 03:46:09 +08:00
|
|
|
static int __init sch56xx_init(void)
|
|
|
|
{
|
2012-08-05 00:54:16 +08:00
|
|
|
const char *name = NULL;
|
2022-02-01 05:19:33 +08:00
|
|
|
int address;
|
2012-08-05 00:54:16 +08:00
|
|
|
|
2022-02-01 05:19:33 +08:00
|
|
|
if (!ignore_dmi) {
|
|
|
|
if (!dmi_check_system(sch56xx_dmi_table))
|
|
|
|
return -ENODEV;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Some machines like the Esprimo P720 and Esprimo C700 have
|
|
|
|
* onboard devices named " Antiope"/" Theseus" instead of
|
|
|
|
* "Antiope"/"Theseus", so we need to check for both.
|
|
|
|
*/
|
|
|
|
if (!dmi_find_device(DMI_DEV_TYPE_OTHER, "Antiope", NULL) &&
|
|
|
|
!dmi_find_device(DMI_DEV_TYPE_OTHER, " Antiope", NULL) &&
|
|
|
|
!dmi_find_device(DMI_DEV_TYPE_OTHER, "Theseus", NULL) &&
|
|
|
|
!dmi_find_device(DMI_DEV_TYPE_OTHER, " Theseus", NULL))
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Some devices like the Esprimo C700 have both onboard devices,
|
|
|
|
* so we still have to check manually
|
|
|
|
*/
|
2012-08-05 00:54:16 +08:00
|
|
|
address = sch56xx_find(0x4e, &name);
|
|
|
|
if (address < 0)
|
|
|
|
address = sch56xx_find(0x2e, &name);
|
|
|
|
if (address < 0)
|
|
|
|
return address;
|
2011-07-26 03:46:09 +08:00
|
|
|
|
|
|
|
return sch56xx_device_add(address, name);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void __exit sch56xx_exit(void)
|
|
|
|
{
|
|
|
|
platform_device_unregister(sch56xx_pdev);
|
|
|
|
}
|
|
|
|
|
|
|
|
MODULE_DESCRIPTION("SMSC SCH56xx Hardware Monitoring Common Code");
|
|
|
|
MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
|
|
|
|
MODULE_LICENSE("GPL");
|
|
|
|
|
|
|
|
module_init(sch56xx_init);
|
|
|
|
module_exit(sch56xx_exit);
|