2020-02-28 18:11:40 +08:00
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2020, The Linux Foundation. All rights reserved.
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*/
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#ifndef __DRIVERS_INTERCONNECT_QCOM_ICC_RPMH_H__
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#define __DRIVERS_INTERCONNECT_QCOM_ICC_RPMH_H__
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2020-09-04 03:21:45 +08:00
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#include <dt-bindings/interconnect/qcom,icc.h>
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2020-02-28 18:11:40 +08:00
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#define to_qcom_provider(_provider) \
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container_of(_provider, struct qcom_icc_provider, provider)
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/**
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* struct qcom_icc_provider - Qualcomm specific interconnect provider
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* @provider: generic interconnect provider
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* @dev: reference to the NoC device
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* @bcms: list of bcms that maps to the provider
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* @num_bcms: number of @bcms
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* @voter: bcm voter targeted by this provider
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*/
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struct qcom_icc_provider {
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struct icc_provider provider;
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struct device *dev;
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struct qcom_icc_bcm **bcms;
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size_t num_bcms;
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struct bcm_voter *voter;
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};
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/**
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* struct bcm_db - Auxiliary data pertaining to each Bus Clock Manager (BCM)
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* @unit: divisor used to convert bytes/sec bw value to an RPMh msg
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* @width: multiplier used to convert bytes/sec bw value to an RPMh msg
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* @vcd: virtual clock domain that this bcm belongs to
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* @reserved: reserved field
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*/
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struct bcm_db {
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__le32 unit;
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__le16 width;
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u8 vcd;
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u8 reserved;
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};
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#define MAX_LINKS 128
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#define MAX_BCMS 64
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#define MAX_BCM_PER_NODE 3
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#define MAX_VCD 10
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/**
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* struct qcom_icc_node - Qualcomm specific interconnect nodes
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* @name: the node name used in debugfs
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* @links: an array of nodes where we can go next while traversing
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* @id: a unique node identifier
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* @num_links: the total number of @links
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* @channels: num of channels at this node
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* @buswidth: width of the interconnect between a node and the bus
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* @sum_avg: current sum aggregate value of all avg bw requests
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* @max_peak: current max aggregate value of all peak bw requests
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* @bcms: list of bcms associated with this logical node
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* @num_bcms: num of @bcms
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*/
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struct qcom_icc_node {
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const char *name;
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u16 links[MAX_LINKS];
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u16 id;
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u16 num_links;
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u16 channels;
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u16 buswidth;
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u64 sum_avg[QCOM_ICC_NUM_BUCKETS];
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u64 max_peak[QCOM_ICC_NUM_BUCKETS];
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struct qcom_icc_bcm *bcms[MAX_BCM_PER_NODE];
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size_t num_bcms;
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};
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/**
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* struct qcom_icc_bcm - Qualcomm specific hardware accelerator nodes
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* known as Bus Clock Manager (BCM)
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* @name: the bcm node name used to fetch BCM data from command db
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* @type: latency or bandwidth bcm
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* @addr: address offsets used when voting to RPMH
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* @vote_x: aggregated threshold values, represents sum_bw when @type is bw bcm
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* @vote_y: aggregated threshold values, represents peak_bw when @type is bw bcm
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2020-09-04 03:21:49 +08:00
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* @vote_scale: scaling factor for vote_x and vote_y
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2020-02-28 18:11:40 +08:00
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* @dirty: flag used to indicate whether the bcm needs to be committed
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* @keepalive: flag used to indicate whether a keepalive is required
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* @aux_data: auxiliary data used when calculating threshold values and
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* communicating with RPMh
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* @list: used to link to other bcms when compiling lists for commit
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* @ws_list: used to keep track of bcms that may transition between wake/sleep
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* @num_nodes: total number of @num_nodes
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* @nodes: list of qcom_icc_nodes that this BCM encapsulates
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*/
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struct qcom_icc_bcm {
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const char *name;
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u32 type;
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u32 addr;
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u64 vote_x[QCOM_ICC_NUM_BUCKETS];
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u64 vote_y[QCOM_ICC_NUM_BUCKETS];
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2020-09-04 03:21:49 +08:00
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u64 vote_scale;
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2020-02-28 18:11:40 +08:00
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bool dirty;
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bool keepalive;
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struct bcm_db aux_data;
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struct list_head list;
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struct list_head ws_list;
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size_t num_nodes;
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struct qcom_icc_node *nodes[];
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};
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struct qcom_icc_fabric {
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struct qcom_icc_node **nodes;
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size_t num_nodes;
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};
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struct qcom_icc_desc {
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struct qcom_icc_node **nodes;
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size_t num_nodes;
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struct qcom_icc_bcm **bcms;
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size_t num_bcms;
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};
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#define DEFINE_QNODE(_name, _id, _channels, _buswidth, ...) \
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static struct qcom_icc_node _name = { \
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.id = _id, \
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.name = #_name, \
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.channels = _channels, \
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.buswidth = _buswidth, \
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.num_links = ARRAY_SIZE(((int[]){ __VA_ARGS__ })), \
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.links = { __VA_ARGS__ }, \
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}
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int qcom_icc_aggregate(struct icc_node *node, u32 tag, u32 avg_bw,
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u32 peak_bw, u32 *agg_avg, u32 *agg_peak);
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int qcom_icc_set(struct icc_node *src, struct icc_node *dst);
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2020-09-03 21:31:30 +08:00
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struct icc_node_data *qcom_icc_xlate_extended(struct of_phandle_args *spec, void *data);
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2020-02-28 18:11:40 +08:00
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int qcom_icc_bcm_init(struct qcom_icc_bcm *bcm, struct device *dev);
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void qcom_icc_pre_aggregate(struct icc_node *node);
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#endif
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