2018-09-05 14:25:18 +08:00
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/* SPDX-License-Identifier: GPL-2.0 */
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// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
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#include <linux/linkage.h>
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#include "sysdep.h"
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.weak memmove
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ENTRY(__memmove)
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ENTRY(memmove)
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subu r3, r0, r1
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cmphs r3, r2
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bt memcpy
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mov r12, r0
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addu r0, r0, r2
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addu r1, r1, r2
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/* Test if len less than 4 bytes. */
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cmplti r2, 4
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bt .L_copy_by_byte
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andi r13, r0, 3
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/* Test if dest is not 4 bytes aligned. */
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bnez r13, .L_dest_not_aligned
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/* Hardware can handle unaligned access directly. */
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.L_dest_aligned:
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/* If dest is aligned, then copy. */
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zext r18, r2, 31, 4
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/* Test if len less than 16 bytes. */
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bez r18, .L_len_less_16bytes
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movi r19, 0
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/* len > 16 bytes */
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LABLE_ALIGN
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.L_len_larger_16bytes:
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subi r1, 16
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subi r0, 16
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2019-02-19 12:32:41 +08:00
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#if defined(__CK860__)
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2018-09-05 14:25:18 +08:00
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ldw r3, (r1, 12)
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stw r3, (r0, 12)
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ldw r3, (r1, 8)
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stw r3, (r0, 8)
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ldw r3, (r1, 4)
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stw r3, (r0, 4)
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ldw r3, (r1, 0)
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stw r3, (r0, 0)
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#else
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ldw r20, (r1, 0)
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ldw r21, (r1, 4)
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ldw r22, (r1, 8)
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ldw r23, (r1, 12)
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stw r20, (r0, 0)
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stw r21, (r0, 4)
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stw r22, (r0, 8)
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stw r23, (r0, 12)
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PRE_BNEZAD (r18)
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#endif
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BNEZAD (r18, .L_len_larger_16bytes)
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.L_len_less_16bytes:
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zext r18, r2, 3, 2
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bez r18, .L_copy_by_byte
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.L_len_less_16bytes_loop:
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subi r1, 4
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subi r0, 4
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ldw r3, (r1, 0)
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PRE_BNEZAD (r18)
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stw r3, (r0, 0)
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BNEZAD (r18, .L_len_less_16bytes_loop)
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/* Test if len less than 4 bytes. */
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.L_copy_by_byte:
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zext r18, r2, 1, 0
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bez r18, .L_return
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.L_copy_by_byte_loop:
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subi r1, 1
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subi r0, 1
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ldb r3, (r1, 0)
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PRE_BNEZAD (r18)
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stb r3, (r0, 0)
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BNEZAD (r18, .L_copy_by_byte_loop)
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.L_return:
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mov r0, r12
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rts
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/* If dest is not aligned, just copy some bytes makes the dest
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align. */
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.L_dest_not_aligned:
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sub r2, r13
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.L_dest_not_aligned_loop:
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subi r1, 1
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subi r0, 1
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/* Makes the dest align. */
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ldb r3, (r1, 0)
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PRE_BNEZAD (r13)
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stb r3, (r0, 0)
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BNEZAD (r13, .L_dest_not_aligned_loop)
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cmplti r2, 4
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bt .L_copy_by_byte
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/* Check whether the src is aligned. */
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jbr .L_dest_aligned
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ENDPROC(memmove)
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ENDPROC(__memmove)
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