2019-05-30 07:57:59 +08:00
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// SPDX-License-Identifier: GPL-2.0-only
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2015-09-30 08:39:17 +08:00
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/*
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* amdtp-dot.c - a part of driver for Digidesign Digi 002/003 family
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*
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* Copyright (c) 2014-2015 Takashi Sakamoto
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* Copyright (C) 2012 Robin Gareus <robin@gareus.org>
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* Copyright (C) 2012 Damien Zammit <damien@zamaudio.com>
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*/
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#include <sound/pcm.h>
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#include "digi00x.h"
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#define CIP_FMT_AM 0x10
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/* 'Clock-based rate control mode' is just supported. */
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#define AMDTP_FDF_AM824 0x00
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2015-10-11 11:30:15 +08:00
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/*
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* Nominally 3125 bytes/second, but the MIDI port's clock might be
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* 1% too slow, and the bus clock 100 ppm too fast.
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*/
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#define MIDI_BYTES_PER_SECOND 3093
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/*
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* Several devices look only at the first eight data blocks.
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* In any case, this is more than enough for the MIDI data rate.
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*/
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#define MAX_MIDI_RX_BLOCKS 8
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2017-04-02 22:48:25 +08:00
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/* 3 = MAX(DOT_MIDI_IN_PORTS, DOT_MIDI_OUT_PORTS) + 1. */
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#define MAX_MIDI_PORTS 3
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2015-09-30 08:39:17 +08:00
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/*
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* The double-oh-three algorithm was discovered by Robin Gareus and Damien
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* Zammit in 2012, with reverse-engineering for Digi 003 Rack.
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*/
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struct dot_state {
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2015-10-11 11:30:14 +08:00
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u8 carry;
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u8 idx;
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2015-09-30 08:39:17 +08:00
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unsigned int off;
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};
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struct amdtp_dot {
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unsigned int pcm_channels;
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struct dot_state state;
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2017-04-02 22:48:25 +08:00
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struct snd_rawmidi_substream *midi[MAX_MIDI_PORTS];
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int midi_fifo_used[MAX_MIDI_PORTS];
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2015-10-11 11:30:15 +08:00
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int midi_fifo_limit;
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2015-09-30 08:39:17 +08:00
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};
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/*
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* double-oh-three look up table
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*
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* @param idx index byte (audio-sample data) 0x00..0xff
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* @param off channel offset shift
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* @return salt to XOR with given data
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*/
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#define BYTE_PER_SAMPLE (4)
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#define MAGIC_DOT_BYTE (2)
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#define MAGIC_BYTE_OFF(x) (((x) * BYTE_PER_SAMPLE) + MAGIC_DOT_BYTE)
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2016-02-07 22:14:15 +08:00
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static u8 dot_scrt(const u8 idx, const unsigned int off)
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2015-09-30 08:39:17 +08:00
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{
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/*
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* the length of the added pattern only depends on the lower nibble
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* of the last non-zero data
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*/
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2015-10-11 11:30:14 +08:00
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static const u8 len[16] = {0, 1, 3, 5, 7, 9, 11, 13, 14,
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12, 10, 8, 6, 4, 2, 0};
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2015-09-30 08:39:17 +08:00
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/*
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* the lower nibble of the salt. Interleaved sequence.
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* this is walked backwards according to len[]
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*/
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2015-10-11 11:30:14 +08:00
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static const u8 nib[15] = {0x8, 0x7, 0x9, 0x6, 0xa, 0x5, 0xb, 0x4,
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0xc, 0x3, 0xd, 0x2, 0xe, 0x1, 0xf};
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2015-09-30 08:39:17 +08:00
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/* circular list for the salt's hi nibble. */
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2015-10-11 11:30:14 +08:00
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static const u8 hir[15] = {0x0, 0x6, 0xf, 0x8, 0x7, 0x5, 0x3, 0x4,
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0xc, 0xd, 0xe, 0x1, 0x2, 0xb, 0xa};
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2015-09-30 08:39:17 +08:00
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/*
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* start offset for upper nibble mapping.
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* note: 9 is /special/. In the case where the high nibble == 0x9,
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* hir[] is not used and - coincidentally - the salt's hi nibble is
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* 0x09 regardless of the offset.
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*/
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2015-10-11 11:30:14 +08:00
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static const u8 hio[16] = {0, 11, 12, 6, 7, 5, 1, 4,
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3, 0x00, 14, 13, 8, 9, 10, 2};
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2015-09-30 08:39:17 +08:00
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2015-10-11 11:30:14 +08:00
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const u8 ln = idx & 0xf;
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const u8 hn = (idx >> 4) & 0xf;
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const u8 hr = (hn == 0x9) ? 0x9 : hir[(hio[hn] + off) % 15];
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2015-09-30 08:39:17 +08:00
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if (len[ln] < off)
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return 0x00;
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return ((nib[14 + off - len[ln]]) | (hr << 4));
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}
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static void dot_encode_step(struct dot_state *state, __be32 *const buffer)
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{
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2015-10-11 11:30:14 +08:00
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u8 * const data = (u8 *) buffer;
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2015-09-30 08:39:17 +08:00
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if (data[MAGIC_DOT_BYTE] != 0x00) {
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state->off = 0;
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state->idx = data[MAGIC_DOT_BYTE] ^ state->carry;
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}
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data[MAGIC_DOT_BYTE] ^= state->carry;
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state->carry = dot_scrt(state->idx, ++(state->off));
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}
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int amdtp_dot_set_parameters(struct amdtp_stream *s, unsigned int rate,
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2015-10-11 11:30:15 +08:00
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unsigned int pcm_channels)
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2015-09-30 08:39:17 +08:00
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{
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struct amdtp_dot *p = s->protocol;
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int err;
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if (amdtp_stream_running(s))
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return -EBUSY;
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/*
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2017-04-02 22:48:25 +08:00
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* A first data channel is for MIDI messages, the rest is Multi Bit
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* Linear Audio data channel.
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2015-09-30 08:39:17 +08:00
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*/
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err = amdtp_stream_set_parameters(s, rate, pcm_channels + 1);
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if (err < 0)
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return err;
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2019-05-21 22:57:34 +08:00
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s->ctx_data.rx.fdf = AMDTP_FDF_AM824 | s->sfc;
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2015-09-30 08:39:17 +08:00
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p->pcm_channels = pcm_channels;
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2015-10-11 11:30:15 +08:00
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/*
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* We do not know the actual MIDI FIFO size of most devices. Just
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* assume two bytes, i.e., one byte can be received over the bus while
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* the previous one is transmitted over MIDI.
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* (The value here is adjusted for midi_ratelimit_per_packet().)
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*/
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p->midi_fifo_limit = rate - MIDI_BYTES_PER_SECOND * s->syt_interval + 1;
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2015-09-30 08:39:17 +08:00
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return 0;
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}
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static void write_pcm_s32(struct amdtp_stream *s, struct snd_pcm_substream *pcm,
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2019-07-22 11:37:05 +08:00
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__be32 *buffer, unsigned int frames,
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unsigned int pcm_frames)
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2015-09-30 08:39:17 +08:00
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{
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struct amdtp_dot *p = s->protocol;
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2019-07-22 11:37:05 +08:00
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unsigned int channels = p->pcm_channels;
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2015-09-30 08:39:17 +08:00
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struct snd_pcm_runtime *runtime = pcm->runtime;
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2019-07-22 11:37:05 +08:00
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unsigned int pcm_buffer_pointer;
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int remaining_frames;
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2015-09-30 08:39:17 +08:00
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const u32 *src;
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2019-07-22 11:37:05 +08:00
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int i, c;
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pcm_buffer_pointer = s->pcm_buffer_pointer + pcm_frames;
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pcm_buffer_pointer %= runtime->buffer_size;
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2015-09-30 08:39:17 +08:00
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src = (void *)runtime->dma_area +
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2019-07-22 11:37:05 +08:00
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frames_to_bytes(runtime, pcm_buffer_pointer);
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remaining_frames = runtime->buffer_size - pcm_buffer_pointer;
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2015-09-30 08:39:17 +08:00
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buffer++;
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for (i = 0; i < frames; ++i) {
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for (c = 0; c < channels; ++c) {
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buffer[c] = cpu_to_be32((*src >> 8) | 0x40000000);
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dot_encode_step(&p->state, &buffer[c]);
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src++;
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}
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buffer += s->data_block_quadlets;
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if (--remaining_frames == 0)
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src = (void *)runtime->dma_area;
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}
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}
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static void read_pcm_s32(struct amdtp_stream *s, struct snd_pcm_substream *pcm,
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2019-07-22 11:37:05 +08:00
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__be32 *buffer, unsigned int frames,
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unsigned int pcm_frames)
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2015-09-30 08:39:17 +08:00
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{
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struct amdtp_dot *p = s->protocol;
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2019-07-22 11:37:05 +08:00
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unsigned int channels = p->pcm_channels;
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2015-09-30 08:39:17 +08:00
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struct snd_pcm_runtime *runtime = pcm->runtime;
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2019-07-22 11:37:05 +08:00
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unsigned int pcm_buffer_pointer;
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int remaining_frames;
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2015-09-30 08:39:17 +08:00
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u32 *dst;
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2019-07-22 11:37:05 +08:00
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int i, c;
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pcm_buffer_pointer = s->pcm_buffer_pointer + pcm_frames;
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pcm_buffer_pointer %= runtime->buffer_size;
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2015-09-30 08:39:17 +08:00
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dst = (void *)runtime->dma_area +
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2019-07-22 11:37:05 +08:00
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frames_to_bytes(runtime, pcm_buffer_pointer);
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remaining_frames = runtime->buffer_size - pcm_buffer_pointer;
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2015-09-30 08:39:17 +08:00
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buffer++;
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for (i = 0; i < frames; ++i) {
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for (c = 0; c < channels; ++c) {
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*dst = be32_to_cpu(buffer[c]) << 8;
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dst++;
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}
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buffer += s->data_block_quadlets;
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if (--remaining_frames == 0)
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dst = (void *)runtime->dma_area;
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}
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}
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static void write_pcm_silence(struct amdtp_stream *s, __be32 *buffer,
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unsigned int data_blocks)
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{
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struct amdtp_dot *p = s->protocol;
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unsigned int channels, i, c;
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channels = p->pcm_channels;
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buffer++;
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for (i = 0; i < data_blocks; ++i) {
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for (c = 0; c < channels; ++c)
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buffer[c] = cpu_to_be32(0x40000000);
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buffer += s->data_block_quadlets;
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}
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}
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2015-10-11 11:30:15 +08:00
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static bool midi_ratelimit_per_packet(struct amdtp_stream *s, unsigned int port)
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{
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struct amdtp_dot *p = s->protocol;
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int used;
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used = p->midi_fifo_used[port];
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if (used == 0)
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return true;
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used -= MIDI_BYTES_PER_SECOND * s->syt_interval;
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used = max(used, 0);
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p->midi_fifo_used[port] = used;
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return used < p->midi_fifo_limit;
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}
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static inline void midi_use_bytes(struct amdtp_stream *s,
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unsigned int port, unsigned int count)
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{
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struct amdtp_dot *p = s->protocol;
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p->midi_fifo_used[port] += amdtp_rate_table[s->sfc] * count;
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}
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static void write_midi_messages(struct amdtp_stream *s, __be32 *buffer,
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2019-07-22 11:36:53 +08:00
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unsigned int data_blocks, unsigned int data_block_counter)
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2015-10-11 11:30:15 +08:00
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{
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struct amdtp_dot *p = s->protocol;
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unsigned int f, port;
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int len;
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u8 *b;
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for (f = 0; f < data_blocks; f++) {
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2019-07-22 11:36:53 +08:00
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port = (data_block_counter + f) % 8;
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2015-10-11 11:30:15 +08:00
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b = (u8 *)&buffer[0];
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len = 0;
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2017-04-02 22:48:25 +08:00
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if (port < MAX_MIDI_PORTS &&
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2015-10-11 11:30:15 +08:00
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midi_ratelimit_per_packet(s, port) &&
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p->midi[port] != NULL)
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len = snd_rawmidi_transmit(p->midi[port], b + 1, 2);
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if (len > 0) {
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2017-04-02 22:48:25 +08:00
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/*
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* Upper 4 bits of LSB represent port number.
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* - 0000b: physical MIDI port 1.
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* - 0010b: physical MIDI port 2.
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* - 1110b: console MIDI port.
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*/
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if (port == 2)
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b[3] = 0xe0;
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else if (port == 1)
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b[3] = 0x20;
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else
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b[3] = 0x00;
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b[3] |= len;
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2015-10-11 11:30:15 +08:00
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midi_use_bytes(s, port, len);
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} else {
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b[1] = 0;
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b[2] = 0;
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b[3] = 0;
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}
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b[0] = 0x80;
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buffer += s->data_block_quadlets;
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}
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}
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static void read_midi_messages(struct amdtp_stream *s, __be32 *buffer,
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unsigned int data_blocks)
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{
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struct amdtp_dot *p = s->protocol;
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unsigned int f, port, len;
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u8 *b;
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for (f = 0; f < data_blocks; f++) {
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b = (u8 *)&buffer[0];
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2017-04-02 22:48:25 +08:00
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len = b[3] & 0x0f;
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if (len > 0) {
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/*
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* Upper 4 bits of LSB represent port number.
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* - 0000b: physical MIDI port 1. Use port 0.
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* - 1110b: console MIDI port. Use port 2.
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*/
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if (b[3] >> 4 > 0)
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port = 2;
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else
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port = 0;
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if (port < MAX_MIDI_PORTS && p->midi[port])
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snd_rawmidi_receive(p->midi[port], b + 1, len);
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}
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2015-10-11 11:30:15 +08:00
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buffer += s->data_block_quadlets;
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}
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}
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2015-09-30 08:39:17 +08:00
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int amdtp_dot_add_pcm_hw_constraints(struct amdtp_stream *s,
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struct snd_pcm_runtime *runtime)
|
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{
|
|
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int err;
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/* This protocol delivers 24 bit data in 32bit data channel. */
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err = snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
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if (err < 0)
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return err;
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return amdtp_stream_add_pcm_hw_constraints(s, runtime);
|
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}
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2015-10-11 11:30:15 +08:00
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void amdtp_dot_midi_trigger(struct amdtp_stream *s, unsigned int port,
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struct snd_rawmidi_substream *midi)
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{
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struct amdtp_dot *p = s->protocol;
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2017-04-02 22:48:25 +08:00
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if (port < MAX_MIDI_PORTS)
|
locking/atomics: COCCINELLE/treewide: Convert trivial ACCESS_ONCE() patterns to READ_ONCE()/WRITE_ONCE()
Please do not apply this to mainline directly, instead please re-run the
coccinelle script shown below and apply its output.
For several reasons, it is desirable to use {READ,WRITE}_ONCE() in
preference to ACCESS_ONCE(), and new code is expected to use one of the
former. So far, there's been no reason to change most existing uses of
ACCESS_ONCE(), as these aren't harmful, and changing them results in
churn.
However, for some features, the read/write distinction is critical to
correct operation. To distinguish these cases, separate read/write
accessors must be used. This patch migrates (most) remaining
ACCESS_ONCE() instances to {READ,WRITE}_ONCE(), using the following
coccinelle script:
----
// Convert trivial ACCESS_ONCE() uses to equivalent READ_ONCE() and
// WRITE_ONCE()
// $ make coccicheck COCCI=/home/mark/once.cocci SPFLAGS="--include-headers" MODE=patch
virtual patch
@ depends on patch @
expression E1, E2;
@@
- ACCESS_ONCE(E1) = E2
+ WRITE_ONCE(E1, E2)
@ depends on patch @
expression E;
@@
- ACCESS_ONCE(E)
+ READ_ONCE(E)
----
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: davem@davemloft.net
Cc: linux-arch@vger.kernel.org
Cc: mpe@ellerman.id.au
Cc: shuah@kernel.org
Cc: snitzer@redhat.com
Cc: thor.thayer@linux.intel.com
Cc: tj@kernel.org
Cc: viro@zeniv.linux.org.uk
Cc: will.deacon@arm.com
Link: http://lkml.kernel.org/r/1508792849-3115-19-git-send-email-paulmck@linux.vnet.ibm.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2017-10-24 05:07:29 +08:00
|
|
|
WRITE_ONCE(p->midi[port], midi);
|
2015-10-11 11:30:15 +08:00
|
|
|
}
|
|
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|
2019-07-22 11:37:09 +08:00
|
|
|
static unsigned int process_ir_ctx_payloads(struct amdtp_stream *s,
|
|
|
|
const struct pkt_desc *descs,
|
|
|
|
unsigned int packets,
|
|
|
|
struct snd_pcm_substream *pcm)
|
2015-09-30 08:39:17 +08:00
|
|
|
{
|
2019-07-22 11:37:05 +08:00
|
|
|
unsigned int pcm_frames = 0;
|
2019-07-22 11:37:09 +08:00
|
|
|
int i;
|
2015-09-30 08:39:17 +08:00
|
|
|
|
2019-07-22 11:37:09 +08:00
|
|
|
for (i = 0; i < packets; ++i) {
|
|
|
|
const struct pkt_desc *desc = descs + i;
|
|
|
|
__be32 *buf = desc->ctx_payload;
|
|
|
|
unsigned int data_blocks = desc->data_blocks;
|
2015-09-30 08:39:17 +08:00
|
|
|
|
2019-07-22 11:37:09 +08:00
|
|
|
if (pcm) {
|
|
|
|
read_pcm_s32(s, pcm, buf, data_blocks, pcm_frames);
|
|
|
|
pcm_frames += data_blocks;
|
|
|
|
}
|
|
|
|
|
|
|
|
read_midi_messages(s, buf, data_blocks);
|
|
|
|
}
|
2015-09-30 08:39:17 +08:00
|
|
|
|
|
|
|
return pcm_frames;
|
|
|
|
}
|
|
|
|
|
2019-07-22 11:37:09 +08:00
|
|
|
static unsigned int process_it_ctx_payloads(struct amdtp_stream *s,
|
|
|
|
const struct pkt_desc *descs,
|
|
|
|
unsigned int packets,
|
|
|
|
struct snd_pcm_substream *pcm)
|
2015-09-30 08:39:17 +08:00
|
|
|
{
|
2019-07-22 11:37:05 +08:00
|
|
|
unsigned int pcm_frames = 0;
|
2019-07-22 11:37:09 +08:00
|
|
|
int i;
|
2015-09-30 08:39:17 +08:00
|
|
|
|
2019-07-22 11:37:09 +08:00
|
|
|
for (i = 0; i < packets; ++i) {
|
|
|
|
const struct pkt_desc *desc = descs + i;
|
|
|
|
__be32 *buf = desc->ctx_payload;
|
|
|
|
unsigned int data_blocks = desc->data_blocks;
|
2015-09-30 08:39:17 +08:00
|
|
|
|
2019-07-22 11:37:09 +08:00
|
|
|
if (pcm) {
|
|
|
|
write_pcm_s32(s, pcm, buf, data_blocks, pcm_frames);
|
|
|
|
pcm_frames += data_blocks;
|
|
|
|
} else {
|
|
|
|
write_pcm_silence(s, buf, data_blocks);
|
|
|
|
}
|
|
|
|
|
|
|
|
write_midi_messages(s, buf, data_blocks,
|
|
|
|
desc->data_block_counter);
|
|
|
|
}
|
2015-09-30 08:39:17 +08:00
|
|
|
|
|
|
|
return pcm_frames;
|
|
|
|
}
|
|
|
|
|
|
|
|
int amdtp_dot_init(struct amdtp_stream *s, struct fw_unit *unit,
|
|
|
|
enum amdtp_stream_direction dir)
|
|
|
|
{
|
2019-07-22 11:37:09 +08:00
|
|
|
amdtp_stream_process_ctx_payloads_t process_ctx_payloads;
|
2015-09-30 08:39:17 +08:00
|
|
|
enum cip_flags flags;
|
|
|
|
|
2019-07-22 11:37:09 +08:00
|
|
|
// Use different mode between incoming/outgoing.
|
2015-09-30 08:39:17 +08:00
|
|
|
if (dir == AMDTP_IN_STREAM) {
|
2016-05-09 22:15:56 +08:00
|
|
|
flags = CIP_NONBLOCKING;
|
2019-07-22 11:37:09 +08:00
|
|
|
process_ctx_payloads = process_ir_ctx_payloads;
|
2015-09-30 08:39:17 +08:00
|
|
|
} else {
|
|
|
|
flags = CIP_BLOCKING;
|
2019-07-22 11:37:09 +08:00
|
|
|
process_ctx_payloads = process_it_ctx_payloads;
|
2015-09-30 08:39:17 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
return amdtp_stream_init(s, unit, dir, flags, CIP_FMT_AM,
|
2019-07-22 11:37:09 +08:00
|
|
|
process_ctx_payloads, sizeof(struct amdtp_dot));
|
2015-09-30 08:39:17 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
void amdtp_dot_reset(struct amdtp_stream *s)
|
|
|
|
{
|
|
|
|
struct amdtp_dot *p = s->protocol;
|
|
|
|
|
|
|
|
p->state.carry = 0x00;
|
|
|
|
p->state.idx = 0x00;
|
|
|
|
p->state.off = 0;
|
|
|
|
}
|