2017-04-12 18:14:36 +08:00
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/*
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* TI TPS65132 Regulator driver
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*
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* Copyright (C) 2017 NVIDIA CORPORATION. All rights reserved.
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*
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* Author: Venkat Reddy Talla <vreddytalla@nvidia.com>
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* Laxman Dewangan <ldewangan@nvidia.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any kind,
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* whether express or implied; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*/
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/gpio/consumer.h>
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#include <linux/i2c.h>
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#include <linux/module.h>
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#include <linux/regmap.h>
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#include <linux/regulator/driver.h>
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#include <linux/regulator/machine.h>
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#define TPS65132_REG_VPOS 0x00
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#define TPS65132_REG_VNEG 0x01
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#define TPS65132_REG_APPS_DISP_DISN 0x03
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#define TPS65132_REG_CONTROL 0x0FF
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#define TPS65132_VOUT_MASK 0x1F
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#define TPS65132_VOUT_N_VOLTAGE 0x15
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#define TPS65132_VOUT_VMIN 4000000
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#define TPS65132_VOUT_VMAX 6000000
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#define TPS65132_VOUT_STEP 100000
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#define TPS65132_REG_APPS_DIS_VPOS BIT(0)
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#define TPS65132_REG_APPS_DIS_VNEG BIT(1)
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#define TPS65132_REGULATOR_ID_VPOS 0
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#define TPS65132_REGULATOR_ID_VNEG 1
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#define TPS65132_MAX_REGULATORS 2
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#define TPS65132_ACT_DIS_TIME_SLACK 1000
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struct tps65132_reg_pdata {
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struct gpio_desc *en_gpiod;
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struct gpio_desc *act_dis_gpiod;
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unsigned int act_dis_time_us;
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int ena_gpio_state;
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};
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struct tps65132_regulator {
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struct device *dev;
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struct tps65132_reg_pdata reg_pdata[TPS65132_MAX_REGULATORS];
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};
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static int tps65132_regulator_enable(struct regulator_dev *rdev)
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{
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struct tps65132_regulator *tps = rdev_get_drvdata(rdev);
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int id = rdev_get_id(rdev);
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struct tps65132_reg_pdata *rpdata = &tps->reg_pdata[id];
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int ret;
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if (!IS_ERR(rpdata->en_gpiod)) {
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gpiod_set_value_cansleep(rpdata->en_gpiod, 1);
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rpdata->ena_gpio_state = 1;
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}
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/* Hardware automatically enable discharge bit in enable */
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if (rdev->constraints->active_discharge ==
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REGULATOR_ACTIVE_DISCHARGE_DISABLE) {
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ret = regulator_set_active_discharge_regmap(rdev, false);
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if (ret < 0) {
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dev_err(tps->dev, "Failed to disable active discharge: %d\n",
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ret);
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return ret;
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}
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}
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return 0;
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}
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static int tps65132_regulator_disable(struct regulator_dev *rdev)
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{
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struct tps65132_regulator *tps = rdev_get_drvdata(rdev);
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int id = rdev_get_id(rdev);
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struct tps65132_reg_pdata *rpdata = &tps->reg_pdata[id];
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if (!IS_ERR(rpdata->en_gpiod)) {
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gpiod_set_value_cansleep(rpdata->en_gpiod, 0);
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rpdata->ena_gpio_state = 0;
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}
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if (!IS_ERR(rpdata->act_dis_gpiod)) {
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gpiod_set_value_cansleep(rpdata->act_dis_gpiod, 1);
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usleep_range(rpdata->act_dis_time_us, rpdata->act_dis_time_us +
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TPS65132_ACT_DIS_TIME_SLACK);
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gpiod_set_value_cansleep(rpdata->act_dis_gpiod, 0);
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}
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return 0;
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}
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static int tps65132_regulator_is_enabled(struct regulator_dev *rdev)
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{
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struct tps65132_regulator *tps = rdev_get_drvdata(rdev);
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int id = rdev_get_id(rdev);
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struct tps65132_reg_pdata *rpdata = &tps->reg_pdata[id];
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if (!IS_ERR(rpdata->en_gpiod))
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return rpdata->ena_gpio_state;
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return 1;
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}
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2019-03-21 20:00:38 +08:00
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static const struct regulator_ops tps65132_regulator_ops = {
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2017-04-12 18:14:36 +08:00
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.enable = tps65132_regulator_enable,
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.disable = tps65132_regulator_disable,
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.is_enabled = tps65132_regulator_is_enabled,
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.list_voltage = regulator_list_voltage_linear,
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.map_voltage = regulator_map_voltage_linear,
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.get_voltage_sel = regulator_get_voltage_sel_regmap,
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.set_voltage_sel = regulator_set_voltage_sel_regmap,
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.set_active_discharge = regulator_set_active_discharge_regmap,
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};
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static int tps65132_of_parse_cb(struct device_node *np,
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const struct regulator_desc *desc,
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struct regulator_config *config)
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{
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struct tps65132_regulator *tps = config->driver_data;
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struct tps65132_reg_pdata *rpdata = &tps->reg_pdata[desc->id];
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int ret;
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rpdata->en_gpiod = devm_fwnode_get_index_gpiod_from_child(tps->dev,
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"enable", 0, &np->fwnode, 0, "enable");
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2019-09-05 03:35:00 +08:00
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if (IS_ERR_OR_NULL(rpdata->en_gpiod)) {
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2017-04-12 18:14:36 +08:00
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ret = PTR_ERR(rpdata->en_gpiod);
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/* Ignore the error other than probe defer */
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if (ret == -EPROBE_DEFER)
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return ret;
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return 0;
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}
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rpdata->act_dis_gpiod = devm_fwnode_get_index_gpiod_from_child(
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tps->dev, "active-discharge", 0,
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&np->fwnode, 0, "active-discharge");
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2019-09-05 03:35:00 +08:00
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if (IS_ERR_OR_NULL(rpdata->act_dis_gpiod)) {
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2017-04-12 18:14:36 +08:00
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ret = PTR_ERR(rpdata->act_dis_gpiod);
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/* Ignore the error other than probe defer */
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if (ret == -EPROBE_DEFER)
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return ret;
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return 0;
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}
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ret = of_property_read_u32(np, "ti,active-discharge-time-us",
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&rpdata->act_dis_time_us);
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if (ret < 0) {
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dev_err(tps->dev, "Failed to read active discharge time:%d\n",
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ret);
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return ret;
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}
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return 0;
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}
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#define TPS65132_REGULATOR_DESC(_id, _name) \
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[TPS65132_REGULATOR_ID_##_id] = { \
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.name = "tps65132-"#_name, \
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.supply_name = "vin", \
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.id = TPS65132_REGULATOR_ID_##_id, \
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.of_match = of_match_ptr(#_name), \
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.of_parse_cb = tps65132_of_parse_cb, \
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.ops = &tps65132_regulator_ops, \
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.n_voltages = TPS65132_VOUT_N_VOLTAGE, \
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.min_uV = TPS65132_VOUT_VMIN, \
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.uV_step = TPS65132_VOUT_STEP, \
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.enable_time = 500, \
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.vsel_mask = TPS65132_VOUT_MASK, \
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.vsel_reg = TPS65132_REG_##_id, \
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.active_discharge_off = 0, \
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.active_discharge_on = TPS65132_REG_APPS_DIS_##_id, \
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.active_discharge_mask = TPS65132_REG_APPS_DIS_##_id, \
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.active_discharge_reg = TPS65132_REG_APPS_DISP_DISN, \
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.type = REGULATOR_VOLTAGE, \
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.owner = THIS_MODULE, \
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}
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2019-03-21 20:00:38 +08:00
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static const struct regulator_desc tps_regs_desc[TPS65132_MAX_REGULATORS] = {
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2017-04-12 18:14:36 +08:00
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TPS65132_REGULATOR_DESC(VPOS, outp),
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TPS65132_REGULATOR_DESC(VNEG, outn),
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};
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static const struct regmap_range tps65132_no_reg_ranges[] = {
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regmap_reg_range(TPS65132_REG_APPS_DISP_DISN + 1,
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TPS65132_REG_CONTROL - 1),
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};
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static const struct regmap_access_table tps65132_no_reg_table = {
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.no_ranges = tps65132_no_reg_ranges,
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.n_no_ranges = ARRAY_SIZE(tps65132_no_reg_ranges),
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};
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static const struct regmap_config tps65132_regmap_config = {
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.reg_bits = 8,
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.val_bits = 8,
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2017-04-13 20:55:50 +08:00
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.max_register = TPS65132_REG_CONTROL,
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2017-04-12 18:14:36 +08:00
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.cache_type = REGCACHE_NONE,
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.rd_table = &tps65132_no_reg_table,
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.wr_table = &tps65132_no_reg_table,
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};
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static int tps65132_probe(struct i2c_client *client,
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const struct i2c_device_id *client_id)
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{
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struct device *dev = &client->dev;
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struct tps65132_regulator *tps;
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2019-03-21 20:00:37 +08:00
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struct regulator_dev *rdev;
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struct regmap *rmap;
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2017-04-12 18:14:36 +08:00
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struct regulator_config config = { };
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int id;
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int ret;
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tps = devm_kzalloc(dev, sizeof(*tps), GFP_KERNEL);
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if (!tps)
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return -ENOMEM;
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2019-03-21 20:00:37 +08:00
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rmap = devm_regmap_init_i2c(client, &tps65132_regmap_config);
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if (IS_ERR(rmap)) {
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ret = PTR_ERR(rmap);
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2017-04-12 18:14:36 +08:00
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dev_err(dev, "regmap init failed: %d\n", ret);
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return ret;
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}
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i2c_set_clientdata(client, tps);
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tps->dev = dev;
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for (id = 0; id < TPS65132_MAX_REGULATORS; ++id) {
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2019-03-21 20:00:37 +08:00
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config.regmap = rmap;
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2017-04-12 18:14:36 +08:00
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config.dev = dev;
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config.driver_data = tps;
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2019-03-21 20:00:37 +08:00
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rdev = devm_regulator_register(dev, &tps_regs_desc[id],
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&config);
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if (IS_ERR(rdev)) {
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ret = PTR_ERR(rdev);
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2017-04-12 18:14:36 +08:00
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dev_err(dev, "regulator %s register failed: %d\n",
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2019-03-21 20:00:37 +08:00
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tps_regs_desc[id].name, ret);
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2017-04-12 18:14:36 +08:00
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return ret;
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}
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}
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return 0;
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}
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static const struct i2c_device_id tps65132_id[] = {
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{.name = "tps65132",},
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{},
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};
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MODULE_DEVICE_TABLE(i2c, tps65132_id);
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static struct i2c_driver tps65132_i2c_driver = {
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.driver = {
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.name = "tps65132",
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},
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.probe = tps65132_probe,
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.id_table = tps65132_id,
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};
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module_i2c_driver(tps65132_i2c_driver);
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MODULE_DESCRIPTION("tps65132 regulator driver");
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MODULE_AUTHOR("Venkat Reddy Talla <vreddytalla@nvidia.com>");
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MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
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MODULE_LICENSE("GPL v2");
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