2019-05-29 22:12:40 +08:00
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/* SPDX-License-Identifier: GPL-2.0-only */
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2009-11-02 20:02:29 +08:00
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/*
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*
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* Copyright SUSE Linux Products GmbH 2009
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*
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* Authors: Alexander Graf <agraf@suse.de>
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*/
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2018-07-06 00:24:57 +08:00
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#include <asm/asm-compat.h>
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2018-07-06 00:25:01 +08:00
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#include <asm/feature-fixups.h>
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2018-07-06 00:24:57 +08:00
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2014-05-15 20:38:03 +08:00
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#define SHADOW_SLB_ENTRY_LEN 0x10
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#define OFFSET_ESID(x) (SHADOW_SLB_ENTRY_LEN * x)
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#define OFFSET_VSID(x) ((SHADOW_SLB_ENTRY_LEN * x) + 8)
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2009-11-02 20:02:29 +08:00
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/******************************************************************************
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* *
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* Entry code *
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* *
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*****************************************************************************/
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2010-04-16 06:11:48 +08:00
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.macro LOAD_GUEST_SEGMENTS
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2009-11-02 20:02:29 +08:00
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/* Required state:
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*
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* MSR = ~IR|DR
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* R13 = PACA
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2010-01-08 09:58:03 +08:00
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* R1 = host R1
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* R2 = host R2
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2010-04-16 06:11:48 +08:00
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* R3 = shadow vcpu
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2011-07-23 15:41:44 +08:00
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* all other volatile GPRS = free except R4, R6
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2010-04-16 06:11:48 +08:00
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* SVCPU[CR] = guest CR
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* SVCPU[XER] = guest XER
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* SVCPU[CTR] = guest CTR
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* SVCPU[LR] = guest LR
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2009-11-02 20:02:29 +08:00
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*/
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2014-05-15 20:38:03 +08:00
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BEGIN_FW_FTR_SECTION
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2009-11-02 20:02:29 +08:00
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2014-05-15 20:38:03 +08:00
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/* Declare SLB shadow as 0 entries big */
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2009-11-02 20:02:29 +08:00
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2014-05-15 20:38:03 +08:00
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ld r11, PACA_SLBSHADOWPTR(r13)
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li r8, 0
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stb r8, 3(r11)
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2009-11-02 20:02:29 +08:00
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2014-05-15 20:38:03 +08:00
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END_FW_FTR_SECTION_IFSET(FW_FEATURE_LPAR)
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2009-11-02 20:02:29 +08:00
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/* Flush SLB */
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KVM: PPC: Book3S PR: Fix invalidation of SLB entry 0 on guest entry
On entering a PR KVM guest, we invalidate the whole SLB before loading
up the guest entries. We do this using an slbia instruction, which
invalidates all entries except entry 0, followed by an slbie to
invalidate entry 0. However, the slbie turns out to be ineffective
in some circumstances (specifically when the host linear mapping uses
64k pages) because of errors in computing the parameter to the slbie.
The result is that the guest kernel hangs very early in boot because
it takes a DSI the first time it tries to access kernel data using
a linear mapping address in real mode.
Currently we construct bits 36 - 43 (big-endian numbering) of the slbie
parameter by taking bits 56 - 63 of the SLB VSID doubleword. These bits
for the tlbie are C (class, 1 bit), B (segment size, 2 bits) and 5
reserved bits. For the SLB VSID doubleword these are C (class, 1 bit),
reserved (1 bit), LP (large page size, 2 bits), and 4 reserved bits.
Thus we are not setting the B field correctly, and when LP = 01 as
it is for 64k pages, we are setting a reserved bit.
Rather than add more instructions to calculate the slbie parameter
correctly, this takes a simpler approach, which is to set entry 0 to
zeroes explicitly. Normally slbmte should not be used to invalidate
an entry, since it doesn't invalidate the ERATs, but it is OK to use
it to invalidate an entry if it is immediately followed by slbia,
which does invalidate the ERATs. (This has been confirmed with the
Power architects.) This approach takes fewer instructions and will
work whatever the contents of entry 0.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-06-22 15:14:11 +08:00
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li r10, 0
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slbmte r10, r10
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2009-11-02 20:02:29 +08:00
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slbia
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/* Fill SLB with our shadow */
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2010-04-16 06:11:48 +08:00
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lbz r12, SVCPU_SLB_MAX(r3)
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2009-11-02 20:02:29 +08:00
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mulli r12, r12, 16
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2010-04-16 06:11:48 +08:00
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addi r12, r12, SVCPU_SLB
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add r12, r12, r3
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2009-11-02 20:02:29 +08:00
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/* for (r11 = kvm_slb; r11 < kvm_slb + kvm_slb_size; r11+=slb_entry) */
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2010-04-16 06:11:48 +08:00
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li r11, SVCPU_SLB
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add r11, r11, r3
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2009-11-02 20:02:29 +08:00
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slb_loop_enter:
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ld r10, 0(r11)
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2014-05-15 20:38:03 +08:00
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andis. r9, r10, SLB_ESID_V@h
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2009-11-02 20:02:29 +08:00
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beq slb_loop_enter_skip
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ld r9, 8(r11)
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slbmte r9, r10
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slb_loop_enter_skip:
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addi r11, r11, 16
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cmpd cr0, r11, r12
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blt slb_loop_enter
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slb_do_enter:
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2010-04-16 06:11:48 +08:00
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.endm
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2009-11-02 20:02:29 +08:00
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/******************************************************************************
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* *
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* Exit code *
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* *
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*****************************************************************************/
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2010-04-16 06:11:48 +08:00
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.macro LOAD_HOST_SEGMENTS
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2009-11-02 20:02:29 +08:00
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/* Register usage at this point:
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*
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2010-04-16 06:11:48 +08:00
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* R1 = host R1
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* R2 = host R2
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* R12 = exit handler id
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* R13 = shadow vcpu - SHADOW_VCPU_OFF [=PACA on PPC64]
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* SVCPU.* = guest *
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* SVCPU[CR] = guest CR
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* SVCPU[XER] = guest XER
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* SVCPU[CTR] = guest CTR
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* SVCPU[LR] = guest LR
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2009-11-02 20:02:29 +08:00
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*
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*/
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2014-05-15 20:38:03 +08:00
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/* Remove all SLB entries that are in use. */
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2009-11-02 20:02:29 +08:00
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2017-10-21 12:32:30 +08:00
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li r0, 0
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2014-05-15 20:36:05 +08:00
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slbmte r0, r0
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2009-11-02 20:02:29 +08:00
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slbia
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2014-05-15 20:38:03 +08:00
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/* Restore bolted entries from the shadow */
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2009-11-02 20:02:29 +08:00
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ld r11, PACA_SLBSHADOWPTR(r13)
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2014-05-15 20:38:03 +08:00
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BEGIN_FW_FTR_SECTION
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/* Declare SLB shadow as SLB_NUM_BOLTED entries big */
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li r8, SLB_NUM_BOLTED
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stb r8, 3(r11)
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END_FW_FTR_SECTION_IFSET(FW_FEATURE_LPAR)
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/* Manually load all entries from shadow SLB */
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li r8, SLBSHADOW_SAVEAREA
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li r7, SLBSHADOW_SAVEAREA + 8
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.rept SLB_NUM_BOLTED
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LDX_BE r10, r11, r8
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cmpdi r10, 0
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beq 1f
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LDX_BE r9, r11, r7
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slbmte r9, r10
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1: addi r7, r7, SHADOW_SLB_ENTRY_LEN
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addi r8, r8, SHADOW_SLB_ENTRY_LEN
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.endr
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isync
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sync
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2009-11-02 20:02:29 +08:00
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slb_do_exit:
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2010-04-16 06:11:48 +08:00
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.endm
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