398 lines
10 KiB
C
398 lines
10 KiB
C
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// SPDX-License-Identifier: GPL-2.0-only
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/**
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* Copyright (C) 2020 Microchip
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*
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* Author: Kamel Bouhara <kamel.bouhara@bootlin.com>
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*/
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#include <linux/clk.h>
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#include <linux/counter.h>
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#include <linux/mfd/syscon.h>
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include <soc/at91/atmel_tcb.h>
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#define ATMEL_TC_CMR_MASK (ATMEL_TC_LDRA_RISING | ATMEL_TC_LDRB_FALLING | \
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ATMEL_TC_ETRGEDG_RISING | ATMEL_TC_LDBDIS | \
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ATMEL_TC_LDBSTOP)
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#define ATMEL_TC_QDEN BIT(8)
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#define ATMEL_TC_POSEN BIT(9)
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struct mchp_tc_data {
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const struct atmel_tcb_config *tc_cfg;
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struct counter_device counter;
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struct regmap *regmap;
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int qdec_mode;
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int num_channels;
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int channel[2];
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bool trig_inverted;
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};
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enum mchp_tc_count_function {
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MCHP_TC_FUNCTION_INCREASE,
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MCHP_TC_FUNCTION_QUADRATURE,
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};
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static enum counter_count_function mchp_tc_count_functions[] = {
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[MCHP_TC_FUNCTION_INCREASE] = COUNTER_COUNT_FUNCTION_INCREASE,
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[MCHP_TC_FUNCTION_QUADRATURE] = COUNTER_COUNT_FUNCTION_QUADRATURE_X4,
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};
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enum mchp_tc_synapse_action {
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MCHP_TC_SYNAPSE_ACTION_NONE = 0,
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MCHP_TC_SYNAPSE_ACTION_RISING_EDGE,
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MCHP_TC_SYNAPSE_ACTION_FALLING_EDGE,
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MCHP_TC_SYNAPSE_ACTION_BOTH_EDGE
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};
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static enum counter_synapse_action mchp_tc_synapse_actions[] = {
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[MCHP_TC_SYNAPSE_ACTION_NONE] = COUNTER_SYNAPSE_ACTION_NONE,
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[MCHP_TC_SYNAPSE_ACTION_RISING_EDGE] = COUNTER_SYNAPSE_ACTION_RISING_EDGE,
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[MCHP_TC_SYNAPSE_ACTION_FALLING_EDGE] = COUNTER_SYNAPSE_ACTION_FALLING_EDGE,
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[MCHP_TC_SYNAPSE_ACTION_BOTH_EDGE] = COUNTER_SYNAPSE_ACTION_BOTH_EDGES,
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};
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static struct counter_signal mchp_tc_count_signals[] = {
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{
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.id = 0,
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.name = "Channel A",
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},
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{
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.id = 1,
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.name = "Channel B",
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}
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};
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static struct counter_synapse mchp_tc_count_synapses[] = {
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{
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.actions_list = mchp_tc_synapse_actions,
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.num_actions = ARRAY_SIZE(mchp_tc_synapse_actions),
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.signal = &mchp_tc_count_signals[0]
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},
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{
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.actions_list = mchp_tc_synapse_actions,
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.num_actions = ARRAY_SIZE(mchp_tc_synapse_actions),
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.signal = &mchp_tc_count_signals[1]
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}
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};
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static int mchp_tc_count_function_get(struct counter_device *counter,
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struct counter_count *count,
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size_t *function)
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{
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struct mchp_tc_data *const priv = counter->priv;
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if (priv->qdec_mode)
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*function = MCHP_TC_FUNCTION_QUADRATURE;
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else
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*function = MCHP_TC_FUNCTION_INCREASE;
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return 0;
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}
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static int mchp_tc_count_function_set(struct counter_device *counter,
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struct counter_count *count,
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size_t function)
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{
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struct mchp_tc_data *const priv = counter->priv;
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u32 bmr, cmr;
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regmap_read(priv->regmap, ATMEL_TC_BMR, &bmr);
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regmap_read(priv->regmap, ATMEL_TC_REG(priv->channel[0], CMR), &cmr);
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/* Set capture mode */
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cmr &= ~ATMEL_TC_WAVE;
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switch (function) {
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case MCHP_TC_FUNCTION_INCREASE:
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priv->qdec_mode = 0;
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/* Set highest rate based on whether soc has gclk or not */
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bmr &= ~(ATMEL_TC_QDEN | ATMEL_TC_POSEN);
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if (priv->tc_cfg->has_gclk)
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cmr |= ATMEL_TC_TIMER_CLOCK2;
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else
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cmr |= ATMEL_TC_TIMER_CLOCK1;
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/* Setup the period capture mode */
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cmr |= ATMEL_TC_CMR_MASK;
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cmr &= ~(ATMEL_TC_ABETRG | ATMEL_TC_XC0);
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break;
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case MCHP_TC_FUNCTION_QUADRATURE:
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if (!priv->tc_cfg->has_qdec)
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return -EINVAL;
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/* In QDEC mode settings both channels 0 and 1 are required */
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if (priv->num_channels < 2 || priv->channel[0] != 0 ||
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priv->channel[1] != 1) {
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pr_err("Invalid channels number or id for quadrature mode\n");
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return -EINVAL;
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}
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priv->qdec_mode = 1;
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bmr |= ATMEL_TC_QDEN | ATMEL_TC_POSEN;
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cmr |= ATMEL_TC_ETRGEDG_RISING | ATMEL_TC_ABETRG | ATMEL_TC_XC0;
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break;
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}
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regmap_write(priv->regmap, ATMEL_TC_BMR, bmr);
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regmap_write(priv->regmap, ATMEL_TC_REG(priv->channel[0], CMR), cmr);
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/* Enable clock and trigger counter */
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regmap_write(priv->regmap, ATMEL_TC_REG(priv->channel[0], CCR),
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ATMEL_TC_CLKEN | ATMEL_TC_SWTRG);
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if (priv->qdec_mode) {
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regmap_write(priv->regmap,
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ATMEL_TC_REG(priv->channel[1], CMR), cmr);
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regmap_write(priv->regmap,
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ATMEL_TC_REG(priv->channel[1], CCR),
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ATMEL_TC_CLKEN | ATMEL_TC_SWTRG);
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}
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return 0;
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}
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static int mchp_tc_count_signal_read(struct counter_device *counter,
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struct counter_signal *signal,
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enum counter_signal_value *val)
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{
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struct mchp_tc_data *const priv = counter->priv;
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bool sigstatus;
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u32 sr;
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regmap_read(priv->regmap, ATMEL_TC_REG(priv->channel[0], SR), &sr);
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if (priv->trig_inverted)
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sigstatus = (sr & ATMEL_TC_MTIOB);
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else
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sigstatus = (sr & ATMEL_TC_MTIOA);
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*val = sigstatus ? COUNTER_SIGNAL_HIGH : COUNTER_SIGNAL_LOW;
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return 0;
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}
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static int mchp_tc_count_action_get(struct counter_device *counter,
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struct counter_count *count,
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struct counter_synapse *synapse,
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size_t *action)
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{
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struct mchp_tc_data *const priv = counter->priv;
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u32 cmr;
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regmap_read(priv->regmap, ATMEL_TC_REG(priv->channel[0], CMR), &cmr);
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*action = MCHP_TC_SYNAPSE_ACTION_NONE;
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if (cmr & ATMEL_TC_ETRGEDG_NONE)
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*action = MCHP_TC_SYNAPSE_ACTION_NONE;
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else if (cmr & ATMEL_TC_ETRGEDG_RISING)
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*action = MCHP_TC_SYNAPSE_ACTION_RISING_EDGE;
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else if (cmr & ATMEL_TC_ETRGEDG_FALLING)
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*action = MCHP_TC_SYNAPSE_ACTION_FALLING_EDGE;
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else if (cmr & ATMEL_TC_ETRGEDG_BOTH)
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*action = MCHP_TC_SYNAPSE_ACTION_BOTH_EDGE;
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return 0;
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}
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static int mchp_tc_count_action_set(struct counter_device *counter,
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struct counter_count *count,
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struct counter_synapse *synapse,
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size_t action)
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{
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struct mchp_tc_data *const priv = counter->priv;
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u32 edge = ATMEL_TC_ETRGEDG_NONE;
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/* QDEC mode is rising edge only */
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if (priv->qdec_mode)
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return -EINVAL;
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switch (action) {
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case MCHP_TC_SYNAPSE_ACTION_NONE:
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edge = ATMEL_TC_ETRGEDG_NONE;
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break;
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case MCHP_TC_SYNAPSE_ACTION_RISING_EDGE:
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edge = ATMEL_TC_ETRGEDG_RISING;
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break;
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case MCHP_TC_SYNAPSE_ACTION_FALLING_EDGE:
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edge = ATMEL_TC_ETRGEDG_FALLING;
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break;
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case MCHP_TC_SYNAPSE_ACTION_BOTH_EDGE:
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edge = ATMEL_TC_ETRGEDG_BOTH;
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break;
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}
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return regmap_write_bits(priv->regmap,
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ATMEL_TC_REG(priv->channel[0], CMR),
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ATMEL_TC_ETRGEDG, edge);
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}
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static int mchp_tc_count_read(struct counter_device *counter,
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struct counter_count *count,
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unsigned long *val)
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{
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struct mchp_tc_data *const priv = counter->priv;
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u32 cnt;
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regmap_read(priv->regmap, ATMEL_TC_REG(priv->channel[0], CV), &cnt);
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*val = cnt;
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return 0;
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}
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static struct counter_count mchp_tc_counts[] = {
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{
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.id = 0,
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.name = "Timer Counter",
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.functions_list = mchp_tc_count_functions,
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.num_functions = ARRAY_SIZE(mchp_tc_count_functions),
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.synapses = mchp_tc_count_synapses,
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.num_synapses = ARRAY_SIZE(mchp_tc_count_synapses),
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},
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};
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static struct counter_ops mchp_tc_ops = {
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.signal_read = mchp_tc_count_signal_read,
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.count_read = mchp_tc_count_read,
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.function_get = mchp_tc_count_function_get,
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.function_set = mchp_tc_count_function_set,
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.action_get = mchp_tc_count_action_get,
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.action_set = mchp_tc_count_action_set
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};
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static const struct atmel_tcb_config tcb_rm9200_config = {
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.counter_width = 16,
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};
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static const struct atmel_tcb_config tcb_sam9x5_config = {
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.counter_width = 32,
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};
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static const struct atmel_tcb_config tcb_sama5d2_config = {
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.counter_width = 32,
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.has_gclk = true,
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.has_qdec = true,
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};
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static const struct atmel_tcb_config tcb_sama5d3_config = {
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.counter_width = 32,
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.has_qdec = true,
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};
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static const struct of_device_id atmel_tc_of_match[] = {
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{ .compatible = "atmel,at91rm9200-tcb", .data = &tcb_rm9200_config, },
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{ .compatible = "atmel,at91sam9x5-tcb", .data = &tcb_sam9x5_config, },
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{ .compatible = "atmel,sama5d2-tcb", .data = &tcb_sama5d2_config, },
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{ .compatible = "atmel,sama5d3-tcb", .data = &tcb_sama5d3_config, },
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{ /* sentinel */ }
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};
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static void mchp_tc_clk_remove(void *ptr)
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{
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clk_disable_unprepare((struct clk *)ptr);
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}
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static int mchp_tc_probe(struct platform_device *pdev)
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{
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struct device_node *np = pdev->dev.of_node;
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const struct atmel_tcb_config *tcb_config;
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const struct of_device_id *match;
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struct mchp_tc_data *priv;
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char clk_name[7];
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struct regmap *regmap;
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struct clk *clk[3];
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int channel;
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int ret, i;
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priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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platform_set_drvdata(pdev, priv);
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match = of_match_node(atmel_tc_of_match, np->parent);
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tcb_config = match->data;
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if (!tcb_config) {
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dev_err(&pdev->dev, "No matching parent node found\n");
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return -ENODEV;
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}
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regmap = syscon_node_to_regmap(np->parent);
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if (IS_ERR(priv->regmap))
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return PTR_ERR(priv->regmap);
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/* max. channels number is 2 when in QDEC mode */
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priv->num_channels = of_property_count_u32_elems(np, "reg");
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if (priv->num_channels < 0) {
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dev_err(&pdev->dev, "Invalid or missing channel\n");
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return -EINVAL;
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}
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/* Register channels and initialize clocks */
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for (i = 0; i < priv->num_channels; i++) {
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ret = of_property_read_u32_index(np, "reg", i, &channel);
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if (ret < 0 || channel > 2)
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return -ENODEV;
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priv->channel[i] = channel;
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snprintf(clk_name, sizeof(clk_name), "t%d_clk", channel);
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clk[i] = of_clk_get_by_name(np->parent, clk_name);
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if (IS_ERR(clk[i])) {
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/* Fallback to t0_clk */
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clk[i] = of_clk_get_by_name(np->parent, "t0_clk");
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if (IS_ERR(clk[i]))
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return PTR_ERR(clk[i]);
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||
|
|
}
|
||
|
|
|
||
|
|
ret = clk_prepare_enable(clk[i]);
|
||
|
|
if (ret)
|
||
|
|
return ret;
|
||
|
|
|
||
|
|
ret = devm_add_action_or_reset(&pdev->dev,
|
||
|
|
mchp_tc_clk_remove,
|
||
|
|
clk[i]);
|
||
|
|
if (ret)
|
||
|
|
return ret;
|
||
|
|
|
||
|
|
dev_dbg(&pdev->dev,
|
||
|
|
"Initialized capture mode on channel %d\n",
|
||
|
|
channel);
|
||
|
|
}
|
||
|
|
|
||
|
|
priv->tc_cfg = tcb_config;
|
||
|
|
priv->regmap = regmap;
|
||
|
|
priv->counter.name = dev_name(&pdev->dev);
|
||
|
|
priv->counter.parent = &pdev->dev;
|
||
|
|
priv->counter.ops = &mchp_tc_ops;
|
||
|
|
priv->counter.num_counts = ARRAY_SIZE(mchp_tc_counts);
|
||
|
|
priv->counter.counts = mchp_tc_counts;
|
||
|
|
priv->counter.num_signals = ARRAY_SIZE(mchp_tc_count_signals);
|
||
|
|
priv->counter.signals = mchp_tc_count_signals;
|
||
|
|
priv->counter.priv = priv;
|
||
|
|
|
||
|
|
return devm_counter_register(&pdev->dev, &priv->counter);
|
||
|
|
}
|
||
|
|
|
||
|
|
static const struct of_device_id mchp_tc_dt_ids[] = {
|
||
|
|
{ .compatible = "microchip,tcb-capture", },
|
||
|
|
{ /* sentinel */ },
|
||
|
|
};
|
||
|
|
MODULE_DEVICE_TABLE(of, mchp_tc_dt_ids);
|
||
|
|
|
||
|
|
static struct platform_driver mchp_tc_driver = {
|
||
|
|
.probe = mchp_tc_probe,
|
||
|
|
.driver = {
|
||
|
|
.name = "microchip-tcb-capture",
|
||
|
|
.of_match_table = mchp_tc_dt_ids,
|
||
|
|
},
|
||
|
|
};
|
||
|
|
module_platform_driver(mchp_tc_driver);
|
||
|
|
|
||
|
|
MODULE_AUTHOR("Kamel Bouhara <kamel.bouhara@bootlin.com>");
|
||
|
|
MODULE_DESCRIPTION("Microchip TCB Capture driver");
|
||
|
|
MODULE_LICENSE("GPL v2");
|