2020-05-01 22:58:50 +08:00
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/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
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2019-04-13 00:05:06 +08:00
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/*
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* Copyright(c) 2018 Intel Corporation. All rights reserved.
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*
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* Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
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*/
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#ifndef __INCLUDE_SOUND_SOF_H
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#define __INCLUDE_SOUND_SOF_H
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#include <linux/pci.h>
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2019-04-13 00:05:17 +08:00
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#include <sound/soc.h>
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2019-04-13 00:05:06 +08:00
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#include <sound/soc-acpi.h>
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struct snd_sof_dsp_ops;
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2022-04-15 02:48:10 +08:00
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struct snd_sof_dev;
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2019-04-13 00:05:06 +08:00
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2021-12-23 19:36:17 +08:00
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/**
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2021-12-23 19:36:18 +08:00
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* enum sof_fw_state - DSP firmware state definitions
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2021-12-23 19:36:17 +08:00
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* @SOF_FW_BOOT_NOT_STARTED: firmware boot is not yet started
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* @SOF_FW_BOOT_PREPARE: preparing for boot (firmware loading for exaqmple)
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* @SOF_FW_BOOT_IN_PROGRESS: firmware boot is in progress
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* @SOF_FW_BOOT_FAILED: firmware boot failed
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* @SOF_FW_BOOT_READY_FAILED: firmware booted but fw_ready op failed
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* @SOF_FW_BOOT_READY_OK: firmware booted and fw_ready op passed
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* @SOF_FW_BOOT_COMPLETE: firmware is booted up and functional
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* @SOF_FW_CRASHED: firmware crashed after successful boot
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*/
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2021-12-23 19:36:18 +08:00
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enum sof_fw_state {
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2021-12-23 19:36:17 +08:00
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SOF_FW_BOOT_NOT_STARTED = 0,
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SOF_FW_BOOT_PREPARE,
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SOF_FW_BOOT_IN_PROGRESS,
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SOF_FW_BOOT_FAILED,
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SOF_FW_BOOT_READY_FAILED,
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SOF_FW_BOOT_READY_OK,
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SOF_FW_BOOT_COMPLETE,
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SOF_FW_CRASHED,
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};
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2022-02-10 23:05:18 +08:00
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/* DSP power states */
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enum sof_dsp_power_states {
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SOF_DSP_PM_D0,
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SOF_DSP_PM_D1,
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SOF_DSP_PM_D2,
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SOF_DSP_PM_D3,
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};
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2022-04-15 02:48:03 +08:00
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/* Definitions for multiple IPCs */
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enum sof_ipc_type {
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SOF_IPC,
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SOF_INTEL_IPC4,
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SOF_IPC_TYPE_COUNT
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};
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2019-04-13 00:05:06 +08:00
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/*
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* SOF Platform data.
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*/
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struct snd_sof_pdata {
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const char *name;
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const char *platform;
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struct device *dev;
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/*
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* notification callback used if the hardware initialization
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* can take time or is handled in a workqueue. This callback
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* can be used by the caller to e.g. enable runtime_pm
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* or limit functionality until all low-level inits are
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* complete.
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*/
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void (*sof_probe_complete)(struct device *dev);
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/* descriptor */
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const struct sof_dev_desc *desc;
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/* firmware and topology filenames */
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const char *fw_filename_prefix;
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const char *fw_filename;
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const char *tplg_filename_prefix;
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const char *tplg_filename;
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2022-10-20 20:12:30 +08:00
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/* loadable external libraries available under this directory */
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const char *fw_lib_prefix;
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2019-04-13 00:05:06 +08:00
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/* machine */
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struct platform_device *pdev_mach;
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const struct snd_soc_acpi_mach *machine;
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2022-08-05 15:04:48 +08:00
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const struct snd_sof_of_mach *of_machine;
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2019-04-13 00:05:06 +08:00
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void *hw_pdata;
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2022-04-15 02:48:03 +08:00
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enum sof_ipc_type ipc_type;
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2019-04-13 00:05:06 +08:00
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};
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/*
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* Descriptor used for setting up SOF platform data. This is used when
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* ACPI/PCI data is missing or mapped differently.
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*/
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struct sof_dev_desc {
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/* list of machines using this configuration */
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struct snd_soc_acpi_mach *machines;
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2022-08-05 15:04:48 +08:00
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struct snd_sof_of_mach *of_machines;
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2019-04-13 00:05:06 +08:00
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2019-09-17 05:42:41 +08:00
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/* alternate list of machines using this configuration */
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struct snd_soc_acpi_mach *alt_machines;
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2020-09-21 18:50:38 +08:00
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bool use_acpi_target_states;
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2019-04-13 00:05:06 +08:00
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/* Platform resource indexes in BAR / ACPI resources. */
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/* Must set to -1 if not used - add new items to end */
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int resindex_lpe_base;
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int resindex_pcicfg_base;
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int resindex_imr_base;
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int irqindex_host_ipc;
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/* IPC timeouts in ms */
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int ipc_timeout;
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int boot_timeout;
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/* chip information for dsp */
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const void *chip_info;
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/* defaults for no codec mode */
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const char *nocodec_tplg_filename;
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2022-04-15 02:48:05 +08:00
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/* information on supported IPCs */
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unsigned int ipc_supported_mask;
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enum sof_ipc_type ipc_default;
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2022-10-20 20:12:30 +08:00
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/* defaults paths for firmware, library and topology files */
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2022-04-15 02:48:04 +08:00
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const char *default_fw_path[SOF_IPC_TYPE_COUNT];
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2022-10-20 20:12:30 +08:00
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const char *default_lib_path[SOF_IPC_TYPE_COUNT];
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2022-04-15 02:48:04 +08:00
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const char *default_tplg_path[SOF_IPC_TYPE_COUNT];
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2019-04-13 00:05:06 +08:00
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2019-12-05 05:15:50 +08:00
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/* default firmware name */
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2022-04-15 02:48:06 +08:00
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const char *default_fw_filename[SOF_IPC_TYPE_COUNT];
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2019-12-05 05:15:50 +08:00
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2022-04-15 02:48:10 +08:00
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struct snd_sof_dsp_ops *ops;
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int (*ops_init)(struct snd_sof_dev *sdev);
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2022-06-09 11:26:37 +08:00
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void (*ops_free)(struct snd_sof_dev *sdev);
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2019-04-13 00:05:06 +08:00
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};
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2021-03-19 20:49:49 +08:00
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int sof_dai_get_mclk(struct snd_soc_pcm_runtime *rtd);
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2021-06-26 04:50:41 +08:00
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int sof_dai_get_bclk(struct snd_soc_pcm_runtime *rtd);
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2020-11-20 22:16:53 +08:00
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2019-04-13 00:05:06 +08:00
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#endif
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