License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.
By default all files without license information are under the default
license of the kernel, which is GPL version 2.
Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.
This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.
How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,
Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.
The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.
The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.
Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if <5
lines).
All documentation files were explicitly excluded.
The following heuristics were used to determine which SPDX license
identifiers to apply.
- when both scanners couldn't find any license traces, file was
considered to have no license information in it, and the top level
COPYING file license applied.
For non */uapi/* files that summary was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 11139
and resulted in the first patch in this series.
If that file was a */uapi/* path one, it was "GPL-2.0 WITH
Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 WITH Linux-syscall-note 930
and resulted in the second patch in this series.
- if a file had some form of licensing information in it, and was one
of the */uapi/* ones, it was denoted with the Linux-syscall-note if
any GPL family license was found in the file or had no licensing in
it (per prior point). Results summary:
SPDX license identifier # files
---------------------------------------------------|------
GPL-2.0 WITH Linux-syscall-note 270
GPL-2.0+ WITH Linux-syscall-note 169
((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21
((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17
LGPL-2.1+ WITH Linux-syscall-note 15
GPL-1.0+ WITH Linux-syscall-note 14
((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5
LGPL-2.0+ WITH Linux-syscall-note 4
LGPL-2.1 WITH Linux-syscall-note 3
((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3
((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1
and that resulted in the third patch in this series.
- when the two scanners agreed on the detected license(s), that became
the concluded license(s).
- when there was disagreement between the two scanners (one detected a
license but the other didn't, or they both detected different
licenses) a manual inspection of the file occurred.
- In most cases a manual inspection of the information in the file
resulted in a clear resolution of the license that should apply (and
which scanner probably needed to revisit its heuristics).
- When it was not immediately clear, the license identifier was
confirmed with lawyers working with the Linux Foundation.
- If there was any question as to the appropriate license identifier,
the file was flagged for further research and to be revisited later
in time.
In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.
Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights. The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.
Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.
In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.
Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
- a full scancode scan run, collecting the matched texts, detected
license ids and scores
- reviewing anything where there was a license detected (about 500+
files) to ensure that the applied SPDX license was correct
- reviewing anything where there was no detection but the patch license
was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
SPDX license was correct
This produced a worksheet with 20 files needing minor correction. This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.
These .csv files were then reviewed by Greg. Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected. This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.) Finally Greg ran the script using the .csv files to
generate the patches.
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-01 22:07:57 +08:00
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// SPDX-License-Identifier: GPL-2.0
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2005-04-17 06:20:36 +08:00
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/*
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* linux/arch/alpha/kernel/sys_sio.c
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*
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* Copyright (C) 1995 David A Rusling
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* Copyright (C) 1996 Jay A Estabrook
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* Copyright (C) 1998, 1999 Richard Henderson
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*
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* Code for all boards that route the PCI interrupts through the SIO
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* PCI/ISA bridge. This includes Noname (AXPpci33), Multia (UDB),
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* Kenetics's Platform 2000, Avanti (AlphaStation), XL, and AlphaBook1.
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/mm.h>
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#include <linux/sched.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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2006-07-10 19:44:13 +08:00
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#include <linux/screen_info.h>
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2005-04-17 06:20:36 +08:00
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#include <asm/compiler.h>
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#include <asm/ptrace.h>
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#include <asm/dma.h>
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#include <asm/irq.h>
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#include <asm/mmu_context.h>
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#include <asm/io.h>
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#include <asm/pgtable.h>
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#include <asm/core_apecs.h>
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#include <asm/core_lca.h>
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#include <asm/tlbflush.h>
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#include "proto.h"
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#include "irq_impl.h"
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#include "pci_impl.h"
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#include "machvec_impl.h"
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2010-06-16 01:22:11 +08:00
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#include "pc873xx.h"
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2005-04-17 06:20:36 +08:00
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#if defined(ALPHA_RESTORE_SRM_SETUP)
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/* Save LCA configuration data as the console had it set up. */
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struct
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{
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unsigned int orig_route_tab; /* for SAVE/RESTORE */
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} saved_config __attribute((common));
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#endif
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static void __init
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sio_init_irq(void)
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{
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if (alpha_using_srm)
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alpha_mv.device_interrupt = srm_device_interrupt;
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init_i8259a_irqs();
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common_init_isa_dma();
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}
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static inline void __init
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alphabook1_init_arch(void)
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{
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/* The AlphaBook1 has LCD video fixed at 800x600,
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37 rows and 100 cols. */
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screen_info.orig_y = 37;
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screen_info.orig_video_cols = 100;
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screen_info.orig_video_lines = 37;
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lca_init_arch();
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}
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/*
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* sio_route_tab selects irq routing in PCI/ISA bridge so that:
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* PIRQ0 -> irq 15
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* PIRQ1 -> irq 9
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* PIRQ2 -> irq 10
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* PIRQ3 -> irq 11
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*
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* This probably ought to be configurable via MILO. For
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* example, sound boards seem to like using IRQ 9.
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*
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* This is NOT how we should do it. PIRQ0-X should have
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2007-10-20 07:04:37 +08:00
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* their own IRQs, the way intel uses the IO-APIC IRQs.
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2005-04-17 06:20:36 +08:00
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*/
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static void __init
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sio_pci_route(void)
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{
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2007-04-17 13:53:17 +08:00
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unsigned int orig_route_tab;
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/* First, ALWAYS read and print the original setting. */
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2005-04-17 06:20:36 +08:00
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pci_bus_read_config_dword(pci_isa_hose->bus, PCI_DEVFN(7, 0), 0x60,
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2007-04-17 13:53:17 +08:00
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&orig_route_tab);
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2008-04-28 17:13:46 +08:00
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printk("%s: PIRQ original 0x%x new 0x%x\n", __func__,
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2007-04-17 13:53:17 +08:00
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orig_route_tab, alpha_mv.sys.sio.route_tab);
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#if defined(ALPHA_RESTORE_SRM_SETUP)
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saved_config.orig_route_tab = orig_route_tab;
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2005-04-17 06:20:36 +08:00
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#endif
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/* Now override with desired setting. */
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pci_bus_write_config_dword(pci_isa_hose->bus, PCI_DEVFN(7, 0), 0x60,
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alpha_mv.sys.sio.route_tab);
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}
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2018-01-16 19:52:59 +08:00
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static bool sio_pci_dev_irq_needs_level(const struct pci_dev *dev)
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{
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if ((dev->class >> 16 == PCI_BASE_CLASS_BRIDGE) &&
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(dev->class >> 8 != PCI_CLASS_BRIDGE_PCMCIA))
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return false;
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return true;
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}
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2005-04-17 06:20:36 +08:00
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static unsigned int __init
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sio_collect_irq_levels(void)
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{
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unsigned int level_bits = 0;
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struct pci_dev *dev = NULL;
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/* Iterate through the devices, collecting IRQ levels. */
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2005-11-07 15:39:32 +08:00
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for_each_pci_dev(dev) {
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2018-01-16 19:52:59 +08:00
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if (!sio_pci_dev_irq_needs_level(dev))
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2005-04-17 06:20:36 +08:00
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continue;
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if (dev->irq)
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level_bits |= (1 << dev->irq);
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}
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return level_bits;
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}
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2018-01-16 19:52:59 +08:00
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static void __sio_fixup_irq_levels(unsigned int level_bits, bool reset)
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2005-04-17 06:20:36 +08:00
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{
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unsigned int old_level_bits;
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/*
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* Now, make all PCI interrupts level sensitive. Notice:
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* these registers must be accessed byte-wise. inw()/outw()
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* don't work.
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*
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* Make sure to turn off any level bits set for IRQs 9,10,11,15,
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* so that the only bits getting set are for devices actually found.
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* Note that we do preserve the remainder of the bits, which we hope
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* will be set correctly by ARC/SRM.
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*
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* Note: we at least preserve any level-set bits on AlphaBook1
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*/
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old_level_bits = inb(0x4d0) | (inb(0x4d1) << 8);
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2018-01-16 19:52:59 +08:00
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if (reset)
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old_level_bits &= 0x71ff;
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level_bits |= old_level_bits;
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2005-04-17 06:20:36 +08:00
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outb((level_bits >> 0) & 0xff, 0x4d0);
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outb((level_bits >> 8) & 0xff, 0x4d1);
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}
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2018-01-16 19:52:59 +08:00
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static inline void
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sio_fixup_irq_levels(unsigned int level_bits)
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{
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__sio_fixup_irq_levels(level_bits, true);
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}
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2017-10-26 22:54:15 +08:00
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static inline int
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2011-06-10 22:30:21 +08:00
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noname_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
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2005-04-17 06:20:36 +08:00
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{
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/*
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* The Noname board has 5 PCI slots with each of the 4
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* interrupt pins routed to different pins on the PCI/ISA
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* bridge (PIRQ0-PIRQ3). The table below is based on
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* information available at:
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*
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* http://ftp.digital.com/pub/DEC/axppci/ref_interrupts.txt
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*
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* I have no information on the Avanti interrupt routing, but
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* the routing seems to be identical to the Noname except
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* that the Avanti has an additional slot whose routing I'm
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* unsure of.
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*
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* pirq_tab[0] is a fake entry to deal with old PCI boards
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* that have the interrupt pin number hardwired to 0 (meaning
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* that they use the default INTA line, if they are interrupt
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* driven at all).
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*/
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2017-10-26 22:54:15 +08:00
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static char irq_tab[][5] = {
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2005-04-17 06:20:36 +08:00
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/*INT A B C D */
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{ 3, 3, 3, 3, 3}, /* idsel 6 (53c810) */
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{-1, -1, -1, -1, -1}, /* idsel 7 (SIO: PCI/ISA bridge) */
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{ 2, 2, -1, -1, -1}, /* idsel 8 (Hack: slot closest ISA) */
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{-1, -1, -1, -1, -1}, /* idsel 9 (unused) */
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{-1, -1, -1, -1, -1}, /* idsel 10 (unused) */
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{ 0, 0, 2, 1, 0}, /* idsel 11 KN25_PCI_SLOT0 */
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{ 1, 1, 0, 2, 1}, /* idsel 12 KN25_PCI_SLOT1 */
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{ 2, 2, 1, 0, 2}, /* idsel 13 KN25_PCI_SLOT2 */
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{ 0, 0, 0, 0, 0}, /* idsel 14 AS255 TULIP */
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};
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const long min_idsel = 6, max_idsel = 14, irqs_per_slot = 5;
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int irq = COMMON_TABLE_LOOKUP, tmp;
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tmp = __kernel_extbl(alpha_mv.sys.sio.route_tab, irq);
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2018-01-16 19:52:59 +08:00
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irq = irq >= 0 ? tmp : -1;
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/* Fixup IRQ level if an actual IRQ mapping is detected */
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if (sio_pci_dev_irq_needs_level(dev) && irq >= 0)
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__sio_fixup_irq_levels(1 << irq, false);
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return irq;
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2005-04-17 06:20:36 +08:00
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}
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2017-10-26 22:54:15 +08:00
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static inline int
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2011-06-10 22:30:21 +08:00
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p2k_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
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2005-04-17 06:20:36 +08:00
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{
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2017-10-26 22:54:15 +08:00
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static char irq_tab[][5] = {
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2005-04-17 06:20:36 +08:00
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/*INT A B C D */
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{ 0, 0, -1, -1, -1}, /* idsel 6 (53c810) */
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{-1, -1, -1, -1, -1}, /* idsel 7 (SIO: PCI/ISA bridge) */
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{ 1, 1, 2, 3, 0}, /* idsel 8 (slot A) */
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{ 2, 2, 3, 0, 1}, /* idsel 9 (slot B) */
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{-1, -1, -1, -1, -1}, /* idsel 10 (unused) */
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{-1, -1, -1, -1, -1}, /* idsel 11 (unused) */
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{ 3, 3, -1, -1, -1}, /* idsel 12 (CMD0646) */
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};
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const long min_idsel = 6, max_idsel = 12, irqs_per_slot = 5;
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int irq = COMMON_TABLE_LOOKUP, tmp;
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tmp = __kernel_extbl(alpha_mv.sys.sio.route_tab, irq);
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|
|
return irq >= 0 ? tmp : -1;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void __init
|
|
|
|
|
noname_init_pci(void)
|
|
|
|
|
{
|
|
|
|
|
common_init_pci();
|
|
|
|
|
sio_pci_route();
|
|
|
|
|
sio_fixup_irq_levels(sio_collect_irq_levels());
|
2010-06-16 01:22:11 +08:00
|
|
|
|
|
|
|
|
if (pc873xx_probe() == -1) {
|
|
|
|
|
printk(KERN_ERR "Probing for PC873xx Super IO chip failed.\n");
|
|
|
|
|
} else {
|
|
|
|
|
printk(KERN_INFO "Found %s Super IO chip at 0x%x\n",
|
|
|
|
|
pc873xx_get_model(), pc873xx_get_base());
|
|
|
|
|
|
|
|
|
|
/* Enabling things in the Super IO chip doesn't actually
|
|
|
|
|
* configure and enable things, the legacy drivers still
|
|
|
|
|
* need to do the actual configuration and enabling.
|
|
|
|
|
* This only unblocks them.
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
#if !defined(CONFIG_ALPHA_AVANTI)
|
|
|
|
|
/* Don't bother on the Avanti family.
|
|
|
|
|
* None of them had on-board IDE.
|
|
|
|
|
*/
|
|
|
|
|
pc873xx_enable_ide();
|
|
|
|
|
#endif
|
|
|
|
|
pc873xx_enable_epp19();
|
|
|
|
|
}
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void __init
|
|
|
|
|
alphabook1_init_pci(void)
|
|
|
|
|
{
|
|
|
|
|
struct pci_dev *dev;
|
|
|
|
|
unsigned char orig, config;
|
|
|
|
|
|
|
|
|
|
common_init_pci();
|
|
|
|
|
sio_pci_route();
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* On the AlphaBook1, the PCMCIA chip (Cirrus 6729)
|
|
|
|
|
* is sensitive to PCI bus bursts, so we must DISABLE
|
|
|
|
|
* burst mode for the NCR 8xx SCSI... :-(
|
|
|
|
|
*
|
|
|
|
|
* Note that the NCR810 SCSI driver must preserve the
|
|
|
|
|
* setting of the bit in order for this to work. At the
|
|
|
|
|
* moment (2.0.29), ncr53c8xx.c does NOT do this, but
|
|
|
|
|
* 53c7,8xx.c DOES.
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
dev = NULL;
|
2005-11-07 15:39:32 +08:00
|
|
|
while ((dev = pci_get_device(PCI_VENDOR_ID_NCR, PCI_ANY_ID, dev))) {
|
|
|
|
|
if (dev->device == PCI_DEVICE_ID_NCR_53C810
|
2005-04-17 06:20:36 +08:00
|
|
|
|| dev->device == PCI_DEVICE_ID_NCR_53C815
|
|
|
|
|
|| dev->device == PCI_DEVICE_ID_NCR_53C820
|
|
|
|
|
|| dev->device == PCI_DEVICE_ID_NCR_53C825) {
|
|
|
|
|
unsigned long io_port;
|
|
|
|
|
unsigned char ctest4;
|
|
|
|
|
|
|
|
|
|
io_port = dev->resource[0].start;
|
|
|
|
|
ctest4 = inb(io_port+0x21);
|
|
|
|
|
if (!(ctest4 & 0x80)) {
|
|
|
|
|
printk("AlphaBook1 NCR init: setting"
|
|
|
|
|
" burst disable\n");
|
|
|
|
|
outb(ctest4 | 0x80, io_port+0x21);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Do not set *ANY* level triggers for AlphaBook1. */
|
|
|
|
|
sio_fixup_irq_levels(0);
|
|
|
|
|
|
|
|
|
|
/* Make sure that register PR1 indicates 1Mb mem */
|
|
|
|
|
outb(0x0f, 0x3ce); orig = inb(0x3cf); /* read PR5 */
|
|
|
|
|
outb(0x0f, 0x3ce); outb(0x05, 0x3cf); /* unlock PR0-4 */
|
|
|
|
|
outb(0x0b, 0x3ce); config = inb(0x3cf); /* read PR1 */
|
|
|
|
|
if ((config & 0xc0) != 0xc0) {
|
|
|
|
|
printk("AlphaBook1 VGA init: setting 1Mb memory\n");
|
|
|
|
|
config |= 0xc0;
|
|
|
|
|
outb(0x0b, 0x3ce); outb(config, 0x3cf); /* write PR1 */
|
|
|
|
|
}
|
|
|
|
|
outb(0x0f, 0x3ce); outb(orig, 0x3cf); /* (re)lock PR0-4 */
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
sio_kill_arch(int mode)
|
|
|
|
|
{
|
|
|
|
|
#if defined(ALPHA_RESTORE_SRM_SETUP)
|
|
|
|
|
/* Since we cannot read the PCI DMA Window CSRs, we
|
|
|
|
|
* cannot restore them here.
|
|
|
|
|
*
|
|
|
|
|
* However, we CAN read the PIRQ route register, so restore it
|
|
|
|
|
* now...
|
|
|
|
|
*/
|
|
|
|
|
pci_bus_write_config_dword(pci_isa_hose->bus, PCI_DEVFN(7, 0), 0x60,
|
|
|
|
|
saved_config.orig_route_tab);
|
|
|
|
|
#endif
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* The System Vectors
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
#if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_BOOK1)
|
|
|
|
|
struct alpha_machine_vector alphabook1_mv __initmv = {
|
|
|
|
|
.vector_name = "AlphaBook1",
|
|
|
|
|
DO_EV4_MMU,
|
|
|
|
|
DO_DEFAULT_RTC,
|
|
|
|
|
DO_LCA_IO,
|
|
|
|
|
.machine_check = lca_machine_check,
|
|
|
|
|
.max_isa_dma_address = ALPHA_MAX_ISA_DMA_ADDRESS,
|
|
|
|
|
.min_io_address = DEFAULT_IO_BASE,
|
|
|
|
|
.min_mem_address = APECS_AND_LCA_DEFAULT_MEM_BASE,
|
|
|
|
|
|
|
|
|
|
.nr_irqs = 16,
|
|
|
|
|
.device_interrupt = isa_device_interrupt,
|
|
|
|
|
|
|
|
|
|
.init_arch = alphabook1_init_arch,
|
|
|
|
|
.init_irq = sio_init_irq,
|
|
|
|
|
.init_rtc = common_init_rtc,
|
|
|
|
|
.init_pci = alphabook1_init_pci,
|
|
|
|
|
.kill_arch = sio_kill_arch,
|
|
|
|
|
.pci_map_irq = noname_map_irq,
|
|
|
|
|
.pci_swizzle = common_swizzle,
|
|
|
|
|
|
|
|
|
|
.sys = { .sio = {
|
|
|
|
|
/* NCR810 SCSI is 14, PCMCIA controller is 15. */
|
|
|
|
|
.route_tab = 0x0e0f0a0a,
|
|
|
|
|
}}
|
|
|
|
|
};
|
|
|
|
|
ALIAS_MV(alphabook1)
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
#if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_AVANTI)
|
|
|
|
|
struct alpha_machine_vector avanti_mv __initmv = {
|
|
|
|
|
.vector_name = "Avanti",
|
|
|
|
|
DO_EV4_MMU,
|
|
|
|
|
DO_DEFAULT_RTC,
|
|
|
|
|
DO_APECS_IO,
|
|
|
|
|
.machine_check = apecs_machine_check,
|
|
|
|
|
.max_isa_dma_address = ALPHA_MAX_ISA_DMA_ADDRESS,
|
|
|
|
|
.min_io_address = DEFAULT_IO_BASE,
|
|
|
|
|
.min_mem_address = APECS_AND_LCA_DEFAULT_MEM_BASE,
|
|
|
|
|
|
|
|
|
|
.nr_irqs = 16,
|
|
|
|
|
.device_interrupt = isa_device_interrupt,
|
|
|
|
|
|
|
|
|
|
.init_arch = apecs_init_arch,
|
|
|
|
|
.init_irq = sio_init_irq,
|
|
|
|
|
.init_rtc = common_init_rtc,
|
|
|
|
|
.init_pci = noname_init_pci,
|
|
|
|
|
.kill_arch = sio_kill_arch,
|
|
|
|
|
.pci_map_irq = noname_map_irq,
|
|
|
|
|
.pci_swizzle = common_swizzle,
|
|
|
|
|
|
|
|
|
|
.sys = { .sio = {
|
2007-04-17 13:53:17 +08:00
|
|
|
.route_tab = 0x0b0a050f, /* leave 14 for IDE, 9 for SND */
|
2005-04-17 06:20:36 +08:00
|
|
|
}}
|
|
|
|
|
};
|
|
|
|
|
ALIAS_MV(avanti)
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
#if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_NONAME)
|
|
|
|
|
struct alpha_machine_vector noname_mv __initmv = {
|
|
|
|
|
.vector_name = "Noname",
|
|
|
|
|
DO_EV4_MMU,
|
|
|
|
|
DO_DEFAULT_RTC,
|
|
|
|
|
DO_LCA_IO,
|
|
|
|
|
.machine_check = lca_machine_check,
|
|
|
|
|
.max_isa_dma_address = ALPHA_MAX_ISA_DMA_ADDRESS,
|
|
|
|
|
.min_io_address = DEFAULT_IO_BASE,
|
|
|
|
|
.min_mem_address = APECS_AND_LCA_DEFAULT_MEM_BASE,
|
|
|
|
|
|
|
|
|
|
.nr_irqs = 16,
|
|
|
|
|
.device_interrupt = srm_device_interrupt,
|
|
|
|
|
|
|
|
|
|
.init_arch = lca_init_arch,
|
|
|
|
|
.init_irq = sio_init_irq,
|
|
|
|
|
.init_rtc = common_init_rtc,
|
|
|
|
|
.init_pci = noname_init_pci,
|
|
|
|
|
.kill_arch = sio_kill_arch,
|
|
|
|
|
.pci_map_irq = noname_map_irq,
|
|
|
|
|
.pci_swizzle = common_swizzle,
|
|
|
|
|
|
|
|
|
|
.sys = { .sio = {
|
|
|
|
|
/* For UDB, the only available PCI slot must not map to IRQ 9,
|
|
|
|
|
since that's the builtin MSS sound chip. That PCI slot
|
|
|
|
|
will map to PIRQ1 (for INTA at least), so we give it IRQ 15
|
|
|
|
|
instead.
|
|
|
|
|
|
|
|
|
|
Unfortunately we have to do this for NONAME as well, since
|
|
|
|
|
they are co-indicated when the platform type "Noname" is
|
|
|
|
|
selected... :-( */
|
|
|
|
|
|
|
|
|
|
.route_tab = 0x0b0a0f0d,
|
|
|
|
|
}}
|
|
|
|
|
};
|
|
|
|
|
ALIAS_MV(noname)
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
#if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_P2K)
|
|
|
|
|
struct alpha_machine_vector p2k_mv __initmv = {
|
|
|
|
|
.vector_name = "Platform2000",
|
|
|
|
|
DO_EV4_MMU,
|
|
|
|
|
DO_DEFAULT_RTC,
|
|
|
|
|
DO_LCA_IO,
|
|
|
|
|
.machine_check = lca_machine_check,
|
|
|
|
|
.max_isa_dma_address = ALPHA_MAX_ISA_DMA_ADDRESS,
|
|
|
|
|
.min_io_address = DEFAULT_IO_BASE,
|
|
|
|
|
.min_mem_address = APECS_AND_LCA_DEFAULT_MEM_BASE,
|
|
|
|
|
|
|
|
|
|
.nr_irqs = 16,
|
|
|
|
|
.device_interrupt = srm_device_interrupt,
|
|
|
|
|
|
|
|
|
|
.init_arch = lca_init_arch,
|
|
|
|
|
.init_irq = sio_init_irq,
|
|
|
|
|
.init_rtc = common_init_rtc,
|
|
|
|
|
.init_pci = noname_init_pci,
|
|
|
|
|
.kill_arch = sio_kill_arch,
|
|
|
|
|
.pci_map_irq = p2k_map_irq,
|
|
|
|
|
.pci_swizzle = common_swizzle,
|
|
|
|
|
|
|
|
|
|
.sys = { .sio = {
|
|
|
|
|
.route_tab = 0x0b0a090f,
|
|
|
|
|
}}
|
|
|
|
|
};
|
|
|
|
|
ALIAS_MV(p2k)
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
#if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_XL)
|
|
|
|
|
struct alpha_machine_vector xl_mv __initmv = {
|
|
|
|
|
.vector_name = "XL",
|
|
|
|
|
DO_EV4_MMU,
|
|
|
|
|
DO_DEFAULT_RTC,
|
|
|
|
|
DO_APECS_IO,
|
|
|
|
|
.machine_check = apecs_machine_check,
|
|
|
|
|
.max_isa_dma_address = ALPHA_XL_MAX_ISA_DMA_ADDRESS,
|
|
|
|
|
.min_io_address = DEFAULT_IO_BASE,
|
|
|
|
|
.min_mem_address = XL_DEFAULT_MEM_BASE,
|
|
|
|
|
|
|
|
|
|
.nr_irqs = 16,
|
|
|
|
|
.device_interrupt = isa_device_interrupt,
|
|
|
|
|
|
|
|
|
|
.init_arch = apecs_init_arch,
|
|
|
|
|
.init_irq = sio_init_irq,
|
|
|
|
|
.init_rtc = common_init_rtc,
|
|
|
|
|
.init_pci = noname_init_pci,
|
|
|
|
|
.kill_arch = sio_kill_arch,
|
|
|
|
|
.pci_map_irq = noname_map_irq,
|
|
|
|
|
.pci_swizzle = common_swizzle,
|
|
|
|
|
|
|
|
|
|
.sys = { .sio = {
|
|
|
|
|
.route_tab = 0x0b0a090f,
|
|
|
|
|
}}
|
|
|
|
|
};
|
|
|
|
|
ALIAS_MV(xl)
|
|
|
|
|
#endif
|