2020-05-01 22:58:50 +08:00
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// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
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2019-04-13 00:08:52 +08:00
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//
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// This file is provided under a dual BSD/GPLv2 license. When using or
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// redistributing this file, you may do so under either license.
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//
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// Copyright(c) 2018 Intel Corporation. All rights reserved.
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//
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// Authors: Liam Girdwood <liam.r.girdwood@linux.intel.com>
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// Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
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// Rander Wang <rander.wang@intel.com>
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// Keyon Jie <yang.jie@linux.intel.com>
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//
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/*
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* Hardware interface for generic Intel audio DSP HDA IP
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*/
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2021-08-13 07:19:40 +08:00
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#include <linux/moduleparam.h>
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2019-04-13 00:08:52 +08:00
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#include <sound/hda_register.h>
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#include <sound/pcm_params.h>
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2022-09-19 20:21:06 +08:00
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#include <trace/events/sof_intel.h>
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2019-12-05 05:15:51 +08:00
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#include "../sof-audio.h"
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2019-04-13 00:08:52 +08:00
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#include "../ops.h"
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#include "hda.h"
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#define SDnFMT_BASE(x) ((x) << 14)
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#define SDnFMT_MULT(x) (((x) - 1) << 11)
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#define SDnFMT_DIV(x) (((x) - 1) << 8)
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#define SDnFMT_BITS(x) ((x) << 4)
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#define SDnFMT_CHAN(x) ((x) << 0)
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2021-08-13 07:19:40 +08:00
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static bool hda_always_enable_dmi_l1;
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module_param_named(always_enable_dmi_l1, hda_always_enable_dmi_l1, bool, 0444);
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MODULE_PARM_DESC(always_enable_dmi_l1, "SOF HDA always enable DMI l1");
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2021-11-20 07:08:52 +08:00
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static bool hda_disable_rewinds = IS_ENABLED(CONFIG_SND_SOC_SOF_HDA_DISABLE_REWINDS);
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module_param_named(disable_rewinds, hda_disable_rewinds, bool, 0444);
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MODULE_PARM_DESC(disable_rewinds, "SOF HDA disable rewinds");
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2020-02-18 22:39:21 +08:00
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u32 hda_dsp_get_mult_div(struct snd_sof_dev *sdev, int rate)
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2019-04-13 00:08:52 +08:00
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{
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switch (rate) {
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case 8000:
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return SDnFMT_DIV(6);
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case 9600:
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return SDnFMT_DIV(5);
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case 11025:
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return SDnFMT_BASE(1) | SDnFMT_DIV(4);
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case 16000:
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return SDnFMT_DIV(3);
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case 22050:
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return SDnFMT_BASE(1) | SDnFMT_DIV(2);
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case 32000:
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return SDnFMT_DIV(3) | SDnFMT_MULT(2);
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case 44100:
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return SDnFMT_BASE(1);
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case 48000:
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return 0;
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case 88200:
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return SDnFMT_BASE(1) | SDnFMT_MULT(2);
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case 96000:
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return SDnFMT_MULT(2);
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case 176400:
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return SDnFMT_BASE(1) | SDnFMT_MULT(4);
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case 192000:
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return SDnFMT_MULT(4);
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default:
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dev_warn(sdev->dev, "can't find div rate %d using 48kHz\n",
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rate);
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return 0; /* use 48KHz if not found */
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}
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};
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2020-02-18 22:39:21 +08:00
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u32 hda_dsp_get_bits(struct snd_sof_dev *sdev, int sample_bits)
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2019-04-13 00:08:52 +08:00
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{
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switch (sample_bits) {
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case 8:
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return SDnFMT_BITS(0);
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case 16:
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return SDnFMT_BITS(1);
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case 20:
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return SDnFMT_BITS(2);
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case 24:
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return SDnFMT_BITS(3);
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case 32:
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return SDnFMT_BITS(4);
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default:
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dev_warn(sdev->dev, "can't find %d bits using 16bit\n",
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sample_bits);
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return SDnFMT_BITS(1); /* use 16bits format if not found */
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}
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};
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int hda_dsp_pcm_hw_params(struct snd_sof_dev *sdev,
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struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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2022-03-10 12:27:12 +08:00
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struct snd_sof_platform_stream_params *platform_params)
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2019-04-13 00:08:52 +08:00
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{
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struct hdac_stream *hstream = substream->runtime->private_data;
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2022-02-09 14:31:04 +08:00
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struct hdac_ext_stream *hext_stream = stream_to_hdac_ext_stream(hstream);
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2019-04-13 00:08:52 +08:00
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struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata;
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struct snd_dma_buffer *dmab;
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int ret;
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u32 size, rate, bits;
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size = params_buffer_bytes(params);
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2020-02-18 22:39:21 +08:00
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rate = hda_dsp_get_mult_div(sdev, params_rate(params));
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bits = hda_dsp_get_bits(sdev, params_width(params));
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2019-04-13 00:08:52 +08:00
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hstream->substream = substream;
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dmab = substream->runtime->dma_buffer_p;
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hstream->format_val = rate | bits | (params_channels(params) - 1);
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hstream->bufsize = size;
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hstream->period_bytes = params_period_bytes(params);
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hstream->no_period_wakeup =
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(params->info & SNDRV_PCM_INFO_NO_PERIOD_WAKEUP) &&
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(params->flags & SNDRV_PCM_HW_PARAMS_NO_PERIOD_WAKEUP);
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2022-02-09 14:31:04 +08:00
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ret = hda_dsp_stream_hw_params(sdev, hext_stream, dmab, params);
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2019-04-13 00:08:52 +08:00
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if (ret < 0) {
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2021-02-09 07:21:46 +08:00
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dev_err(sdev->dev, "error: hdac prepare failed: %d\n", ret);
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2019-04-13 00:08:52 +08:00
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return ret;
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}
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2021-11-20 07:08:52 +08:00
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/* enable SPIB when rewinds are disabled */
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if (hda_disable_rewinds)
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2022-02-09 14:31:04 +08:00
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hda_dsp_stream_spib_config(sdev, hext_stream, HDA_DSP_SPIB_ENABLE, 0);
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2021-11-20 07:08:52 +08:00
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else
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2022-02-09 14:31:04 +08:00
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hda_dsp_stream_spib_config(sdev, hext_stream, HDA_DSP_SPIB_DISABLE, 0);
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2019-04-13 00:08:52 +08:00
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2022-03-10 12:27:12 +08:00
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if (hda)
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platform_params->no_ipc_position = hda->no_ipc_position;
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2019-04-13 00:08:52 +08:00
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2022-03-10 12:27:12 +08:00
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platform_params->stream_tag = hstream->stream_tag;
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2019-04-13 00:08:52 +08:00
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return 0;
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}
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2021-11-20 07:08:52 +08:00
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/* update SPIB register with appl position */
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int hda_dsp_pcm_ack(struct snd_sof_dev *sdev, struct snd_pcm_substream *substream)
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{
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struct hdac_stream *hstream = substream->runtime->private_data;
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struct snd_pcm_runtime *runtime = substream->runtime;
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ssize_t appl_pos, buf_size;
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u32 spib;
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appl_pos = frames_to_bytes(runtime, runtime->control->appl_ptr);
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buf_size = frames_to_bytes(runtime, runtime->buffer_size);
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spib = appl_pos % buf_size;
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/* Allowable value for SPIB is 1 byte to max buffer size */
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if (!spib)
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spib = buf_size;
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2022-10-20 00:21:15 +08:00
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sof_io_write(sdev, hstream->spib_addr, spib);
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2021-11-20 07:08:52 +08:00
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return 0;
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}
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2019-04-13 00:08:52 +08:00
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int hda_dsp_pcm_trigger(struct snd_sof_dev *sdev,
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struct snd_pcm_substream *substream, int cmd)
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{
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struct hdac_stream *hstream = substream->runtime->private_data;
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2022-02-09 14:31:04 +08:00
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struct hdac_ext_stream *hext_stream = stream_to_hdac_ext_stream(hstream);
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2019-04-13 00:08:52 +08:00
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2022-02-09 14:31:04 +08:00
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return hda_dsp_stream_trigger(sdev, hext_stream, cmd);
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2019-04-13 00:08:52 +08:00
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}
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snd_pcm_uframes_t hda_dsp_pcm_pointer(struct snd_sof_dev *sdev,
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struct snd_pcm_substream *substream)
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{
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2020-07-20 09:18:06 +08:00
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struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
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2019-12-05 05:15:51 +08:00
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struct snd_soc_component *scomp = sdev->component;
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2019-04-13 00:08:52 +08:00
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struct hdac_stream *hstream = substream->runtime->private_data;
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struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata;
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struct snd_sof_pcm *spcm;
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snd_pcm_uframes_t pos;
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2019-12-05 05:15:51 +08:00
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spcm = snd_sof_find_spcm_dai(scomp, rtd);
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2019-04-13 00:08:52 +08:00
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if (!spcm) {
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dev_warn_ratelimited(sdev->dev, "warn: can't find PCM with DAI ID %d\n",
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rtd->dai_link->id);
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return 0;
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}
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if (hda && !hda->no_ipc_position) {
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/* read position from IPC position */
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pos = spcm->stream[substream->stream].posn.host_posn;
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goto found;
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}
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2022-06-17 04:19:53 +08:00
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pos = hda_dsp_stream_get_position(hstream, substream->stream, true);
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2019-04-13 00:08:52 +08:00
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found:
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pos = bytes_to_frames(substream->runtime, pos);
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2022-09-19 20:21:06 +08:00
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trace_sof_intel_hda_dsp_pcm(sdev, hstream, substream, pos);
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2019-04-13 00:08:52 +08:00
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return pos;
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}
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int hda_dsp_pcm_open(struct snd_sof_dev *sdev,
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struct snd_pcm_substream *substream)
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{
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2021-01-27 10:07:36 +08:00
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struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
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2021-08-13 07:19:40 +08:00
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struct snd_pcm_runtime *runtime = substream->runtime;
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2021-01-27 10:07:36 +08:00
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struct snd_soc_component *scomp = sdev->component;
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2019-04-13 00:08:52 +08:00
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struct hdac_ext_stream *dsp_stream;
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2021-01-27 10:07:36 +08:00
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struct snd_sof_pcm *spcm;
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2019-04-13 00:08:52 +08:00
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int direction = substream->stream;
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2021-01-27 10:07:36 +08:00
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u32 flags = 0;
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spcm = snd_sof_find_spcm_dai(scomp, rtd);
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if (!spcm) {
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dev_err(sdev->dev, "error: can't find PCM with DAI ID %d\n", rtd->dai_link->id);
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return -EINVAL;
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}
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2019-04-13 00:08:52 +08:00
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2021-11-20 07:08:52 +08:00
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/*
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* if we want the .ack to work, we need to prevent the control from being mapped.
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* The status can still be mapped.
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*/
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if (hda_disable_rewinds)
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runtime->hw.info |= SNDRV_PCM_INFO_NO_REWINDS | SNDRV_PCM_INFO_SYNC_APPLPTR;
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2021-08-13 07:19:40 +08:00
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/*
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* All playback streams are DMI L1 capable, capture streams need
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* pause push/release to be disabled
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*/
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if (hda_always_enable_dmi_l1 && direction == SNDRV_PCM_STREAM_CAPTURE)
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runtime->hw.info &= ~SNDRV_PCM_INFO_PAUSE;
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if (hda_always_enable_dmi_l1 ||
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2022-03-11 01:16:47 +08:00
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direction == SNDRV_PCM_STREAM_PLAYBACK ||
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2021-01-27 10:07:36 +08:00
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spcm->stream[substream->stream].d0i3_compatible)
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flags |= SOF_HDA_STREAM_DMI_L1_COMPATIBLE;
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2019-04-13 00:08:52 +08:00
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2021-01-27 10:07:36 +08:00
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dsp_stream = hda_dsp_stream_get(sdev, direction, flags);
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2019-04-13 00:08:52 +08:00
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if (!dsp_stream) {
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dev_err(sdev->dev, "error: no stream available\n");
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return -ENODEV;
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}
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2020-11-18 22:05:45 +08:00
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/* minimum as per HDA spec */
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snd_pcm_hw_constraint_step(substream->runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 4);
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/* avoid circular buffer wrap in middle of period */
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snd_pcm_hw_constraint_integer(substream->runtime,
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SNDRV_PCM_HW_PARAM_PERIODS);
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2019-04-13 00:08:52 +08:00
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/* binding pcm substream to hda stream */
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substream->runtime->private_data = &dsp_stream->hstream;
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return 0;
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}
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int hda_dsp_pcm_close(struct snd_sof_dev *sdev,
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struct snd_pcm_substream *substream)
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{
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struct hdac_stream *hstream = substream->runtime->private_data;
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int direction = substream->stream;
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int ret;
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ret = hda_dsp_stream_put(sdev, direction, hstream->stream_tag);
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if (ret) {
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dev_dbg(sdev->dev, "stream %s not opened!\n", substream->name);
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return -ENODEV;
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}
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/* unbinding pcm substream to hda stream */
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substream->runtime->private_data = NULL;
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return 0;
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}
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