2020-05-01 22:58:50 +08:00
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// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
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2019-04-13 00:08:53 +08:00
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//
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// This file is provided under a dual BSD/GPLv2 license. When using or
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// redistributing this file, you may do so under either license.
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//
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// Copyright(c) 2018 Intel Corporation. All rights reserved.
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//
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// Authors: Keyon Jie <yang.jie@linux.intel.com>
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#include <linux/io.h>
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#include <sound/hdaudio.h>
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2021-02-06 02:46:30 +08:00
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#include <sound/hda_i915.h>
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2021-11-05 19:16:55 +08:00
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#include <sound/hda_codec.h>
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#include <sound/hda_register.h>
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2019-04-13 00:08:53 +08:00
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#include "../sof-priv.h"
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#include "hda.h"
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2019-08-08 02:50:50 +08:00
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#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA_AUDIO_CODEC)
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2019-08-09 19:01:00 +08:00
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#include "../../codecs/hdac_hda.h"
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2019-08-08 02:50:50 +08:00
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#define sof_hda_ext_ops snd_soc_hdac_hda_get_ops()
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#else
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#define sof_hda_ext_ops NULL
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2019-04-13 00:08:53 +08:00
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#endif
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2021-02-06 02:46:29 +08:00
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#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
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2021-11-05 19:16:55 +08:00
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static void update_codec_wake_enable(struct hdac_bus *bus, unsigned int addr, bool link_power)
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{
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unsigned int mask = snd_hdac_chip_readw(bus, WAKEEN);
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if (link_power)
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mask &= ~BIT(addr);
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else
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mask |= BIT(addr);
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snd_hdac_chip_updatew(bus, WAKEEN, STATESTS_INT_MASK, mask);
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}
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static void sof_hda_bus_link_power(struct hdac_device *codec, bool enable)
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{
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struct hdac_bus *bus = codec->bus;
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bool oldstate = test_bit(codec->addr, &bus->codec_powered);
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snd_hdac_ext_bus_link_power(codec, enable);
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if (enable == oldstate)
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return;
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/*
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* Both codec driver and controller can hold references to
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* display power. To avoid unnecessary power-up/down cycles,
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* controller doesn't immediately release its reference.
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*
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* If the codec driver powers down the link, release
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* the controller reference as well.
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*/
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if (codec->addr == HDA_IDISP_ADDR && !enable)
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snd_hdac_display_power(bus, HDA_CODEC_IDX_CONTROLLER, false);
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/* WAKEEN needs to be set for disabled links */
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update_codec_wake_enable(bus, codec->addr, enable);
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}
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static const struct hdac_bus_ops bus_core_ops = {
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.command = snd_hdac_bus_send_cmd,
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.get_response = snd_hdac_bus_get_response,
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.link_power = sof_hda_bus_link_power,
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};
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#endif
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2019-04-13 00:08:53 +08:00
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/*
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* This can be used for both with/without hda link support.
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*/
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void sof_hda_bus_init(struct hdac_bus *bus, struct device *dev)
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{
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#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
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snd_hdac_ext_bus_init(bus, dev, &bus_core_ops, sof_hda_ext_ops);
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#else /* CONFIG_SND_SOC_SOF_HDA */
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memset(bus, 0, sizeof(*bus));
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bus->dev = dev;
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INIT_LIST_HEAD(&bus->stream_list);
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bus->irq = -1;
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2019-05-01 07:09:23 +08:00
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/*
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* There is only one HDA bus atm. keep the index as 0.
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* Need to fix when there are more than one HDA bus.
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*/
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bus->idx = 0;
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2019-04-13 00:08:53 +08:00
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spin_lock_init(&bus->reg_lock);
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2019-08-08 02:50:50 +08:00
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#endif /* CONFIG_SND_SOC_SOF_HDA */
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2019-04-13 00:08:53 +08:00
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}
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