2019-05-29 01:10:04 +08:00
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/* SPDX-License-Identifier: GPL-2.0-only */
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2013-03-22 22:34:03 +08:00
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/*
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* Tegra host1x Job
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*
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* Copyright (c) 2011-2013, NVIDIA Corporation.
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*/
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#ifndef __HOST1X_JOB_H
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#define __HOST1X_JOB_H
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2019-10-28 20:37:13 +08:00
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#include <linux/dma-direction.h>
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2013-03-22 22:34:03 +08:00
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struct host1x_job_gather {
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2018-05-16 23:01:43 +08:00
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unsigned int words;
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2013-03-22 22:34:03 +08:00
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dma_addr_t base;
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struct host1x_bo *bo;
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2018-05-16 23:01:43 +08:00
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unsigned int offset;
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2013-03-22 22:34:03 +08:00
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bool handled;
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};
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2021-06-10 19:04:45 +08:00
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struct host1x_job_wait {
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u32 id;
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u32 threshold;
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u32 next_class;
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bool relative;
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};
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struct host1x_job_cmd {
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bool is_wait;
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union {
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struct host1x_job_gather gather;
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struct host1x_job_wait wait;
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};
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};
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2013-03-22 22:34:03 +08:00
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struct host1x_job_unpin_data {
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2021-09-09 21:51:24 +08:00
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struct host1x_bo_mapping *map;
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2013-03-22 22:34:03 +08:00
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};
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/*
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* Dump contents of job to debug output.
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*/
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void host1x_job_dump(struct device *dev, struct host1x_job *job);
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#endif
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