2020-02-20 17:58:40 +08:00
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
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*
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*/
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#ifndef _MHI_H_
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#define _MHI_H_
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#include <linux/device.h>
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#include <linux/dma-direction.h>
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#include <linux/mutex.h>
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2020-02-20 17:58:49 +08:00
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#include <linux/skbuff.h>
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2020-02-20 17:58:40 +08:00
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#include <linux/slab.h>
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2020-09-30 01:52:11 +08:00
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#include <linux/spinlock.h>
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2020-02-20 17:58:40 +08:00
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#include <linux/wait.h>
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#include <linux/workqueue.h>
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2020-09-30 01:52:08 +08:00
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#define MHI_MAX_OEM_PK_HASH_SEGMENTS 16
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2020-02-20 17:58:40 +08:00
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struct mhi_chan;
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struct mhi_event;
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struct mhi_ctxt;
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struct mhi_cmd;
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struct mhi_buf_info;
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/**
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* enum mhi_callback - MHI callback
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* @MHI_CB_IDLE: MHI entered idle state
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* @MHI_CB_PENDING_DATA: New data available for client to process
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* @MHI_CB_LPM_ENTER: MHI host entered low power mode
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* @MHI_CB_LPM_EXIT: MHI host about to exit low power mode
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* @MHI_CB_EE_RDDM: MHI device entered RDDM exec env
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* @MHI_CB_EE_MISSION_MODE: MHI device entered Mission Mode exec env
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* @MHI_CB_SYS_ERROR: MHI device entered error state (may recover)
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* @MHI_CB_FATAL_ERROR: MHI device entered fatal error state
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2020-02-20 17:58:48 +08:00
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* @MHI_CB_BW_REQ: Received a bandwidth switch request from device
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2020-02-20 17:58:40 +08:00
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*/
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enum mhi_callback {
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MHI_CB_IDLE,
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MHI_CB_PENDING_DATA,
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MHI_CB_LPM_ENTER,
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MHI_CB_LPM_EXIT,
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MHI_CB_EE_RDDM,
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MHI_CB_EE_MISSION_MODE,
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MHI_CB_SYS_ERROR,
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MHI_CB_FATAL_ERROR,
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2020-02-20 17:58:48 +08:00
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MHI_CB_BW_REQ,
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2020-02-20 17:58:40 +08:00
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};
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/**
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* enum mhi_flags - Transfer flags
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* @MHI_EOB: End of buffer for bulk transfer
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* @MHI_EOT: End of transfer
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* @MHI_CHAIN: Linked transfer
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*/
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enum mhi_flags {
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2020-05-01 03:05:50 +08:00
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MHI_EOB = BIT(0),
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MHI_EOT = BIT(1),
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MHI_CHAIN = BIT(2),
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};
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/**
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* enum mhi_device_type - Device types
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* @MHI_DEVICE_XFER: Handles data transfer
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* @MHI_DEVICE_CONTROLLER: Control device
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*/
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enum mhi_device_type {
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MHI_DEVICE_XFER,
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MHI_DEVICE_CONTROLLER,
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};
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/**
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* enum mhi_ch_type - Channel types
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* @MHI_CH_TYPE_INVALID: Invalid channel type
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* @MHI_CH_TYPE_OUTBOUND: Outbound channel to the device
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* @MHI_CH_TYPE_INBOUND: Inbound channel from the device
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* @MHI_CH_TYPE_INBOUND_COALESCED: Coalesced channel for the device to combine
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* multiple packets and send them as a single
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* large packet to reduce CPU consumption
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*/
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enum mhi_ch_type {
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MHI_CH_TYPE_INVALID = 0,
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MHI_CH_TYPE_OUTBOUND = DMA_TO_DEVICE,
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MHI_CH_TYPE_INBOUND = DMA_FROM_DEVICE,
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MHI_CH_TYPE_INBOUND_COALESCED = 3,
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};
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2020-02-20 17:58:45 +08:00
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/**
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2020-09-30 01:52:00 +08:00
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* struct image_info - Firmware and RDDM table
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* @mhi_buf: Buffer for firmware and RDDM table
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* @entries: # of entries in table
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2020-02-20 17:58:45 +08:00
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*/
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struct image_info {
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struct mhi_buf *mhi_buf;
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2020-09-30 01:52:00 +08:00
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/* private: from internal.h */
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2020-02-20 17:58:45 +08:00
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struct bhi_vec_entry *bhi_vec;
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2020-09-30 01:52:00 +08:00
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/* public: */
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u32 entries;
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};
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2020-02-20 17:58:48 +08:00
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/**
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* struct mhi_link_info - BW requirement
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* target_link_speed - Link speed as defined by TLS bits in LinkControl reg
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* target_link_width - Link width as defined by NLW bits in LinkStatus reg
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*/
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struct mhi_link_info {
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unsigned int target_link_speed;
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unsigned int target_link_width;
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};
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2020-02-20 17:58:40 +08:00
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/**
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* enum mhi_ee_type - Execution environment types
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* @MHI_EE_PBL: Primary Bootloader
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* @MHI_EE_SBL: Secondary Bootloader
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* @MHI_EE_AMSS: Modem, aka the primary runtime EE
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* @MHI_EE_RDDM: Ram dump download mode
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* @MHI_EE_WFW: WLAN firmware mode
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* @MHI_EE_PTHRU: Passthrough
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* @MHI_EE_EDL: Embedded downloader
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2021-03-30 09:28:21 +08:00
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* @MHI_EE_FP: Flash Programmer Environment
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*/
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enum mhi_ee_type {
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MHI_EE_PBL,
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MHI_EE_SBL,
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MHI_EE_AMSS,
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MHI_EE_RDDM,
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MHI_EE_WFW,
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MHI_EE_PTHRU,
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MHI_EE_EDL,
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2021-03-30 09:28:21 +08:00
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MHI_EE_FP,
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MHI_EE_MAX_SUPPORTED = MHI_EE_FP,
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MHI_EE_DISABLE_TRANSITION, /* local EE, not related to mhi spec */
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MHI_EE_NOT_SUPPORTED,
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MHI_EE_MAX,
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};
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2020-02-20 17:58:44 +08:00
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/**
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* enum mhi_state - MHI states
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* @MHI_STATE_RESET: Reset state
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* @MHI_STATE_READY: Ready state
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* @MHI_STATE_M0: M0 state
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* @MHI_STATE_M1: M1 state
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* @MHI_STATE_M2: M2 state
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* @MHI_STATE_M3: M3 state
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* @MHI_STATE_M3_FAST: M3 Fast state
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* @MHI_STATE_BHI: BHI state
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* @MHI_STATE_SYS_ERR: System Error state
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*/
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enum mhi_state {
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MHI_STATE_RESET = 0x0,
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MHI_STATE_READY = 0x1,
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MHI_STATE_M0 = 0x2,
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MHI_STATE_M1 = 0x3,
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MHI_STATE_M2 = 0x4,
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MHI_STATE_M3 = 0x5,
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MHI_STATE_M3_FAST = 0x6,
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MHI_STATE_BHI = 0x7,
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MHI_STATE_SYS_ERR = 0xFF,
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MHI_STATE_MAX,
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};
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2020-02-20 17:58:40 +08:00
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/**
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* enum mhi_ch_ee_mask - Execution environment mask for channel
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* @MHI_CH_EE_PBL: Allow channel to be used in PBL EE
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* @MHI_CH_EE_SBL: Allow channel to be used in SBL EE
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* @MHI_CH_EE_AMSS: Allow channel to be used in AMSS EE
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* @MHI_CH_EE_RDDM: Allow channel to be used in RDDM EE
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* @MHI_CH_EE_PTHRU: Allow channel to be used in PTHRU EE
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* @MHI_CH_EE_WFW: Allow channel to be used in WFW EE
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* @MHI_CH_EE_EDL: Allow channel to be used in EDL EE
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*/
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enum mhi_ch_ee_mask {
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MHI_CH_EE_PBL = BIT(MHI_EE_PBL),
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MHI_CH_EE_SBL = BIT(MHI_EE_SBL),
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MHI_CH_EE_AMSS = BIT(MHI_EE_AMSS),
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MHI_CH_EE_RDDM = BIT(MHI_EE_RDDM),
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MHI_CH_EE_PTHRU = BIT(MHI_EE_PTHRU),
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MHI_CH_EE_WFW = BIT(MHI_EE_WFW),
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MHI_CH_EE_EDL = BIT(MHI_EE_EDL),
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};
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/**
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* enum mhi_er_data_type - Event ring data types
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* @MHI_ER_DATA: Only client data over this ring
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* @MHI_ER_CTRL: MHI control data and client data
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*/
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enum mhi_er_data_type {
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MHI_ER_DATA,
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MHI_ER_CTRL,
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};
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/**
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* enum mhi_db_brst_mode - Doorbell mode
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* @MHI_DB_BRST_DISABLE: Burst mode disable
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* @MHI_DB_BRST_ENABLE: Burst mode enable
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*/
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enum mhi_db_brst_mode {
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MHI_DB_BRST_DISABLE = 0x2,
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MHI_DB_BRST_ENABLE = 0x3,
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};
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/**
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* struct mhi_channel_config - Channel configuration structure for controller
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* @name: The name of this channel
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* @num: The number assigned to this channel
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* @num_elements: The number of elements that can be queued to this channel
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* @local_elements: The local ring length of the channel
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2021-04-08 18:02:20 +08:00
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* @event_ring: The event ring index that services this channel
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2020-02-20 17:58:40 +08:00
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* @dir: Direction that data may flow on this channel
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* @type: Channel type
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* @ee_mask: Execution Environment mask for this channel
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* @pollcfg: Polling configuration for burst mode. 0 is default. milliseconds
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for UL channels, multiple of 8 ring elements for DL channels
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* @doorbell: Doorbell mode
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* @lpm_notify: The channel master requires low power mode notifications
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* @offload_channel: The client manages the channel completely
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* @doorbell_mode_switch: Channel switches to doorbell mode on M0 transition
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* @auto_queue: Framework will automatically queue buffers for DL traffic
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2020-02-20 17:58:42 +08:00
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* @wake-capable: Channel capable of waking up the system
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2020-02-20 17:58:40 +08:00
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*/
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struct mhi_channel_config {
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char *name;
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u32 num;
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u32 num_elements;
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u32 local_elements;
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u32 event_ring;
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enum dma_data_direction dir;
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enum mhi_ch_type type;
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u32 ee_mask;
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u32 pollcfg;
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enum mhi_db_brst_mode doorbell;
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bool lpm_notify;
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bool offload_channel;
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bool doorbell_mode_switch;
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bool auto_queue;
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2020-02-20 17:58:42 +08:00
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bool wake_capable;
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2020-02-20 17:58:40 +08:00
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};
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/**
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* struct mhi_event_config - Event ring configuration structure for controller
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* @num_elements: The number of elements that can be queued to this ring
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* @irq_moderation_ms: Delay irq for additional events to be aggregated
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* @irq: IRQ associated with this ring
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* @channel: Dedicated channel number. U32_MAX indicates a non-dedicated ring
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* @priority: Priority of this ring. Use 1 for now
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* @mode: Doorbell mode
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* @data_type: Type of data this ring will process
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* @hardware_event: This ring is associated with hardware channels
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* @client_managed: This ring is client managed
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* @offload_channel: This ring is associated with an offloaded channel
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*/
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struct mhi_event_config {
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u32 num_elements;
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u32 irq_moderation_ms;
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u32 irq;
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u32 channel;
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u32 priority;
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enum mhi_db_brst_mode mode;
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enum mhi_er_data_type data_type;
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bool hardware_event;
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bool client_managed;
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bool offload_channel;
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};
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/**
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* struct mhi_controller_config - Root MHI controller configuration
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* @max_channels: Maximum number of channels supported
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* @timeout_ms: Timeout value for operations. 0 means use default
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* @buf_len: Size of automatically allocated buffers. 0 means use default
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* @num_channels: Number of channels defined in @ch_cfg
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* @ch_cfg: Array of defined channels
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* @num_events: Number of event rings defined in @event_cfg
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* @event_cfg: Array of defined event rings
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* @use_bounce_buf: Use a bounce buffer pool due to limited DDR access
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* @m2_no_db: Host is not allowed to ring DB in M2 state
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*/
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struct mhi_controller_config {
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u32 max_channels;
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u32 timeout_ms;
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u32 buf_len;
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u32 num_channels;
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2020-09-30 01:52:10 +08:00
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const struct mhi_channel_config *ch_cfg;
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2020-02-20 17:58:40 +08:00
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u32 num_events;
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2021-01-06 00:44:35 +08:00
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struct mhi_event_config *event_cfg;
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2020-02-20 17:58:40 +08:00
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bool use_bounce_buf;
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bool m2_no_db;
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};
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/**
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* struct mhi_controller - Master MHI controller structure
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* @cntrl_dev: Pointer to the struct device of physical bus acting as the MHI
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* controller (required)
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* @mhi_dev: MHI device instance for the controller
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2020-09-30 01:52:13 +08:00
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* @debugfs_dentry: MHI controller debugfs directory
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2020-02-20 17:58:40 +08:00
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* @regs: Base address of MHI MMIO register space (required)
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2020-02-20 17:58:43 +08:00
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* @bhi: Points to base of MHI BHI register space
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2020-02-20 17:58:45 +08:00
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* @bhie: Points to base of MHI BHIe register space
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2020-02-20 17:58:43 +08:00
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* @wake_db: MHI WAKE doorbell register address
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2020-02-20 17:58:40 +08:00
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* @iova_start: IOMMU starting address for data (required)
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* @iova_stop: IOMMU stop address for data (required)
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2021-03-10 02:46:35 +08:00
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* @fw_image: Firmware image name for normal booting (optional)
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2020-02-20 17:58:40 +08:00
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* @edl_image: Firmware image name for emergency download mode (optional)
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2020-02-20 17:58:47 +08:00
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* @rddm_size: RAM dump size that host should allocate for debugging purpose
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2020-02-20 17:58:40 +08:00
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* @sbl_size: SBL image size downloaded through BHIe (optional)
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* @seg_len: BHIe vector size (optional)
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2021-08-02 13:12:50 +08:00
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* @reg_len: Length of the MHI MMIO region (required)
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2020-02-20 17:58:45 +08:00
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* @fbc_image: Points to firmware image buffer
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2020-02-20 17:58:47 +08:00
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* @rddm_image: Points to RAM dump buffer
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2020-02-20 17:58:40 +08:00
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* @mhi_chan: Points to the channel configuration table
|
|
|
|
* @lpm_chans: List of channels that require LPM notifications
|
|
|
|
* @irq: base irq # to request (required)
|
|
|
|
* @max_chan: Maximum number of channels the controller supports
|
|
|
|
* @total_ev_rings: Total # of event rings allocated
|
|
|
|
* @hw_ev_rings: Number of hardware event rings
|
|
|
|
* @sw_ev_rings: Number of software event rings
|
|
|
|
* @nr_irqs: Number of IRQ allocated by bus master (required)
|
2020-03-24 14:10:45 +08:00
|
|
|
* @family_number: MHI controller family number
|
|
|
|
* @device_number: MHI controller device number
|
|
|
|
* @major_version: MHI controller major revision number
|
|
|
|
* @minor_version: MHI controller minor revision number
|
2020-09-30 01:52:08 +08:00
|
|
|
* @serial_number: MHI controller serial number obtained from BHI
|
|
|
|
* @oem_pk_hash: MHI controller OEM PK Hash obtained from BHI
|
2020-02-20 17:58:40 +08:00
|
|
|
* @mhi_event: MHI event ring configurations table
|
|
|
|
* @mhi_cmd: MHI command ring configurations table
|
|
|
|
* @mhi_ctxt: MHI device context, shared memory between host and device
|
|
|
|
* @pm_mutex: Mutex for suspend/resume operation
|
|
|
|
* @pm_lock: Lock for protecting MHI power management state
|
|
|
|
* @timeout_ms: Timeout in ms for state transitions
|
|
|
|
* @pm_state: MHI power management state
|
|
|
|
* @db_access: DB access states
|
|
|
|
* @ee: MHI device execution environment
|
2020-02-20 17:58:44 +08:00
|
|
|
* @dev_state: MHI device state
|
2020-02-20 17:58:40 +08:00
|
|
|
* @dev_wake: Device wakeup count
|
|
|
|
* @pending_pkts: Pending packets for the controller
|
2020-09-30 01:52:07 +08:00
|
|
|
* @M0, M2, M3: Counters to track number of device MHI state changes
|
2020-02-20 17:58:40 +08:00
|
|
|
* @transition_list: List of MHI state transitions
|
|
|
|
* @transition_lock: Lock for protecting MHI state transition list
|
|
|
|
* @wlock: Lock for protecting device wakeup
|
2020-02-20 17:58:48 +08:00
|
|
|
* @mhi_link_info: Device bandwidth info
|
2020-02-20 17:58:40 +08:00
|
|
|
* @st_worker: State transition worker
|
2020-11-10 04:47:21 +08:00
|
|
|
* @hiprio_wq: High priority workqueue for MHI work such as state transitions
|
2020-02-20 17:58:40 +08:00
|
|
|
* @state_event: State change event
|
|
|
|
* @status_cb: CB function to notify power states of the device (required)
|
|
|
|
* @wake_get: CB function to assert device wake (optional)
|
|
|
|
* @wake_put: CB function to de-assert device wake (optional)
|
|
|
|
* @wake_toggle: CB function to assert and de-assert device wake (optional)
|
|
|
|
* @runtime_get: CB function to controller runtime resume (required)
|
2020-05-01 03:05:54 +08:00
|
|
|
* @runtime_put: CB function to decrement pm usage (required)
|
2020-02-20 17:58:49 +08:00
|
|
|
* @map_single: CB function to create TRE buffer
|
|
|
|
* @unmap_single: CB function to destroy TRE buffer
|
2020-05-01 03:05:53 +08:00
|
|
|
* @read_reg: Read a MHI register via the physical link (required)
|
|
|
|
* @write_reg: Write a MHI register via the physical link (required)
|
2021-01-05 00:14:50 +08:00
|
|
|
* @reset: Controller specific reset function (optional)
|
2020-02-20 17:58:40 +08:00
|
|
|
* @buffer_len: Bounce buffer length
|
2020-11-26 18:20:35 +08:00
|
|
|
* @index: Index of the MHI controller instance
|
2020-02-20 17:58:40 +08:00
|
|
|
* @bounce_buf: Use of bounce buffer
|
|
|
|
* @fbc_download: MHI host needs to do complete image transfer (optional)
|
|
|
|
* @wake_set: Device wakeup set flag
|
2021-01-04 18:11:28 +08:00
|
|
|
* @irq_flags: irq flags passed to request_irq (optional)
|
2021-07-15 05:18:05 +08:00
|
|
|
* @mru: the default MRU for the MHI device
|
2020-02-20 17:58:40 +08:00
|
|
|
*
|
|
|
|
* Fields marked as (required) need to be populated by the controller driver
|
|
|
|
* before calling mhi_register_controller(). For the fields marked as (optional)
|
|
|
|
* they can be populated depending on the usecase.
|
2020-03-24 14:10:45 +08:00
|
|
|
*
|
|
|
|
* The following fields are present for the purpose of implementing any device
|
|
|
|
* specific quirks or customizations for specific MHI revisions used in device
|
|
|
|
* by the controller drivers. The MHI stack will just populate these fields
|
|
|
|
* during mhi_register_controller():
|
|
|
|
* family_number
|
|
|
|
* device_number
|
|
|
|
* major_version
|
|
|
|
* minor_version
|
2020-02-20 17:58:40 +08:00
|
|
|
*/
|
|
|
|
struct mhi_controller {
|
|
|
|
struct device *cntrl_dev;
|
|
|
|
struct mhi_device *mhi_dev;
|
2020-09-30 01:52:13 +08:00
|
|
|
struct dentry *debugfs_dentry;
|
2020-02-20 17:58:40 +08:00
|
|
|
void __iomem *regs;
|
2020-02-20 17:58:43 +08:00
|
|
|
void __iomem *bhi;
|
2020-02-20 17:58:45 +08:00
|
|
|
void __iomem *bhie;
|
2020-02-20 17:58:43 +08:00
|
|
|
void __iomem *wake_db;
|
2020-02-20 17:58:44 +08:00
|
|
|
|
2020-02-20 17:58:40 +08:00
|
|
|
dma_addr_t iova_start;
|
|
|
|
dma_addr_t iova_stop;
|
|
|
|
const char *fw_image;
|
|
|
|
const char *edl_image;
|
2020-02-20 17:58:47 +08:00
|
|
|
size_t rddm_size;
|
2020-02-20 17:58:40 +08:00
|
|
|
size_t sbl_size;
|
|
|
|
size_t seg_len;
|
2021-08-02 13:12:50 +08:00
|
|
|
size_t reg_len;
|
2020-02-20 17:58:45 +08:00
|
|
|
struct image_info *fbc_image;
|
2020-02-20 17:58:47 +08:00
|
|
|
struct image_info *rddm_image;
|
2020-02-20 17:58:40 +08:00
|
|
|
struct mhi_chan *mhi_chan;
|
|
|
|
struct list_head lpm_chans;
|
|
|
|
int *irq;
|
|
|
|
u32 max_chan;
|
|
|
|
u32 total_ev_rings;
|
|
|
|
u32 hw_ev_rings;
|
|
|
|
u32 sw_ev_rings;
|
|
|
|
u32 nr_irqs;
|
2020-03-24 14:10:45 +08:00
|
|
|
u32 family_number;
|
|
|
|
u32 device_number;
|
|
|
|
u32 major_version;
|
|
|
|
u32 minor_version;
|
2020-09-30 01:52:08 +08:00
|
|
|
u32 serial_number;
|
|
|
|
u32 oem_pk_hash[MHI_MAX_OEM_PK_HASH_SEGMENTS];
|
2020-02-20 17:58:40 +08:00
|
|
|
|
|
|
|
struct mhi_event *mhi_event;
|
|
|
|
struct mhi_cmd *mhi_cmd;
|
|
|
|
struct mhi_ctxt *mhi_ctxt;
|
|
|
|
|
|
|
|
struct mutex pm_mutex;
|
|
|
|
rwlock_t pm_lock;
|
|
|
|
u32 timeout_ms;
|
|
|
|
u32 pm_state;
|
|
|
|
u32 db_access;
|
|
|
|
enum mhi_ee_type ee;
|
2020-02-20 17:58:44 +08:00
|
|
|
enum mhi_state dev_state;
|
2020-02-20 17:58:40 +08:00
|
|
|
atomic_t dev_wake;
|
|
|
|
atomic_t pending_pkts;
|
2020-09-30 01:52:07 +08:00
|
|
|
u32 M0, M2, M3;
|
2020-02-20 17:58:40 +08:00
|
|
|
struct list_head transition_list;
|
|
|
|
spinlock_t transition_lock;
|
|
|
|
spinlock_t wlock;
|
2020-02-20 17:58:48 +08:00
|
|
|
struct mhi_link_info mhi_link_info;
|
2020-02-20 17:58:40 +08:00
|
|
|
struct work_struct st_worker;
|
2020-11-10 04:47:21 +08:00
|
|
|
struct workqueue_struct *hiprio_wq;
|
2020-02-20 17:58:40 +08:00
|
|
|
wait_queue_head_t state_event;
|
|
|
|
|
|
|
|
void (*status_cb)(struct mhi_controller *mhi_cntrl,
|
|
|
|
enum mhi_callback cb);
|
|
|
|
void (*wake_get)(struct mhi_controller *mhi_cntrl, bool override);
|
|
|
|
void (*wake_put)(struct mhi_controller *mhi_cntrl, bool override);
|
|
|
|
void (*wake_toggle)(struct mhi_controller *mhi_cntrl);
|
|
|
|
int (*runtime_get)(struct mhi_controller *mhi_cntrl);
|
|
|
|
void (*runtime_put)(struct mhi_controller *mhi_cntrl);
|
2020-02-20 17:58:49 +08:00
|
|
|
int (*map_single)(struct mhi_controller *mhi_cntrl,
|
|
|
|
struct mhi_buf_info *buf);
|
|
|
|
void (*unmap_single)(struct mhi_controller *mhi_cntrl,
|
|
|
|
struct mhi_buf_info *buf);
|
2020-05-01 03:05:53 +08:00
|
|
|
int (*read_reg)(struct mhi_controller *mhi_cntrl, void __iomem *addr,
|
|
|
|
u32 *out);
|
|
|
|
void (*write_reg)(struct mhi_controller *mhi_cntrl, void __iomem *addr,
|
|
|
|
u32 val);
|
2021-01-05 00:14:50 +08:00
|
|
|
void (*reset)(struct mhi_controller *mhi_cntrl);
|
2020-02-20 17:58:40 +08:00
|
|
|
|
|
|
|
size_t buffer_len;
|
2020-11-26 18:20:35 +08:00
|
|
|
int index;
|
2020-02-20 17:58:40 +08:00
|
|
|
bool bounce_buf;
|
|
|
|
bool fbc_download;
|
|
|
|
bool wake_set;
|
2021-01-04 18:11:28 +08:00
|
|
|
unsigned long irq_flags;
|
2021-07-15 05:18:05 +08:00
|
|
|
u32 mru;
|
2020-02-20 17:58:40 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
/**
|
2020-09-30 01:52:05 +08:00
|
|
|
* struct mhi_device - Structure representing an MHI device which binds
|
|
|
|
* to channels or is associated with controllers
|
2020-02-20 17:58:40 +08:00
|
|
|
* @id: Pointer to MHI device ID struct
|
2020-09-30 01:52:05 +08:00
|
|
|
* @name: Name of the associated MHI device
|
2020-02-20 17:58:40 +08:00
|
|
|
* @mhi_cntrl: Controller the device belongs to
|
|
|
|
* @ul_chan: UL channel for the device
|
|
|
|
* @dl_chan: DL channel for the device
|
|
|
|
* @dev: Driver model device node for the MHI device
|
|
|
|
* @dev_type: MHI device type
|
2020-02-20 17:58:41 +08:00
|
|
|
* @ul_chan_id: MHI channel id for UL transfer
|
|
|
|
* @dl_chan_id: MHI channel id for DL transfer
|
2020-02-20 17:58:40 +08:00
|
|
|
* @dev_wake: Device wakeup counter
|
|
|
|
*/
|
|
|
|
struct mhi_device {
|
|
|
|
const struct mhi_device_id *id;
|
2020-09-30 01:52:05 +08:00
|
|
|
const char *name;
|
2020-02-20 17:58:40 +08:00
|
|
|
struct mhi_controller *mhi_cntrl;
|
|
|
|
struct mhi_chan *ul_chan;
|
|
|
|
struct mhi_chan *dl_chan;
|
|
|
|
struct device dev;
|
|
|
|
enum mhi_device_type dev_type;
|
2020-02-20 17:58:41 +08:00
|
|
|
int ul_chan_id;
|
|
|
|
int dl_chan_id;
|
2020-02-20 17:58:40 +08:00
|
|
|
u32 dev_wake;
|
|
|
|
};
|
|
|
|
|
|
|
|
/**
|
|
|
|
* struct mhi_result - Completed buffer information
|
|
|
|
* @buf_addr: Address of data buffer
|
|
|
|
* @bytes_xferd: # of bytes transferred
|
|
|
|
* @dir: Channel direction
|
|
|
|
* @transaction_status: Status of last transaction
|
|
|
|
*/
|
|
|
|
struct mhi_result {
|
|
|
|
void *buf_addr;
|
|
|
|
size_t bytes_xferd;
|
|
|
|
enum dma_data_direction dir;
|
|
|
|
int transaction_status;
|
|
|
|
};
|
|
|
|
|
2020-02-20 17:58:44 +08:00
|
|
|
/**
|
|
|
|
* struct mhi_buf - MHI Buffer description
|
|
|
|
* @buf: Virtual address of the buffer
|
|
|
|
* @name: Buffer label. For offload channel, configurations name must be:
|
|
|
|
* ECA - Event context array data
|
|
|
|
* CCA - Channel context array data
|
|
|
|
* @dma_addr: IOMMU address of the buffer
|
|
|
|
* @len: # of bytes
|
|
|
|
*/
|
|
|
|
struct mhi_buf {
|
|
|
|
void *buf;
|
|
|
|
const char *name;
|
|
|
|
dma_addr_t dma_addr;
|
|
|
|
size_t len;
|
|
|
|
};
|
|
|
|
|
2020-02-20 17:58:41 +08:00
|
|
|
/**
|
|
|
|
* struct mhi_driver - Structure representing a MHI client driver
|
|
|
|
* @probe: CB function for client driver probe function
|
|
|
|
* @remove: CB function for client driver remove function
|
|
|
|
* @ul_xfer_cb: CB function for UL data transfer
|
|
|
|
* @dl_xfer_cb: CB function for DL data transfer
|
|
|
|
* @status_cb: CB functions for asynchronous status
|
|
|
|
* @driver: Device driver model driver
|
|
|
|
*/
|
|
|
|
struct mhi_driver {
|
|
|
|
const struct mhi_device_id *id_table;
|
|
|
|
int (*probe)(struct mhi_device *mhi_dev,
|
|
|
|
const struct mhi_device_id *id);
|
|
|
|
void (*remove)(struct mhi_device *mhi_dev);
|
|
|
|
void (*ul_xfer_cb)(struct mhi_device *mhi_dev,
|
|
|
|
struct mhi_result *result);
|
|
|
|
void (*dl_xfer_cb)(struct mhi_device *mhi_dev,
|
|
|
|
struct mhi_result *result);
|
|
|
|
void (*status_cb)(struct mhi_device *mhi_dev, enum mhi_callback mhi_cb);
|
|
|
|
struct device_driver driver;
|
|
|
|
};
|
|
|
|
|
|
|
|
#define to_mhi_driver(drv) container_of(drv, struct mhi_driver, driver)
|
2020-02-20 17:58:40 +08:00
|
|
|
#define to_mhi_device(dev) container_of(dev, struct mhi_device, dev)
|
|
|
|
|
2020-09-30 01:52:09 +08:00
|
|
|
/**
|
|
|
|
* mhi_alloc_controller - Allocate the MHI Controller structure
|
|
|
|
* Allocate the mhi_controller structure using zero initialized memory
|
|
|
|
*/
|
|
|
|
struct mhi_controller *mhi_alloc_controller(void);
|
|
|
|
|
|
|
|
/**
|
|
|
|
* mhi_free_controller - Free the MHI Controller structure
|
|
|
|
* Free the mhi_controller structure which was previously allocated
|
|
|
|
*/
|
|
|
|
void mhi_free_controller(struct mhi_controller *mhi_cntrl);
|
|
|
|
|
2020-02-20 17:58:40 +08:00
|
|
|
/**
|
|
|
|
* mhi_register_controller - Register MHI controller
|
|
|
|
* @mhi_cntrl: MHI controller to register
|
|
|
|
* @config: Configuration to use for the controller
|
|
|
|
*/
|
|
|
|
int mhi_register_controller(struct mhi_controller *mhi_cntrl,
|
2020-09-30 01:52:10 +08:00
|
|
|
const struct mhi_controller_config *config);
|
2020-02-20 17:58:40 +08:00
|
|
|
|
|
|
|
/**
|
|
|
|
* mhi_unregister_controller - Unregister MHI controller
|
|
|
|
* @mhi_cntrl: MHI controller to unregister
|
|
|
|
*/
|
|
|
|
void mhi_unregister_controller(struct mhi_controller *mhi_cntrl);
|
|
|
|
|
2020-03-24 14:10:44 +08:00
|
|
|
/*
|
|
|
|
* module_mhi_driver() - Helper macro for drivers that don't do
|
|
|
|
* anything special other than using default mhi_driver_register() and
|
|
|
|
* mhi_driver_unregister(). This eliminates a lot of boilerplate.
|
|
|
|
* Each module may only use this macro once.
|
|
|
|
*/
|
|
|
|
#define module_mhi_driver(mhi_drv) \
|
|
|
|
module_driver(mhi_drv, mhi_driver_register, \
|
|
|
|
mhi_driver_unregister)
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Macro to avoid include chaining to get THIS_MODULE
|
|
|
|
*/
|
|
|
|
#define mhi_driver_register(mhi_drv) \
|
|
|
|
__mhi_driver_register(mhi_drv, THIS_MODULE)
|
|
|
|
|
2020-02-20 17:58:41 +08:00
|
|
|
/**
|
2020-03-24 14:10:44 +08:00
|
|
|
* __mhi_driver_register - Register driver with MHI framework
|
2020-02-20 17:58:41 +08:00
|
|
|
* @mhi_drv: Driver associated with the device
|
2020-03-24 14:10:44 +08:00
|
|
|
* @owner: The module owner
|
2020-02-20 17:58:41 +08:00
|
|
|
*/
|
2020-03-24 14:10:44 +08:00
|
|
|
int __mhi_driver_register(struct mhi_driver *mhi_drv, struct module *owner);
|
2020-02-20 17:58:41 +08:00
|
|
|
|
|
|
|
/**
|
|
|
|
* mhi_driver_unregister - Unregister a driver for mhi_devices
|
|
|
|
* @mhi_drv: Driver associated with the device
|
|
|
|
*/
|
|
|
|
void mhi_driver_unregister(struct mhi_driver *mhi_drv);
|
|
|
|
|
2020-02-20 17:58:44 +08:00
|
|
|
/**
|
|
|
|
* mhi_set_mhi_state - Set MHI device state
|
|
|
|
* @mhi_cntrl: MHI controller
|
|
|
|
* @state: State to set
|
|
|
|
*/
|
|
|
|
void mhi_set_mhi_state(struct mhi_controller *mhi_cntrl,
|
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enum mhi_state state);
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2020-04-27 15:58:27 +08:00
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/**
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* mhi_notify - Notify the MHI client driver about client device status
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* @mhi_dev: MHI device instance
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* @cb_reason: MHI callback reason
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*/
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void mhi_notify(struct mhi_device *mhi_dev, enum mhi_callback cb_reason);
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2021-01-12 02:07:40 +08:00
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/**
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* mhi_get_free_desc_count - Get transfer ring length
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* Get # of TD available to queue buffers
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* @mhi_dev: Device associated with the channels
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* @dir: Direction of the channel
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*/
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int mhi_get_free_desc_count(struct mhi_device *mhi_dev,
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enum dma_data_direction dir);
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2020-02-20 17:58:45 +08:00
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/**
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* mhi_prepare_for_power_up - Do pre-initialization before power up.
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* This is optional, call this before power up if
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* the controller does not want bus framework to
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* automatically free any allocated memory during
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* shutdown process.
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* @mhi_cntrl: MHI controller
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*/
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int mhi_prepare_for_power_up(struct mhi_controller *mhi_cntrl);
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/**
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* mhi_async_power_up - Start MHI power up sequence
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* @mhi_cntrl: MHI controller
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*/
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int mhi_async_power_up(struct mhi_controller *mhi_cntrl);
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/**
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* mhi_sync_power_up - Start MHI power up sequence and wait till the device
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2020-09-30 01:52:00 +08:00
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* enters valid EE state
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2020-02-20 17:58:45 +08:00
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* @mhi_cntrl: MHI controller
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*/
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int mhi_sync_power_up(struct mhi_controller *mhi_cntrl);
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/**
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* mhi_power_down - Start MHI power down sequence
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* @mhi_cntrl: MHI controller
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* @graceful: Link is still accessible, so do a graceful shutdown process
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*/
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void mhi_power_down(struct mhi_controller *mhi_cntrl, bool graceful);
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/**
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* mhi_unprepare_after_power_down - Free any allocated memory after power down
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* @mhi_cntrl: MHI controller
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*/
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void mhi_unprepare_after_power_down(struct mhi_controller *mhi_cntrl);
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2020-04-27 15:58:27 +08:00
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/**
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* mhi_pm_suspend - Move MHI into a suspended state
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* @mhi_cntrl: MHI controller
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*/
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int mhi_pm_suspend(struct mhi_controller *mhi_cntrl);
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/**
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* mhi_pm_resume - Resume MHI from suspended state
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* @mhi_cntrl: MHI controller
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*/
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int mhi_pm_resume(struct mhi_controller *mhi_cntrl);
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2020-02-20 17:58:45 +08:00
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2020-02-20 17:58:47 +08:00
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/**
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2020-11-07 01:44:49 +08:00
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* mhi_download_rddm_image - Download ramdump image from device for
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* debugging purpose.
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2020-02-20 17:58:47 +08:00
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* @mhi_cntrl: MHI controller
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* @in_panic: Download rddm image during kernel panic
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*/
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2020-11-07 01:44:49 +08:00
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int mhi_download_rddm_image(struct mhi_controller *mhi_cntrl, bool in_panic);
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2020-02-20 17:58:47 +08:00
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/**
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* mhi_force_rddm_mode - Force device into rddm mode
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* @mhi_cntrl: MHI controller
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*/
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int mhi_force_rddm_mode(struct mhi_controller *mhi_cntrl);
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2020-11-07 01:44:47 +08:00
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/**
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* mhi_get_exec_env - Get BHI execution environment of the device
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* @mhi_cntrl: MHI controller
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*/
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enum mhi_ee_type mhi_get_exec_env(struct mhi_controller *mhi_cntrl);
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2020-02-20 17:58:47 +08:00
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/**
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* mhi_get_mhi_state - Get MHI state of the device
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* @mhi_cntrl: MHI controller
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*/
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enum mhi_state mhi_get_mhi_state(struct mhi_controller *mhi_cntrl);
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2021-01-05 00:14:50 +08:00
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/**
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* mhi_soc_reset - Trigger a device reset. This can be used as a last resort
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* to reset and recover a device.
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* @mhi_cntrl: MHI controller
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*/
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void mhi_soc_reset(struct mhi_controller *mhi_cntrl);
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2020-02-20 17:58:49 +08:00
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/**
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* mhi_device_get - Disable device low power mode
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* @mhi_dev: Device associated with the channel
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*/
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void mhi_device_get(struct mhi_device *mhi_dev);
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/**
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* mhi_device_get_sync - Disable device low power mode. Synchronously
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* take the controller out of suspended state
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* @mhi_dev: Device associated with the channel
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*/
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int mhi_device_get_sync(struct mhi_device *mhi_dev);
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/**
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* mhi_device_put - Re-enable device low power mode
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* @mhi_dev: Device associated with the channel
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*/
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void mhi_device_put(struct mhi_device *mhi_dev);
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/**
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2021-04-02 05:16:18 +08:00
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* mhi_prepare_for_transfer - Setup UL and DL channels for data transfer.
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* Allocate and initialize the channel context and
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* also issue the START channel command to both
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* channels. Channels can be started only if both
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* host and device execution environments match and
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* channels are in a DISABLED state.
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2020-02-20 17:58:49 +08:00
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* @mhi_dev: Device associated with the channels
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*/
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2021-08-27 01:28:16 +08:00
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int mhi_prepare_for_transfer(struct mhi_device *mhi_dev);
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2020-02-20 17:58:49 +08:00
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/**
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2021-04-02 05:16:18 +08:00
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* mhi_unprepare_from_transfer - Reset UL and DL channels for data transfer.
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* Issue the RESET channel command and let the
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* device clean-up the context so no incoming
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* transfers are seen on the host. Free memory
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* associated with the context on host. If device
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* is unresponsive, only perform a host side
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* clean-up. Channels can be reset only if both
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* host and device execution environments match
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* and channels are in an ENABLED, STOPPED or
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* SUSPENDED state.
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2020-02-20 17:58:49 +08:00
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* @mhi_dev: Device associated with the channels
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*/
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void mhi_unprepare_from_transfer(struct mhi_device *mhi_dev);
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/**
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* mhi_poll - Poll for any available data in DL direction
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* @mhi_dev: Device associated with the channels
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* @budget: # of events to process
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*/
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int mhi_poll(struct mhi_device *mhi_dev, u32 budget);
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/**
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* mhi_queue_dma - Send or receive DMA mapped buffers from client device
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* over MHI channel
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* @mhi_dev: Device associated with the channels
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* @dir: DMA direction for the channel
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* @mhi_buf: Buffer for holding the DMA mapped data
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* @len: Buffer length
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* @mflags: MHI transfer flags used for the transfer
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*/
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int mhi_queue_dma(struct mhi_device *mhi_dev, enum dma_data_direction dir,
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struct mhi_buf *mhi_buf, size_t len, enum mhi_flags mflags);
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/**
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* mhi_queue_buf - Send or receive raw buffers from client device over MHI
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* channel
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* @mhi_dev: Device associated with the channels
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* @dir: DMA direction for the channel
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* @buf: Buffer for holding the data
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* @len: Buffer length
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* @mflags: MHI transfer flags used for the transfer
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*/
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int mhi_queue_buf(struct mhi_device *mhi_dev, enum dma_data_direction dir,
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void *buf, size_t len, enum mhi_flags mflags);
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/**
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* mhi_queue_skb - Send or receive SKBs from client device over MHI channel
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* @mhi_dev: Device associated with the channels
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* @dir: DMA direction for the channel
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* @skb: Buffer for holding SKBs
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* @len: Buffer length
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* @mflags: MHI transfer flags used for the transfer
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*/
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int mhi_queue_skb(struct mhi_device *mhi_dev, enum dma_data_direction dir,
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struct sk_buff *skb, size_t len, enum mhi_flags mflags);
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2020-11-04 01:23:53 +08:00
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/**
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* mhi_queue_is_full - Determine whether queueing new elements is possible
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* @mhi_dev: Device associated with the channels
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* @dir: DMA direction for the channel
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*/
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bool mhi_queue_is_full(struct mhi_device *mhi_dev, enum dma_data_direction dir);
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2020-02-20 17:58:40 +08:00
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#endif /* _MHI_H_ */
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