crypto: keembay - Add support for Keem Bay OCS AES/SM4
Add support for the AES/SM4 crypto engine included in the Offload and
Crypto Subsystem (OCS) of the Intel Keem Bay SoC, thus enabling
hardware-acceleration for the following transformations:
- ecb(aes), cbc(aes), ctr(aes), cts(cbc(aes)), gcm(aes) and cbc(aes);
supported for 128-bit and 256-bit keys.
- ecb(sm4), cbc(sm4), ctr(sm4), cts(cbc(sm4)), gcm(sm4) and cbc(sm4);
supported for 128-bit keys.
The driver passes crypto manager self-tests, including the extra tests
(CRYPTO_MANAGER_EXTRA_TESTS=y).
Signed-off-by: Mike Healy <mikex.healy@intel.com>
Co-developed-by: Daniele Alessandrelli <daniele.alessandrelli@intel.com>
Signed-off-by: Daniele Alessandrelli <daniele.alessandrelli@intel.com>
Acked-by: Mark Gross <mgross@linux.intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-11-26 19:51:48 +08:00
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Intel Keem Bay OCS AES Crypto Driver.
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*
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* Copyright (C) 2018-2020 Intel Corporation
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*/
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#include <linux/clk.h>
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#include <linux/completion.h>
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#include <linux/crypto.h>
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#include <linux/dma-mapping.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/types.h>
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#include <crypto/aes.h>
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#include <crypto/engine.h>
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#include <crypto/gcm.h>
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#include <crypto/scatterwalk.h>
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#include <crypto/internal/aead.h>
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#include <crypto/internal/skcipher.h>
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#include "ocs-aes.h"
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#define KMB_OCS_PRIORITY 350
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#define DRV_NAME "keembay-ocs-aes"
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#define OCS_AES_MIN_KEY_SIZE 16
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#define OCS_AES_MAX_KEY_SIZE 32
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#define OCS_AES_KEYSIZE_128 16
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#define OCS_AES_KEYSIZE_192 24
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#define OCS_AES_KEYSIZE_256 32
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#define OCS_SM4_KEY_SIZE 16
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/**
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* struct ocs_aes_tctx - OCS AES Transform context
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* @engine_ctx: Engine context.
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* @aes_dev: The OCS AES device.
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* @key: AES/SM4 key.
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* @key_len: The length (in bytes) of @key.
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* @cipher: OCS cipher to use (either AES or SM4).
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* @sw_cipher: The cipher to use as fallback.
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* @use_fallback: Whether or not fallback cipher should be used.
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*/
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struct ocs_aes_tctx {
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struct crypto_engine_ctx engine_ctx;
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struct ocs_aes_dev *aes_dev;
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u8 key[OCS_AES_KEYSIZE_256];
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unsigned int key_len;
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enum ocs_cipher cipher;
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union {
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struct crypto_sync_skcipher *sk;
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struct crypto_aead *aead;
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} sw_cipher;
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bool use_fallback;
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};
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/**
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* struct ocs_aes_rctx - OCS AES Request context.
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* @instruction: Instruction to be executed (encrypt / decrypt).
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* @mode: Mode to use (ECB, CBC, CTR, CCm, GCM, CTS)
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* @src_nents: Number of source SG entries.
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* @dst_nents: Number of destination SG entries.
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* @src_dma_count: The number of DMA-mapped entries of the source SG.
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* @dst_dma_count: The number of DMA-mapped entries of the destination SG.
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* @in_place: Whether or not this is an in place request, i.e.,
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* src_sg == dst_sg.
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* @src_dll: OCS DMA linked list for input data.
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* @dst_dll: OCS DMA linked list for output data.
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* @last_ct_blk: Buffer to hold last cipher text block (only used in CBC
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* mode).
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* @cts_swap: Whether or not CTS swap must be performed.
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* @aad_src_dll: OCS DMA linked list for input AAD data.
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* @aad_dst_dll: OCS DMA linked list for output AAD data.
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* @in_tag: Buffer to hold input encrypted tag (only used for
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* CCM/GCM decrypt).
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* @out_tag: Buffer to hold output encrypted / decrypted tag (only
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* used for GCM encrypt / decrypt).
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*/
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struct ocs_aes_rctx {
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/* Fields common across all modes. */
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enum ocs_instruction instruction;
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enum ocs_mode mode;
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int src_nents;
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int dst_nents;
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int src_dma_count;
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int dst_dma_count;
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bool in_place;
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struct ocs_dll_desc src_dll;
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struct ocs_dll_desc dst_dll;
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/* CBC specific */
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u8 last_ct_blk[AES_BLOCK_SIZE];
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/* CTS specific */
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int cts_swap;
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/* CCM/GCM specific */
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struct ocs_dll_desc aad_src_dll;
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struct ocs_dll_desc aad_dst_dll;
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u8 in_tag[AES_BLOCK_SIZE];
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/* GCM specific */
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u8 out_tag[AES_BLOCK_SIZE];
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};
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/* Driver data. */
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struct ocs_aes_drv {
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struct list_head dev_list;
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spinlock_t lock; /* Protects dev_list. */
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};
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static struct ocs_aes_drv ocs_aes = {
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.dev_list = LIST_HEAD_INIT(ocs_aes.dev_list),
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.lock = __SPIN_LOCK_UNLOCKED(ocs_aes.lock),
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};
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static struct ocs_aes_dev *kmb_ocs_aes_find_dev(struct ocs_aes_tctx *tctx)
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{
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struct ocs_aes_dev *aes_dev;
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spin_lock(&ocs_aes.lock);
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if (tctx->aes_dev) {
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aes_dev = tctx->aes_dev;
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goto exit;
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}
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/* Only a single OCS device available */
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aes_dev = list_first_entry(&ocs_aes.dev_list, struct ocs_aes_dev, list);
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tctx->aes_dev = aes_dev;
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exit:
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spin_unlock(&ocs_aes.lock);
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return aes_dev;
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}
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/*
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* Ensure key is 128-bit or 256-bit for AES or 128-bit for SM4 and an actual
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* key is being passed in.
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*
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* Return: 0 if key is valid, -EINVAL otherwise.
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*/
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static int check_key(const u8 *in_key, size_t key_len, enum ocs_cipher cipher)
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{
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if (!in_key)
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return -EINVAL;
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/* For AES, only 128-byte or 256-byte keys are supported. */
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if (cipher == OCS_AES && (key_len == OCS_AES_KEYSIZE_128 ||
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key_len == OCS_AES_KEYSIZE_256))
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return 0;
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/* For SM4, only 128-byte keys are supported. */
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if (cipher == OCS_SM4 && key_len == OCS_AES_KEYSIZE_128)
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return 0;
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/* Everything else is unsupported. */
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return -EINVAL;
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}
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/* Save key into transformation context. */
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static int save_key(struct ocs_aes_tctx *tctx, const u8 *in_key, size_t key_len,
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enum ocs_cipher cipher)
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{
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int ret;
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ret = check_key(in_key, key_len, cipher);
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if (ret)
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return ret;
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memcpy(tctx->key, in_key, key_len);
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tctx->key_len = key_len;
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tctx->cipher = cipher;
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return 0;
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}
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/* Set key for symmetric cypher. */
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static int kmb_ocs_sk_set_key(struct crypto_skcipher *tfm, const u8 *in_key,
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size_t key_len, enum ocs_cipher cipher)
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{
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struct ocs_aes_tctx *tctx = crypto_skcipher_ctx(tfm);
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/* Fallback is used for AES with 192-bit key. */
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tctx->use_fallback = (cipher == OCS_AES &&
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key_len == OCS_AES_KEYSIZE_192);
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if (!tctx->use_fallback)
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return save_key(tctx, in_key, key_len, cipher);
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crypto_sync_skcipher_clear_flags(tctx->sw_cipher.sk,
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CRYPTO_TFM_REQ_MASK);
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crypto_sync_skcipher_set_flags(tctx->sw_cipher.sk,
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tfm->base.crt_flags &
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CRYPTO_TFM_REQ_MASK);
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return crypto_sync_skcipher_setkey(tctx->sw_cipher.sk, in_key, key_len);
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}
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/* Set key for AEAD cipher. */
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static int kmb_ocs_aead_set_key(struct crypto_aead *tfm, const u8 *in_key,
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size_t key_len, enum ocs_cipher cipher)
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{
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struct ocs_aes_tctx *tctx = crypto_aead_ctx(tfm);
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/* Fallback is used for AES with 192-bit key. */
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tctx->use_fallback = (cipher == OCS_AES &&
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key_len == OCS_AES_KEYSIZE_192);
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if (!tctx->use_fallback)
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return save_key(tctx, in_key, key_len, cipher);
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crypto_aead_clear_flags(tctx->sw_cipher.aead, CRYPTO_TFM_REQ_MASK);
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crypto_aead_set_flags(tctx->sw_cipher.aead,
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crypto_aead_get_flags(tfm) & CRYPTO_TFM_REQ_MASK);
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return crypto_aead_setkey(tctx->sw_cipher.aead, in_key, key_len);
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}
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/* Swap two AES blocks in SG lists. */
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static void sg_swap_blocks(struct scatterlist *sgl, unsigned int nents,
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off_t blk1_offset, off_t blk2_offset)
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{
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u8 tmp_buf1[AES_BLOCK_SIZE], tmp_buf2[AES_BLOCK_SIZE];
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/*
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* No easy way to copy within sg list, so copy both blocks to temporary
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* buffers first.
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*/
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sg_pcopy_to_buffer(sgl, nents, tmp_buf1, AES_BLOCK_SIZE, blk1_offset);
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sg_pcopy_to_buffer(sgl, nents, tmp_buf2, AES_BLOCK_SIZE, blk2_offset);
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sg_pcopy_from_buffer(sgl, nents, tmp_buf1, AES_BLOCK_SIZE, blk2_offset);
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sg_pcopy_from_buffer(sgl, nents, tmp_buf2, AES_BLOCK_SIZE, blk1_offset);
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}
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/* Initialize request context to default values. */
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static void ocs_aes_init_rctx(struct ocs_aes_rctx *rctx)
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{
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/* Zero everything. */
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memset(rctx, 0, sizeof(*rctx));
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/* Set initial value for DMA addresses. */
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rctx->src_dll.dma_addr = DMA_MAPPING_ERROR;
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rctx->dst_dll.dma_addr = DMA_MAPPING_ERROR;
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rctx->aad_src_dll.dma_addr = DMA_MAPPING_ERROR;
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rctx->aad_dst_dll.dma_addr = DMA_MAPPING_ERROR;
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}
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static int kmb_ocs_sk_validate_input(struct skcipher_request *req,
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enum ocs_mode mode)
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{
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struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
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int iv_size = crypto_skcipher_ivsize(tfm);
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switch (mode) {
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case OCS_MODE_ECB:
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/* Ensure input length is multiple of block size */
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if (req->cryptlen % AES_BLOCK_SIZE != 0)
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return -EINVAL;
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return 0;
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case OCS_MODE_CBC:
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/* Ensure input length is multiple of block size */
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if (req->cryptlen % AES_BLOCK_SIZE != 0)
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return -EINVAL;
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/* Ensure IV is present and block size in length */
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if (!req->iv || iv_size != AES_BLOCK_SIZE)
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return -EINVAL;
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/*
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* NOTE: Since req->cryptlen == 0 case was already handled in
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* kmb_ocs_sk_common(), the above two conditions also guarantee
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* that: cryptlen >= iv_size
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*/
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return 0;
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case OCS_MODE_CTR:
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/* Ensure IV is present and block size in length */
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if (!req->iv || iv_size != AES_BLOCK_SIZE)
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return -EINVAL;
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return 0;
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case OCS_MODE_CTS:
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/* Ensure input length >= block size */
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if (req->cryptlen < AES_BLOCK_SIZE)
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return -EINVAL;
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/* Ensure IV is present and block size in length */
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if (!req->iv || iv_size != AES_BLOCK_SIZE)
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return -EINVAL;
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return 0;
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default:
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return -EINVAL;
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}
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}
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/*
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* Called by encrypt() / decrypt() skcipher functions.
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*
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* Use fallback if needed, otherwise initialize context and enqueue request
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* into engine.
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*/
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static int kmb_ocs_sk_common(struct skcipher_request *req,
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enum ocs_cipher cipher,
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enum ocs_instruction instruction,
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enum ocs_mode mode)
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{
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struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
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struct ocs_aes_rctx *rctx = skcipher_request_ctx(req);
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struct ocs_aes_tctx *tctx = crypto_skcipher_ctx(tfm);
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struct ocs_aes_dev *aes_dev;
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int rc;
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if (tctx->use_fallback) {
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SYNC_SKCIPHER_REQUEST_ON_STACK(subreq, tctx->sw_cipher.sk);
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skcipher_request_set_sync_tfm(subreq, tctx->sw_cipher.sk);
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skcipher_request_set_callback(subreq, req->base.flags, NULL,
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NULL);
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skcipher_request_set_crypt(subreq, req->src, req->dst,
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req->cryptlen, req->iv);
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if (instruction == OCS_ENCRYPT)
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rc = crypto_skcipher_encrypt(subreq);
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else
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rc = crypto_skcipher_decrypt(subreq);
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skcipher_request_zero(subreq);
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return rc;
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}
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/*
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* If cryptlen == 0, no processing needed for ECB, CBC and CTR.
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*
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* For CTS continue: kmb_ocs_sk_validate_input() will return -EINVAL.
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*/
|
|
|
|
if (!req->cryptlen && mode != OCS_MODE_CTS)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
rc = kmb_ocs_sk_validate_input(req, mode);
|
|
|
|
if (rc)
|
|
|
|
return rc;
|
|
|
|
|
|
|
|
aes_dev = kmb_ocs_aes_find_dev(tctx);
|
|
|
|
if (!aes_dev)
|
|
|
|
return -ENODEV;
|
|
|
|
|
|
|
|
if (cipher != tctx->cipher)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
ocs_aes_init_rctx(rctx);
|
|
|
|
rctx->instruction = instruction;
|
|
|
|
rctx->mode = mode;
|
|
|
|
|
|
|
|
return crypto_transfer_skcipher_request_to_engine(aes_dev->engine, req);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void cleanup_ocs_dma_linked_list(struct device *dev,
|
|
|
|
struct ocs_dll_desc *dll)
|
|
|
|
{
|
|
|
|
if (dll->vaddr)
|
|
|
|
dma_free_coherent(dev, dll->size, dll->vaddr, dll->dma_addr);
|
|
|
|
dll->vaddr = NULL;
|
|
|
|
dll->size = 0;
|
|
|
|
dll->dma_addr = DMA_MAPPING_ERROR;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void kmb_ocs_sk_dma_cleanup(struct skcipher_request *req)
|
|
|
|
{
|
|
|
|
struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
|
|
|
|
struct ocs_aes_rctx *rctx = skcipher_request_ctx(req);
|
|
|
|
struct ocs_aes_tctx *tctx = crypto_skcipher_ctx(tfm);
|
|
|
|
struct device *dev = tctx->aes_dev->dev;
|
|
|
|
|
|
|
|
if (rctx->src_dma_count) {
|
|
|
|
dma_unmap_sg(dev, req->src, rctx->src_nents, DMA_TO_DEVICE);
|
|
|
|
rctx->src_dma_count = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (rctx->dst_dma_count) {
|
|
|
|
dma_unmap_sg(dev, req->dst, rctx->dst_nents, rctx->in_place ?
|
|
|
|
DMA_BIDIRECTIONAL :
|
|
|
|
DMA_FROM_DEVICE);
|
|
|
|
rctx->dst_dma_count = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Clean up OCS DMA linked lists */
|
|
|
|
cleanup_ocs_dma_linked_list(dev, &rctx->src_dll);
|
|
|
|
cleanup_ocs_dma_linked_list(dev, &rctx->dst_dll);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int kmb_ocs_sk_prepare_inplace(struct skcipher_request *req)
|
|
|
|
{
|
|
|
|
struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
|
|
|
|
struct ocs_aes_rctx *rctx = skcipher_request_ctx(req);
|
|
|
|
struct ocs_aes_tctx *tctx = crypto_skcipher_ctx(tfm);
|
|
|
|
int iv_size = crypto_skcipher_ivsize(tfm);
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* For CBC decrypt, save last block (iv) to last_ct_blk buffer.
|
|
|
|
*
|
|
|
|
* Note: if we are here, we already checked that cryptlen >= iv_size
|
|
|
|
* and iv_size == AES_BLOCK_SIZE (i.e., the size of last_ct_blk); see
|
|
|
|
* kmb_ocs_sk_validate_input().
|
|
|
|
*/
|
|
|
|
if (rctx->mode == OCS_MODE_CBC && rctx->instruction == OCS_DECRYPT)
|
|
|
|
scatterwalk_map_and_copy(rctx->last_ct_blk, req->src,
|
|
|
|
req->cryptlen - iv_size, iv_size, 0);
|
|
|
|
|
|
|
|
/* For CTS decrypt, swap last two blocks, if needed. */
|
|
|
|
if (rctx->cts_swap && rctx->instruction == OCS_DECRYPT)
|
|
|
|
sg_swap_blocks(req->dst, rctx->dst_nents,
|
|
|
|
req->cryptlen - AES_BLOCK_SIZE,
|
|
|
|
req->cryptlen - (2 * AES_BLOCK_SIZE));
|
|
|
|
|
|
|
|
/* src and dst buffers are the same, use bidirectional DMA mapping. */
|
|
|
|
rctx->dst_dma_count = dma_map_sg(tctx->aes_dev->dev, req->dst,
|
|
|
|
rctx->dst_nents, DMA_BIDIRECTIONAL);
|
|
|
|
if (rctx->dst_dma_count == 0) {
|
|
|
|
dev_err(tctx->aes_dev->dev, "Failed to map destination sg\n");
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Create DST linked list */
|
|
|
|
rc = ocs_create_linked_list_from_sg(tctx->aes_dev, req->dst,
|
|
|
|
rctx->dst_dma_count, &rctx->dst_dll,
|
|
|
|
req->cryptlen, 0);
|
|
|
|
if (rc)
|
|
|
|
return rc;
|
|
|
|
/*
|
|
|
|
* If descriptor creation was successful, set the src_dll.dma_addr to
|
|
|
|
* the value of dst_dll.dma_addr, as we do in-place AES operation on
|
|
|
|
* the src.
|
|
|
|
*/
|
|
|
|
rctx->src_dll.dma_addr = rctx->dst_dll.dma_addr;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int kmb_ocs_sk_prepare_notinplace(struct skcipher_request *req)
|
|
|
|
{
|
|
|
|
struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
|
|
|
|
struct ocs_aes_rctx *rctx = skcipher_request_ctx(req);
|
|
|
|
struct ocs_aes_tctx *tctx = crypto_skcipher_ctx(tfm);
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
rctx->src_nents = sg_nents_for_len(req->src, req->cryptlen);
|
|
|
|
if (rctx->src_nents < 0)
|
|
|
|
return -EBADMSG;
|
|
|
|
|
|
|
|
/* Map SRC SG. */
|
|
|
|
rctx->src_dma_count = dma_map_sg(tctx->aes_dev->dev, req->src,
|
|
|
|
rctx->src_nents, DMA_TO_DEVICE);
|
|
|
|
if (rctx->src_dma_count == 0) {
|
|
|
|
dev_err(tctx->aes_dev->dev, "Failed to map source sg\n");
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Create SRC linked list */
|
|
|
|
rc = ocs_create_linked_list_from_sg(tctx->aes_dev, req->src,
|
|
|
|
rctx->src_dma_count, &rctx->src_dll,
|
|
|
|
req->cryptlen, 0);
|
|
|
|
if (rc)
|
|
|
|
return rc;
|
|
|
|
|
|
|
|
/* Map DST SG. */
|
|
|
|
rctx->dst_dma_count = dma_map_sg(tctx->aes_dev->dev, req->dst,
|
|
|
|
rctx->dst_nents, DMA_FROM_DEVICE);
|
|
|
|
if (rctx->dst_dma_count == 0) {
|
|
|
|
dev_err(tctx->aes_dev->dev, "Failed to map destination sg\n");
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Create DST linked list */
|
|
|
|
rc = ocs_create_linked_list_from_sg(tctx->aes_dev, req->dst,
|
|
|
|
rctx->dst_dma_count, &rctx->dst_dll,
|
|
|
|
req->cryptlen, 0);
|
|
|
|
if (rc)
|
|
|
|
return rc;
|
|
|
|
|
|
|
|
/* If this is not a CTS decrypt operation with swapping, we are done. */
|
|
|
|
if (!(rctx->cts_swap && rctx->instruction == OCS_DECRYPT))
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Otherwise, we have to copy src to dst (as we cannot modify src).
|
|
|
|
* Use OCS AES bypass mode to copy src to dst via DMA.
|
|
|
|
*
|
|
|
|
* NOTE: for anything other than small data sizes this is rather
|
|
|
|
* inefficient.
|
|
|
|
*/
|
|
|
|
rc = ocs_aes_bypass_op(tctx->aes_dev, rctx->dst_dll.dma_addr,
|
|
|
|
rctx->src_dll.dma_addr, req->cryptlen);
|
|
|
|
if (rc)
|
|
|
|
return rc;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Now dst == src, so clean up what we did so far and use in_place
|
|
|
|
* logic.
|
|
|
|
*/
|
|
|
|
kmb_ocs_sk_dma_cleanup(req);
|
|
|
|
rctx->in_place = true;
|
|
|
|
|
|
|
|
return kmb_ocs_sk_prepare_inplace(req);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int kmb_ocs_sk_run(struct skcipher_request *req)
|
|
|
|
{
|
|
|
|
struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
|
|
|
|
struct ocs_aes_rctx *rctx = skcipher_request_ctx(req);
|
|
|
|
struct ocs_aes_tctx *tctx = crypto_skcipher_ctx(tfm);
|
|
|
|
struct ocs_aes_dev *aes_dev = tctx->aes_dev;
|
|
|
|
int iv_size = crypto_skcipher_ivsize(tfm);
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
rctx->dst_nents = sg_nents_for_len(req->dst, req->cryptlen);
|
|
|
|
if (rctx->dst_nents < 0)
|
|
|
|
return -EBADMSG;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* If 2 blocks or greater, and multiple of block size swap last two
|
|
|
|
* blocks to be compatible with other crypto API CTS implementations:
|
|
|
|
* OCS mode uses CBC-CS2, whereas other crypto API implementations use
|
|
|
|
* CBC-CS3.
|
|
|
|
* CBC-CS2 and CBC-CS3 defined by:
|
|
|
|
* https://nvlpubs.nist.gov/nistpubs/Legacy/SP/nistspecialpublication800-38a-add.pdf
|
|
|
|
*/
|
|
|
|
rctx->cts_swap = (rctx->mode == OCS_MODE_CTS &&
|
|
|
|
req->cryptlen > AES_BLOCK_SIZE &&
|
|
|
|
req->cryptlen % AES_BLOCK_SIZE == 0);
|
|
|
|
|
|
|
|
rctx->in_place = (req->src == req->dst);
|
|
|
|
|
|
|
|
if (rctx->in_place)
|
|
|
|
rc = kmb_ocs_sk_prepare_inplace(req);
|
|
|
|
else
|
|
|
|
rc = kmb_ocs_sk_prepare_notinplace(req);
|
|
|
|
|
|
|
|
if (rc)
|
|
|
|
goto error;
|
|
|
|
|
|
|
|
rc = ocs_aes_op(aes_dev, rctx->mode, tctx->cipher, rctx->instruction,
|
|
|
|
rctx->dst_dll.dma_addr, rctx->src_dll.dma_addr,
|
|
|
|
req->cryptlen, req->iv, iv_size);
|
|
|
|
if (rc)
|
|
|
|
goto error;
|
|
|
|
|
|
|
|
/* Clean-up DMA before further processing output. */
|
|
|
|
kmb_ocs_sk_dma_cleanup(req);
|
|
|
|
|
|
|
|
/* For CTS Encrypt, swap last 2 blocks, if needed. */
|
|
|
|
if (rctx->cts_swap && rctx->instruction == OCS_ENCRYPT) {
|
|
|
|
sg_swap_blocks(req->dst, rctx->dst_nents,
|
|
|
|
req->cryptlen - AES_BLOCK_SIZE,
|
|
|
|
req->cryptlen - (2 * AES_BLOCK_SIZE));
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* For CBC copy IV to req->IV. */
|
|
|
|
if (rctx->mode == OCS_MODE_CBC) {
|
|
|
|
/* CBC encrypt case. */
|
|
|
|
if (rctx->instruction == OCS_ENCRYPT) {
|
|
|
|
scatterwalk_map_and_copy(req->iv, req->dst,
|
|
|
|
req->cryptlen - iv_size,
|
|
|
|
iv_size, 0);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
/* CBC decrypt case. */
|
|
|
|
if (rctx->in_place)
|
|
|
|
memcpy(req->iv, rctx->last_ct_blk, iv_size);
|
|
|
|
else
|
|
|
|
scatterwalk_map_and_copy(req->iv, req->src,
|
|
|
|
req->cryptlen - iv_size,
|
|
|
|
iv_size, 0);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
/* For all other modes there's nothing to do. */
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
error:
|
|
|
|
kmb_ocs_sk_dma_cleanup(req);
|
|
|
|
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int kmb_ocs_aead_validate_input(struct aead_request *req,
|
|
|
|
enum ocs_instruction instruction,
|
|
|
|
enum ocs_mode mode)
|
|
|
|
{
|
|
|
|
struct crypto_aead *tfm = crypto_aead_reqtfm(req);
|
|
|
|
int tag_size = crypto_aead_authsize(tfm);
|
|
|
|
int iv_size = crypto_aead_ivsize(tfm);
|
|
|
|
|
|
|
|
/* For decrypt crytplen == len(PT) + len(tag). */
|
|
|
|
if (instruction == OCS_DECRYPT && req->cryptlen < tag_size)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
/* IV is mandatory. */
|
|
|
|
if (!req->iv)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
switch (mode) {
|
|
|
|
case OCS_MODE_GCM:
|
|
|
|
if (iv_size != GCM_AES_IV_SIZE)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
case OCS_MODE_CCM:
|
|
|
|
/* Ensure IV is present and block size in length */
|
|
|
|
if (iv_size != AES_BLOCK_SIZE)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
default:
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Called by encrypt() / decrypt() aead functions.
|
|
|
|
*
|
|
|
|
* Use fallback if needed, otherwise initialize context and enqueue request
|
|
|
|
* into engine.
|
|
|
|
*/
|
|
|
|
static int kmb_ocs_aead_common(struct aead_request *req,
|
|
|
|
enum ocs_cipher cipher,
|
|
|
|
enum ocs_instruction instruction,
|
|
|
|
enum ocs_mode mode)
|
|
|
|
{
|
|
|
|
struct ocs_aes_tctx *tctx = crypto_aead_ctx(crypto_aead_reqtfm(req));
|
|
|
|
struct ocs_aes_rctx *rctx = aead_request_ctx(req);
|
|
|
|
struct ocs_aes_dev *dd;
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
if (tctx->use_fallback) {
|
|
|
|
struct aead_request *subreq = aead_request_ctx(req);
|
|
|
|
|
|
|
|
aead_request_set_tfm(subreq, tctx->sw_cipher.aead);
|
|
|
|
aead_request_set_callback(subreq, req->base.flags,
|
|
|
|
req->base.complete, req->base.data);
|
|
|
|
aead_request_set_crypt(subreq, req->src, req->dst,
|
|
|
|
req->cryptlen, req->iv);
|
|
|
|
aead_request_set_ad(subreq, req->assoclen);
|
|
|
|
rc = crypto_aead_setauthsize(tctx->sw_cipher.aead,
|
|
|
|
crypto_aead_authsize(crypto_aead_reqtfm(req)));
|
|
|
|
if (rc)
|
|
|
|
return rc;
|
|
|
|
|
|
|
|
return (instruction == OCS_ENCRYPT) ?
|
|
|
|
crypto_aead_encrypt(subreq) :
|
|
|
|
crypto_aead_decrypt(subreq);
|
|
|
|
}
|
|
|
|
|
|
|
|
rc = kmb_ocs_aead_validate_input(req, instruction, mode);
|
|
|
|
if (rc)
|
|
|
|
return rc;
|
|
|
|
|
|
|
|
dd = kmb_ocs_aes_find_dev(tctx);
|
|
|
|
if (!dd)
|
|
|
|
return -ENODEV;
|
|
|
|
|
|
|
|
if (cipher != tctx->cipher)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
ocs_aes_init_rctx(rctx);
|
|
|
|
rctx->instruction = instruction;
|
|
|
|
rctx->mode = mode;
|
|
|
|
|
|
|
|
return crypto_transfer_aead_request_to_engine(dd->engine, req);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void kmb_ocs_aead_dma_cleanup(struct aead_request *req)
|
|
|
|
{
|
|
|
|
struct ocs_aes_tctx *tctx = crypto_aead_ctx(crypto_aead_reqtfm(req));
|
|
|
|
struct ocs_aes_rctx *rctx = aead_request_ctx(req);
|
|
|
|
struct device *dev = tctx->aes_dev->dev;
|
|
|
|
|
|
|
|
if (rctx->src_dma_count) {
|
|
|
|
dma_unmap_sg(dev, req->src, rctx->src_nents, DMA_TO_DEVICE);
|
|
|
|
rctx->src_dma_count = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (rctx->dst_dma_count) {
|
|
|
|
dma_unmap_sg(dev, req->dst, rctx->dst_nents, rctx->in_place ?
|
|
|
|
DMA_BIDIRECTIONAL :
|
|
|
|
DMA_FROM_DEVICE);
|
|
|
|
rctx->dst_dma_count = 0;
|
|
|
|
}
|
|
|
|
/* Clean up OCS DMA linked lists */
|
|
|
|
cleanup_ocs_dma_linked_list(dev, &rctx->src_dll);
|
|
|
|
cleanup_ocs_dma_linked_list(dev, &rctx->dst_dll);
|
|
|
|
cleanup_ocs_dma_linked_list(dev, &rctx->aad_src_dll);
|
|
|
|
cleanup_ocs_dma_linked_list(dev, &rctx->aad_dst_dll);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* kmb_ocs_aead_dma_prepare() - Do DMA mapping for AEAD processing.
|
|
|
|
* @req: The AEAD request being processed.
|
|
|
|
* @src_dll_size: Where to store the length of the data mapped into the
|
|
|
|
* src_dll OCS DMA list.
|
|
|
|
*
|
|
|
|
* Do the following:
|
|
|
|
* - DMA map req->src and req->dst
|
|
|
|
* - Initialize the following OCS DMA linked lists: rctx->src_dll,
|
|
|
|
* rctx->dst_dll, rctx->aad_src_dll and rxtc->aad_dst_dll.
|
|
|
|
*
|
|
|
|
* Return: 0 on success, negative error code otherwise.
|
|
|
|
*/
|
|
|
|
static int kmb_ocs_aead_dma_prepare(struct aead_request *req, u32 *src_dll_size)
|
|
|
|
{
|
|
|
|
struct ocs_aes_tctx *tctx = crypto_aead_ctx(crypto_aead_reqtfm(req));
|
|
|
|
const int tag_size = crypto_aead_authsize(crypto_aead_reqtfm(req));
|
|
|
|
struct ocs_aes_rctx *rctx = aead_request_ctx(req);
|
|
|
|
u32 in_size; /* The length of the data to be mapped by src_dll. */
|
|
|
|
u32 out_size; /* The length of the data to be mapped by dst_dll. */
|
|
|
|
u32 dst_size; /* The length of the data in dst_sg. */
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
/* Get number of entries in input data SG list. */
|
|
|
|
rctx->src_nents = sg_nents_for_len(req->src,
|
|
|
|
req->assoclen + req->cryptlen);
|
|
|
|
if (rctx->src_nents < 0)
|
|
|
|
return -EBADMSG;
|
|
|
|
|
|
|
|
if (rctx->instruction == OCS_DECRYPT) {
|
|
|
|
/*
|
|
|
|
* For decrypt:
|
|
|
|
* - src sg list is: AAD|CT|tag
|
|
|
|
* - dst sg list expects: AAD|PT
|
|
|
|
*
|
|
|
|
* in_size == len(CT); out_size == len(PT)
|
|
|
|
*/
|
|
|
|
|
|
|
|
/* req->cryptlen includes both CT and tag. */
|
|
|
|
in_size = req->cryptlen - tag_size;
|
|
|
|
|
|
|
|
/* out_size = PT size == CT size */
|
|
|
|
out_size = in_size;
|
|
|
|
|
|
|
|
/* len(dst_sg) == len(AAD) + len(PT) */
|
|
|
|
dst_size = req->assoclen + out_size;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Copy tag from source SG list to 'in_tag' buffer.
|
|
|
|
*
|
|
|
|
* Note: this needs to be done here, before DMA mapping src_sg.
|
|
|
|
*/
|
|
|
|
sg_pcopy_to_buffer(req->src, rctx->src_nents, rctx->in_tag,
|
|
|
|
tag_size, req->assoclen + in_size);
|
|
|
|
|
|
|
|
} else { /* OCS_ENCRYPT */
|
|
|
|
/*
|
|
|
|
* For encrypt:
|
|
|
|
* src sg list is: AAD|PT
|
|
|
|
* dst sg list expects: AAD|CT|tag
|
|
|
|
*/
|
|
|
|
/* in_size == len(PT) */
|
|
|
|
in_size = req->cryptlen;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* In CCM mode the OCS engine appends the tag to the ciphertext,
|
|
|
|
* but in GCM mode the tag must be read from the tag registers
|
|
|
|
* and appended manually below
|
|
|
|
*/
|
|
|
|
out_size = (rctx->mode == OCS_MODE_CCM) ? in_size + tag_size :
|
|
|
|
in_size;
|
|
|
|
/* len(dst_sg) == len(AAD) + len(CT) + len(tag) */
|
|
|
|
dst_size = req->assoclen + in_size + tag_size;
|
|
|
|
}
|
|
|
|
*src_dll_size = in_size;
|
|
|
|
|
|
|
|
/* Get number of entries in output data SG list. */
|
|
|
|
rctx->dst_nents = sg_nents_for_len(req->dst, dst_size);
|
|
|
|
if (rctx->dst_nents < 0)
|
|
|
|
return -EBADMSG;
|
|
|
|
|
|
|
|
rctx->in_place = (req->src == req->dst) ? 1 : 0;
|
|
|
|
|
|
|
|
/* Map destination; use bidirectional mapping for in-place case. */
|
|
|
|
rctx->dst_dma_count = dma_map_sg(tctx->aes_dev->dev, req->dst,
|
|
|
|
rctx->dst_nents,
|
|
|
|
rctx->in_place ? DMA_BIDIRECTIONAL :
|
|
|
|
DMA_FROM_DEVICE);
|
|
|
|
if (rctx->dst_dma_count == 0 && rctx->dst_nents != 0) {
|
|
|
|
dev_err(tctx->aes_dev->dev, "Failed to map destination sg\n");
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Create AAD DST list: maps dst[0:AAD_SIZE-1]. */
|
|
|
|
rc = ocs_create_linked_list_from_sg(tctx->aes_dev, req->dst,
|
|
|
|
rctx->dst_dma_count,
|
|
|
|
&rctx->aad_dst_dll, req->assoclen,
|
|
|
|
0);
|
|
|
|
if (rc)
|
|
|
|
return rc;
|
|
|
|
|
|
|
|
/* Create DST list: maps dst[AAD_SIZE:out_size] */
|
|
|
|
rc = ocs_create_linked_list_from_sg(tctx->aes_dev, req->dst,
|
|
|
|
rctx->dst_dma_count, &rctx->dst_dll,
|
|
|
|
out_size, req->assoclen);
|
|
|
|
if (rc)
|
|
|
|
return rc;
|
|
|
|
|
|
|
|
if (rctx->in_place) {
|
|
|
|
/* If this is not CCM encrypt, we are done. */
|
|
|
|
if (!(rctx->mode == OCS_MODE_CCM &&
|
|
|
|
rctx->instruction == OCS_ENCRYPT)) {
|
|
|
|
/*
|
|
|
|
* SRC and DST are the same, so re-use the same DMA
|
|
|
|
* addresses (to avoid allocating new DMA lists
|
|
|
|
* identical to the dst ones).
|
|
|
|
*/
|
|
|
|
rctx->src_dll.dma_addr = rctx->dst_dll.dma_addr;
|
|
|
|
rctx->aad_src_dll.dma_addr = rctx->aad_dst_dll.dma_addr;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
/*
|
|
|
|
* For CCM encrypt the input and output linked lists contain
|
|
|
|
* different amounts of data, so, we need to create different
|
|
|
|
* SRC and AAD SRC lists, even for the in-place case.
|
|
|
|
*/
|
|
|
|
rc = ocs_create_linked_list_from_sg(tctx->aes_dev, req->dst,
|
|
|
|
rctx->dst_dma_count,
|
|
|
|
&rctx->aad_src_dll,
|
|
|
|
req->assoclen, 0);
|
|
|
|
if (rc)
|
|
|
|
return rc;
|
|
|
|
rc = ocs_create_linked_list_from_sg(tctx->aes_dev, req->dst,
|
|
|
|
rctx->dst_dma_count,
|
|
|
|
&rctx->src_dll, in_size,
|
|
|
|
req->assoclen);
|
|
|
|
if (rc)
|
|
|
|
return rc;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
/* Not in-place case. */
|
|
|
|
|
|
|
|
/* Map source SG. */
|
|
|
|
rctx->src_dma_count = dma_map_sg(tctx->aes_dev->dev, req->src,
|
|
|
|
rctx->src_nents, DMA_TO_DEVICE);
|
|
|
|
if (rctx->src_dma_count == 0 && rctx->src_nents != 0) {
|
|
|
|
dev_err(tctx->aes_dev->dev, "Failed to map source sg\n");
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Create AAD SRC list. */
|
|
|
|
rc = ocs_create_linked_list_from_sg(tctx->aes_dev, req->src,
|
|
|
|
rctx->src_dma_count,
|
|
|
|
&rctx->aad_src_dll,
|
|
|
|
req->assoclen, 0);
|
|
|
|
if (rc)
|
|
|
|
return rc;
|
|
|
|
|
|
|
|
/* Create SRC list. */
|
|
|
|
rc = ocs_create_linked_list_from_sg(tctx->aes_dev, req->src,
|
|
|
|
rctx->src_dma_count,
|
|
|
|
&rctx->src_dll, in_size,
|
|
|
|
req->assoclen);
|
|
|
|
if (rc)
|
|
|
|
return rc;
|
|
|
|
|
|
|
|
if (req->assoclen == 0)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
/* Copy AAD from src sg to dst sg using OCS DMA. */
|
|
|
|
rc = ocs_aes_bypass_op(tctx->aes_dev, rctx->aad_dst_dll.dma_addr,
|
|
|
|
rctx->aad_src_dll.dma_addr, req->cryptlen);
|
|
|
|
if (rc)
|
|
|
|
dev_err(tctx->aes_dev->dev,
|
|
|
|
"Failed to copy source AAD to destination AAD\n");
|
|
|
|
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int kmb_ocs_aead_run(struct aead_request *req)
|
|
|
|
{
|
|
|
|
struct ocs_aes_tctx *tctx = crypto_aead_ctx(crypto_aead_reqtfm(req));
|
|
|
|
const int tag_size = crypto_aead_authsize(crypto_aead_reqtfm(req));
|
|
|
|
struct ocs_aes_rctx *rctx = aead_request_ctx(req);
|
|
|
|
u32 in_size; /* The length of the data mapped by src_dll. */
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
rc = kmb_ocs_aead_dma_prepare(req, &in_size);
|
|
|
|
if (rc)
|
|
|
|
goto exit;
|
|
|
|
|
|
|
|
/* For CCM, we just call the OCS processing and we are done. */
|
|
|
|
if (rctx->mode == OCS_MODE_CCM) {
|
|
|
|
rc = ocs_aes_ccm_op(tctx->aes_dev, tctx->cipher,
|
|
|
|
rctx->instruction, rctx->dst_dll.dma_addr,
|
|
|
|
rctx->src_dll.dma_addr, in_size,
|
|
|
|
req->iv,
|
|
|
|
rctx->aad_src_dll.dma_addr, req->assoclen,
|
|
|
|
rctx->in_tag, tag_size);
|
|
|
|
goto exit;
|
|
|
|
}
|
|
|
|
/* GCM case; invoke OCS processing. */
|
|
|
|
rc = ocs_aes_gcm_op(tctx->aes_dev, tctx->cipher,
|
|
|
|
rctx->instruction,
|
|
|
|
rctx->dst_dll.dma_addr,
|
|
|
|
rctx->src_dll.dma_addr, in_size,
|
|
|
|
req->iv,
|
|
|
|
rctx->aad_src_dll.dma_addr, req->assoclen,
|
|
|
|
rctx->out_tag, tag_size);
|
|
|
|
if (rc)
|
|
|
|
goto exit;
|
|
|
|
|
|
|
|
/* For GCM decrypt, we have to compare in_tag with out_tag. */
|
|
|
|
if (rctx->instruction == OCS_DECRYPT) {
|
|
|
|
rc = memcmp(rctx->in_tag, rctx->out_tag, tag_size) ?
|
|
|
|
-EBADMSG : 0;
|
|
|
|
goto exit;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* For GCM encrypt, we must manually copy out_tag to DST sg. */
|
|
|
|
|
|
|
|
/* Clean-up must be called before the sg_pcopy_from_buffer() below. */
|
|
|
|
kmb_ocs_aead_dma_cleanup(req);
|
|
|
|
|
|
|
|
/* Copy tag to destination sg after AAD and CT. */
|
|
|
|
sg_pcopy_from_buffer(req->dst, rctx->dst_nents, rctx->out_tag,
|
|
|
|
tag_size, req->assoclen + req->cryptlen);
|
|
|
|
|
|
|
|
/* Return directly as DMA cleanup already done. */
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
exit:
|
|
|
|
kmb_ocs_aead_dma_cleanup(req);
|
|
|
|
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int kmb_ocs_aes_sk_do_one_request(struct crypto_engine *engine,
|
|
|
|
void *areq)
|
|
|
|
{
|
|
|
|
struct skcipher_request *req =
|
|
|
|
container_of(areq, struct skcipher_request, base);
|
|
|
|
struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
|
|
|
|
struct ocs_aes_tctx *tctx = crypto_skcipher_ctx(tfm);
|
|
|
|
int err;
|
|
|
|
|
|
|
|
if (!tctx->aes_dev) {
|
|
|
|
err = -ENODEV;
|
|
|
|
goto exit;
|
|
|
|
}
|
|
|
|
|
|
|
|
err = ocs_aes_set_key(tctx->aes_dev, tctx->key_len, tctx->key,
|
|
|
|
tctx->cipher);
|
|
|
|
if (err)
|
|
|
|
goto exit;
|
|
|
|
|
|
|
|
err = kmb_ocs_sk_run(req);
|
|
|
|
|
|
|
|
exit:
|
|
|
|
crypto_finalize_skcipher_request(engine, req, err);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int kmb_ocs_aes_aead_do_one_request(struct crypto_engine *engine,
|
|
|
|
void *areq)
|
|
|
|
{
|
|
|
|
struct aead_request *req = container_of(areq,
|
|
|
|
struct aead_request, base);
|
|
|
|
struct ocs_aes_tctx *tctx = crypto_aead_ctx(crypto_aead_reqtfm(req));
|
|
|
|
int err;
|
|
|
|
|
|
|
|
if (!tctx->aes_dev)
|
|
|
|
return -ENODEV;
|
|
|
|
|
|
|
|
err = ocs_aes_set_key(tctx->aes_dev, tctx->key_len, tctx->key,
|
|
|
|
tctx->cipher);
|
|
|
|
if (err)
|
|
|
|
goto exit;
|
|
|
|
|
|
|
|
err = kmb_ocs_aead_run(req);
|
|
|
|
|
|
|
|
exit:
|
|
|
|
crypto_finalize_aead_request(tctx->aes_dev->engine, req, err);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int kmb_ocs_aes_set_key(struct crypto_skcipher *tfm, const u8 *in_key,
|
|
|
|
unsigned int key_len)
|
|
|
|
{
|
|
|
|
return kmb_ocs_sk_set_key(tfm, in_key, key_len, OCS_AES);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int kmb_ocs_aes_aead_set_key(struct crypto_aead *tfm, const u8 *in_key,
|
|
|
|
unsigned int key_len)
|
|
|
|
{
|
|
|
|
return kmb_ocs_aead_set_key(tfm, in_key, key_len, OCS_AES);
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef CONFIG_CRYPTO_DEV_KEEMBAY_OCS_AES_SM4_ECB
|
|
|
|
static int kmb_ocs_aes_ecb_encrypt(struct skcipher_request *req)
|
|
|
|
{
|
|
|
|
return kmb_ocs_sk_common(req, OCS_AES, OCS_ENCRYPT, OCS_MODE_ECB);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int kmb_ocs_aes_ecb_decrypt(struct skcipher_request *req)
|
|
|
|
{
|
|
|
|
return kmb_ocs_sk_common(req, OCS_AES, OCS_DECRYPT, OCS_MODE_ECB);
|
|
|
|
}
|
|
|
|
#endif /* CONFIG_CRYPTO_DEV_KEEMBAY_OCS_AES_SM4_ECB */
|
|
|
|
|
|
|
|
static int kmb_ocs_aes_cbc_encrypt(struct skcipher_request *req)
|
|
|
|
{
|
|
|
|
return kmb_ocs_sk_common(req, OCS_AES, OCS_ENCRYPT, OCS_MODE_CBC);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int kmb_ocs_aes_cbc_decrypt(struct skcipher_request *req)
|
|
|
|
{
|
|
|
|
return kmb_ocs_sk_common(req, OCS_AES, OCS_DECRYPT, OCS_MODE_CBC);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int kmb_ocs_aes_ctr_encrypt(struct skcipher_request *req)
|
|
|
|
{
|
|
|
|
return kmb_ocs_sk_common(req, OCS_AES, OCS_ENCRYPT, OCS_MODE_CTR);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int kmb_ocs_aes_ctr_decrypt(struct skcipher_request *req)
|
|
|
|
{
|
|
|
|
return kmb_ocs_sk_common(req, OCS_AES, OCS_DECRYPT, OCS_MODE_CTR);
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef CONFIG_CRYPTO_DEV_KEEMBAY_OCS_AES_SM4_CTS
|
|
|
|
static int kmb_ocs_aes_cts_encrypt(struct skcipher_request *req)
|
|
|
|
{
|
|
|
|
return kmb_ocs_sk_common(req, OCS_AES, OCS_ENCRYPT, OCS_MODE_CTS);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int kmb_ocs_aes_cts_decrypt(struct skcipher_request *req)
|
|
|
|
{
|
|
|
|
return kmb_ocs_sk_common(req, OCS_AES, OCS_DECRYPT, OCS_MODE_CTS);
|
|
|
|
}
|
|
|
|
#endif /* CONFIG_CRYPTO_DEV_KEEMBAY_OCS_AES_SM4_CTS */
|
|
|
|
|
|
|
|
static int kmb_ocs_aes_gcm_encrypt(struct aead_request *req)
|
|
|
|
{
|
|
|
|
return kmb_ocs_aead_common(req, OCS_AES, OCS_ENCRYPT, OCS_MODE_GCM);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int kmb_ocs_aes_gcm_decrypt(struct aead_request *req)
|
|
|
|
{
|
|
|
|
return kmb_ocs_aead_common(req, OCS_AES, OCS_DECRYPT, OCS_MODE_GCM);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int kmb_ocs_aes_ccm_encrypt(struct aead_request *req)
|
|
|
|
{
|
|
|
|
return kmb_ocs_aead_common(req, OCS_AES, OCS_ENCRYPT, OCS_MODE_CCM);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int kmb_ocs_aes_ccm_decrypt(struct aead_request *req)
|
|
|
|
{
|
|
|
|
return kmb_ocs_aead_common(req, OCS_AES, OCS_DECRYPT, OCS_MODE_CCM);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int kmb_ocs_sm4_set_key(struct crypto_skcipher *tfm, const u8 *in_key,
|
|
|
|
unsigned int key_len)
|
|
|
|
{
|
|
|
|
return kmb_ocs_sk_set_key(tfm, in_key, key_len, OCS_SM4);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int kmb_ocs_sm4_aead_set_key(struct crypto_aead *tfm, const u8 *in_key,
|
|
|
|
unsigned int key_len)
|
|
|
|
{
|
|
|
|
return kmb_ocs_aead_set_key(tfm, in_key, key_len, OCS_SM4);
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef CONFIG_CRYPTO_DEV_KEEMBAY_OCS_AES_SM4_ECB
|
|
|
|
static int kmb_ocs_sm4_ecb_encrypt(struct skcipher_request *req)
|
|
|
|
{
|
|
|
|
return kmb_ocs_sk_common(req, OCS_SM4, OCS_ENCRYPT, OCS_MODE_ECB);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int kmb_ocs_sm4_ecb_decrypt(struct skcipher_request *req)
|
|
|
|
{
|
|
|
|
return kmb_ocs_sk_common(req, OCS_SM4, OCS_DECRYPT, OCS_MODE_ECB);
|
|
|
|
}
|
|
|
|
#endif /* CONFIG_CRYPTO_DEV_KEEMBAY_OCS_AES_SM4_ECB */
|
|
|
|
|
|
|
|
static int kmb_ocs_sm4_cbc_encrypt(struct skcipher_request *req)
|
|
|
|
{
|
|
|
|
return kmb_ocs_sk_common(req, OCS_SM4, OCS_ENCRYPT, OCS_MODE_CBC);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int kmb_ocs_sm4_cbc_decrypt(struct skcipher_request *req)
|
|
|
|
{
|
|
|
|
return kmb_ocs_sk_common(req, OCS_SM4, OCS_DECRYPT, OCS_MODE_CBC);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int kmb_ocs_sm4_ctr_encrypt(struct skcipher_request *req)
|
|
|
|
{
|
|
|
|
return kmb_ocs_sk_common(req, OCS_SM4, OCS_ENCRYPT, OCS_MODE_CTR);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int kmb_ocs_sm4_ctr_decrypt(struct skcipher_request *req)
|
|
|
|
{
|
|
|
|
return kmb_ocs_sk_common(req, OCS_SM4, OCS_DECRYPT, OCS_MODE_CTR);
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef CONFIG_CRYPTO_DEV_KEEMBAY_OCS_AES_SM4_CTS
|
|
|
|
static int kmb_ocs_sm4_cts_encrypt(struct skcipher_request *req)
|
|
|
|
{
|
|
|
|
return kmb_ocs_sk_common(req, OCS_SM4, OCS_ENCRYPT, OCS_MODE_CTS);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int kmb_ocs_sm4_cts_decrypt(struct skcipher_request *req)
|
|
|
|
{
|
|
|
|
return kmb_ocs_sk_common(req, OCS_SM4, OCS_DECRYPT, OCS_MODE_CTS);
|
|
|
|
}
|
|
|
|
#endif /* CONFIG_CRYPTO_DEV_KEEMBAY_OCS_AES_SM4_CTS */
|
|
|
|
|
|
|
|
static int kmb_ocs_sm4_gcm_encrypt(struct aead_request *req)
|
|
|
|
{
|
|
|
|
return kmb_ocs_aead_common(req, OCS_SM4, OCS_ENCRYPT, OCS_MODE_GCM);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int kmb_ocs_sm4_gcm_decrypt(struct aead_request *req)
|
|
|
|
{
|
|
|
|
return kmb_ocs_aead_common(req, OCS_SM4, OCS_DECRYPT, OCS_MODE_GCM);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int kmb_ocs_sm4_ccm_encrypt(struct aead_request *req)
|
|
|
|
{
|
|
|
|
return kmb_ocs_aead_common(req, OCS_SM4, OCS_ENCRYPT, OCS_MODE_CCM);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int kmb_ocs_sm4_ccm_decrypt(struct aead_request *req)
|
|
|
|
{
|
|
|
|
return kmb_ocs_aead_common(req, OCS_SM4, OCS_DECRYPT, OCS_MODE_CCM);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int ocs_common_init(struct ocs_aes_tctx *tctx)
|
|
|
|
{
|
|
|
|
tctx->engine_ctx.op.prepare_request = NULL;
|
|
|
|
tctx->engine_ctx.op.do_one_request = kmb_ocs_aes_sk_do_one_request;
|
|
|
|
tctx->engine_ctx.op.unprepare_request = NULL;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int ocs_aes_init_tfm(struct crypto_skcipher *tfm)
|
|
|
|
{
|
|
|
|
const char *alg_name = crypto_tfm_alg_name(&tfm->base);
|
|
|
|
struct ocs_aes_tctx *tctx = crypto_skcipher_ctx(tfm);
|
|
|
|
struct crypto_sync_skcipher *blk;
|
|
|
|
|
|
|
|
/* set fallback cipher in case it will be needed */
|
|
|
|
blk = crypto_alloc_sync_skcipher(alg_name, 0, CRYPTO_ALG_NEED_FALLBACK);
|
|
|
|
if (IS_ERR(blk))
|
|
|
|
return PTR_ERR(blk);
|
|
|
|
|
|
|
|
tctx->sw_cipher.sk = blk;
|
|
|
|
|
|
|
|
crypto_skcipher_set_reqsize(tfm, sizeof(struct ocs_aes_rctx));
|
|
|
|
|
|
|
|
return ocs_common_init(tctx);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int ocs_sm4_init_tfm(struct crypto_skcipher *tfm)
|
|
|
|
{
|
|
|
|
struct ocs_aes_tctx *tctx = crypto_skcipher_ctx(tfm);
|
|
|
|
|
|
|
|
crypto_skcipher_set_reqsize(tfm, sizeof(struct ocs_aes_rctx));
|
|
|
|
|
|
|
|
return ocs_common_init(tctx);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void clear_key(struct ocs_aes_tctx *tctx)
|
|
|
|
{
|
|
|
|
memzero_explicit(tctx->key, OCS_AES_KEYSIZE_256);
|
|
|
|
|
|
|
|
/* Zero key registers if set */
|
|
|
|
if (tctx->aes_dev)
|
|
|
|
ocs_aes_set_key(tctx->aes_dev, OCS_AES_KEYSIZE_256,
|
|
|
|
tctx->key, OCS_AES);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void ocs_exit_tfm(struct crypto_skcipher *tfm)
|
|
|
|
{
|
|
|
|
struct ocs_aes_tctx *tctx = crypto_skcipher_ctx(tfm);
|
|
|
|
|
|
|
|
clear_key(tctx);
|
|
|
|
|
|
|
|
if (tctx->sw_cipher.sk) {
|
|
|
|
crypto_free_sync_skcipher(tctx->sw_cipher.sk);
|
|
|
|
tctx->sw_cipher.sk = NULL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int ocs_common_aead_init(struct ocs_aes_tctx *tctx)
|
|
|
|
{
|
|
|
|
tctx->engine_ctx.op.prepare_request = NULL;
|
|
|
|
tctx->engine_ctx.op.do_one_request = kmb_ocs_aes_aead_do_one_request;
|
|
|
|
tctx->engine_ctx.op.unprepare_request = NULL;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int ocs_aes_aead_cra_init(struct crypto_aead *tfm)
|
|
|
|
{
|
|
|
|
const char *alg_name = crypto_tfm_alg_name(&tfm->base);
|
|
|
|
struct ocs_aes_tctx *tctx = crypto_aead_ctx(tfm);
|
|
|
|
struct crypto_aead *blk;
|
|
|
|
|
|
|
|
/* Set fallback cipher in case it will be needed */
|
|
|
|
blk = crypto_alloc_aead(alg_name, 0, CRYPTO_ALG_NEED_FALLBACK);
|
|
|
|
if (IS_ERR(blk))
|
|
|
|
return PTR_ERR(blk);
|
|
|
|
|
|
|
|
tctx->sw_cipher.aead = blk;
|
|
|
|
|
|
|
|
crypto_aead_set_reqsize(tfm,
|
|
|
|
max(sizeof(struct ocs_aes_rctx),
|
|
|
|
(sizeof(struct aead_request) +
|
|
|
|
crypto_aead_reqsize(tctx->sw_cipher.aead))));
|
|
|
|
|
|
|
|
return ocs_common_aead_init(tctx);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int kmb_ocs_aead_ccm_setauthsize(struct crypto_aead *tfm,
|
|
|
|
unsigned int authsize)
|
|
|
|
{
|
|
|
|
switch (authsize) {
|
|
|
|
case 4:
|
|
|
|
case 6:
|
|
|
|
case 8:
|
|
|
|
case 10:
|
|
|
|
case 12:
|
|
|
|
case 14:
|
|
|
|
case 16:
|
|
|
|
return 0;
|
|
|
|
default:
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static int kmb_ocs_aead_gcm_setauthsize(struct crypto_aead *tfm,
|
|
|
|
unsigned int authsize)
|
|
|
|
{
|
|
|
|
return crypto_gcm_check_authsize(authsize);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int ocs_sm4_aead_cra_init(struct crypto_aead *tfm)
|
|
|
|
{
|
|
|
|
struct ocs_aes_tctx *tctx = crypto_aead_ctx(tfm);
|
|
|
|
|
|
|
|
crypto_aead_set_reqsize(tfm, sizeof(struct ocs_aes_rctx));
|
|
|
|
|
|
|
|
return ocs_common_aead_init(tctx);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void ocs_aead_cra_exit(struct crypto_aead *tfm)
|
|
|
|
{
|
|
|
|
struct ocs_aes_tctx *tctx = crypto_aead_ctx(tfm);
|
|
|
|
|
|
|
|
clear_key(tctx);
|
|
|
|
|
|
|
|
if (tctx->sw_cipher.aead) {
|
|
|
|
crypto_free_aead(tctx->sw_cipher.aead);
|
|
|
|
tctx->sw_cipher.aead = NULL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct skcipher_alg algs[] = {
|
|
|
|
#ifdef CONFIG_CRYPTO_DEV_KEEMBAY_OCS_AES_SM4_ECB
|
|
|
|
{
|
|
|
|
.base.cra_name = "ecb(aes)",
|
|
|
|
.base.cra_driver_name = "ecb-aes-keembay-ocs",
|
|
|
|
.base.cra_priority = KMB_OCS_PRIORITY,
|
|
|
|
.base.cra_flags = CRYPTO_ALG_ASYNC |
|
|
|
|
CRYPTO_ALG_KERN_DRIVER_ONLY |
|
|
|
|
CRYPTO_ALG_NEED_FALLBACK,
|
|
|
|
.base.cra_blocksize = AES_BLOCK_SIZE,
|
|
|
|
.base.cra_ctxsize = sizeof(struct ocs_aes_tctx),
|
|
|
|
.base.cra_module = THIS_MODULE,
|
|
|
|
.base.cra_alignmask = 0,
|
|
|
|
|
|
|
|
.min_keysize = OCS_AES_MIN_KEY_SIZE,
|
|
|
|
.max_keysize = OCS_AES_MAX_KEY_SIZE,
|
|
|
|
.setkey = kmb_ocs_aes_set_key,
|
|
|
|
.encrypt = kmb_ocs_aes_ecb_encrypt,
|
|
|
|
.decrypt = kmb_ocs_aes_ecb_decrypt,
|
|
|
|
.init = ocs_aes_init_tfm,
|
|
|
|
.exit = ocs_exit_tfm,
|
|
|
|
},
|
|
|
|
#endif /* CONFIG_CRYPTO_DEV_KEEMBAY_OCS_AES_SM4_ECB */
|
|
|
|
{
|
|
|
|
.base.cra_name = "cbc(aes)",
|
|
|
|
.base.cra_driver_name = "cbc-aes-keembay-ocs",
|
|
|
|
.base.cra_priority = KMB_OCS_PRIORITY,
|
|
|
|
.base.cra_flags = CRYPTO_ALG_ASYNC |
|
|
|
|
CRYPTO_ALG_KERN_DRIVER_ONLY |
|
|
|
|
CRYPTO_ALG_NEED_FALLBACK,
|
|
|
|
.base.cra_blocksize = AES_BLOCK_SIZE,
|
|
|
|
.base.cra_ctxsize = sizeof(struct ocs_aes_tctx),
|
|
|
|
.base.cra_module = THIS_MODULE,
|
|
|
|
.base.cra_alignmask = 0,
|
|
|
|
|
|
|
|
.min_keysize = OCS_AES_MIN_KEY_SIZE,
|
|
|
|
.max_keysize = OCS_AES_MAX_KEY_SIZE,
|
|
|
|
.ivsize = AES_BLOCK_SIZE,
|
|
|
|
.setkey = kmb_ocs_aes_set_key,
|
|
|
|
.encrypt = kmb_ocs_aes_cbc_encrypt,
|
|
|
|
.decrypt = kmb_ocs_aes_cbc_decrypt,
|
|
|
|
.init = ocs_aes_init_tfm,
|
|
|
|
.exit = ocs_exit_tfm,
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.base.cra_name = "ctr(aes)",
|
|
|
|
.base.cra_driver_name = "ctr-aes-keembay-ocs",
|
|
|
|
.base.cra_priority = KMB_OCS_PRIORITY,
|
|
|
|
.base.cra_flags = CRYPTO_ALG_ASYNC |
|
|
|
|
CRYPTO_ALG_KERN_DRIVER_ONLY |
|
|
|
|
CRYPTO_ALG_NEED_FALLBACK,
|
|
|
|
.base.cra_blocksize = 1,
|
|
|
|
.base.cra_ctxsize = sizeof(struct ocs_aes_tctx),
|
|
|
|
.base.cra_module = THIS_MODULE,
|
|
|
|
.base.cra_alignmask = 0,
|
|
|
|
|
|
|
|
.min_keysize = OCS_AES_MIN_KEY_SIZE,
|
|
|
|
.max_keysize = OCS_AES_MAX_KEY_SIZE,
|
|
|
|
.ivsize = AES_BLOCK_SIZE,
|
|
|
|
.setkey = kmb_ocs_aes_set_key,
|
|
|
|
.encrypt = kmb_ocs_aes_ctr_encrypt,
|
|
|
|
.decrypt = kmb_ocs_aes_ctr_decrypt,
|
|
|
|
.init = ocs_aes_init_tfm,
|
|
|
|
.exit = ocs_exit_tfm,
|
|
|
|
},
|
|
|
|
#ifdef CONFIG_CRYPTO_DEV_KEEMBAY_OCS_AES_SM4_CTS
|
|
|
|
{
|
|
|
|
.base.cra_name = "cts(cbc(aes))",
|
|
|
|
.base.cra_driver_name = "cts-aes-keembay-ocs",
|
|
|
|
.base.cra_priority = KMB_OCS_PRIORITY,
|
|
|
|
.base.cra_flags = CRYPTO_ALG_ASYNC |
|
|
|
|
CRYPTO_ALG_KERN_DRIVER_ONLY |
|
|
|
|
CRYPTO_ALG_NEED_FALLBACK,
|
|
|
|
.base.cra_blocksize = AES_BLOCK_SIZE,
|
|
|
|
.base.cra_ctxsize = sizeof(struct ocs_aes_tctx),
|
|
|
|
.base.cra_module = THIS_MODULE,
|
|
|
|
.base.cra_alignmask = 0,
|
|
|
|
|
|
|
|
.min_keysize = OCS_AES_MIN_KEY_SIZE,
|
|
|
|
.max_keysize = OCS_AES_MAX_KEY_SIZE,
|
|
|
|
.ivsize = AES_BLOCK_SIZE,
|
|
|
|
.setkey = kmb_ocs_aes_set_key,
|
|
|
|
.encrypt = kmb_ocs_aes_cts_encrypt,
|
|
|
|
.decrypt = kmb_ocs_aes_cts_decrypt,
|
|
|
|
.init = ocs_aes_init_tfm,
|
|
|
|
.exit = ocs_exit_tfm,
|
|
|
|
},
|
|
|
|
#endif /* CONFIG_CRYPTO_DEV_KEEMBAY_OCS_AES_SM4_CTS */
|
|
|
|
#ifdef CONFIG_CRYPTO_DEV_KEEMBAY_OCS_AES_SM4_ECB
|
|
|
|
{
|
|
|
|
.base.cra_name = "ecb(sm4)",
|
|
|
|
.base.cra_driver_name = "ecb-sm4-keembay-ocs",
|
|
|
|
.base.cra_priority = KMB_OCS_PRIORITY,
|
|
|
|
.base.cra_flags = CRYPTO_ALG_ASYNC |
|
|
|
|
CRYPTO_ALG_KERN_DRIVER_ONLY,
|
|
|
|
.base.cra_blocksize = AES_BLOCK_SIZE,
|
|
|
|
.base.cra_ctxsize = sizeof(struct ocs_aes_tctx),
|
|
|
|
.base.cra_module = THIS_MODULE,
|
|
|
|
.base.cra_alignmask = 0,
|
|
|
|
|
|
|
|
.min_keysize = OCS_SM4_KEY_SIZE,
|
|
|
|
.max_keysize = OCS_SM4_KEY_SIZE,
|
|
|
|
.setkey = kmb_ocs_sm4_set_key,
|
|
|
|
.encrypt = kmb_ocs_sm4_ecb_encrypt,
|
|
|
|
.decrypt = kmb_ocs_sm4_ecb_decrypt,
|
|
|
|
.init = ocs_sm4_init_tfm,
|
|
|
|
.exit = ocs_exit_tfm,
|
|
|
|
},
|
|
|
|
#endif /* CONFIG_CRYPTO_DEV_KEEMBAY_OCS_AES_SM4_ECB */
|
|
|
|
{
|
|
|
|
.base.cra_name = "cbc(sm4)",
|
|
|
|
.base.cra_driver_name = "cbc-sm4-keembay-ocs",
|
|
|
|
.base.cra_priority = KMB_OCS_PRIORITY,
|
|
|
|
.base.cra_flags = CRYPTO_ALG_ASYNC |
|
|
|
|
CRYPTO_ALG_KERN_DRIVER_ONLY,
|
|
|
|
.base.cra_blocksize = AES_BLOCK_SIZE,
|
|
|
|
.base.cra_ctxsize = sizeof(struct ocs_aes_tctx),
|
|
|
|
.base.cra_module = THIS_MODULE,
|
|
|
|
.base.cra_alignmask = 0,
|
|
|
|
|
|
|
|
.min_keysize = OCS_SM4_KEY_SIZE,
|
|
|
|
.max_keysize = OCS_SM4_KEY_SIZE,
|
|
|
|
.ivsize = AES_BLOCK_SIZE,
|
|
|
|
.setkey = kmb_ocs_sm4_set_key,
|
|
|
|
.encrypt = kmb_ocs_sm4_cbc_encrypt,
|
|
|
|
.decrypt = kmb_ocs_sm4_cbc_decrypt,
|
|
|
|
.init = ocs_sm4_init_tfm,
|
|
|
|
.exit = ocs_exit_tfm,
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.base.cra_name = "ctr(sm4)",
|
|
|
|
.base.cra_driver_name = "ctr-sm4-keembay-ocs",
|
|
|
|
.base.cra_priority = KMB_OCS_PRIORITY,
|
|
|
|
.base.cra_flags = CRYPTO_ALG_ASYNC |
|
|
|
|
CRYPTO_ALG_KERN_DRIVER_ONLY,
|
|
|
|
.base.cra_blocksize = 1,
|
|
|
|
.base.cra_ctxsize = sizeof(struct ocs_aes_tctx),
|
|
|
|
.base.cra_module = THIS_MODULE,
|
|
|
|
.base.cra_alignmask = 0,
|
|
|
|
|
|
|
|
.min_keysize = OCS_SM4_KEY_SIZE,
|
|
|
|
.max_keysize = OCS_SM4_KEY_SIZE,
|
|
|
|
.ivsize = AES_BLOCK_SIZE,
|
|
|
|
.setkey = kmb_ocs_sm4_set_key,
|
|
|
|
.encrypt = kmb_ocs_sm4_ctr_encrypt,
|
|
|
|
.decrypt = kmb_ocs_sm4_ctr_decrypt,
|
|
|
|
.init = ocs_sm4_init_tfm,
|
|
|
|
.exit = ocs_exit_tfm,
|
|
|
|
},
|
|
|
|
#ifdef CONFIG_CRYPTO_DEV_KEEMBAY_OCS_AES_SM4_CTS
|
|
|
|
{
|
|
|
|
.base.cra_name = "cts(cbc(sm4))",
|
|
|
|
.base.cra_driver_name = "cts-sm4-keembay-ocs",
|
|
|
|
.base.cra_priority = KMB_OCS_PRIORITY,
|
|
|
|
.base.cra_flags = CRYPTO_ALG_ASYNC |
|
|
|
|
CRYPTO_ALG_KERN_DRIVER_ONLY,
|
|
|
|
.base.cra_blocksize = AES_BLOCK_SIZE,
|
|
|
|
.base.cra_ctxsize = sizeof(struct ocs_aes_tctx),
|
|
|
|
.base.cra_module = THIS_MODULE,
|
|
|
|
.base.cra_alignmask = 0,
|
|
|
|
|
|
|
|
.min_keysize = OCS_SM4_KEY_SIZE,
|
|
|
|
.max_keysize = OCS_SM4_KEY_SIZE,
|
|
|
|
.ivsize = AES_BLOCK_SIZE,
|
|
|
|
.setkey = kmb_ocs_sm4_set_key,
|
|
|
|
.encrypt = kmb_ocs_sm4_cts_encrypt,
|
|
|
|
.decrypt = kmb_ocs_sm4_cts_decrypt,
|
|
|
|
.init = ocs_sm4_init_tfm,
|
|
|
|
.exit = ocs_exit_tfm,
|
|
|
|
}
|
|
|
|
#endif /* CONFIG_CRYPTO_DEV_KEEMBAY_OCS_AES_SM4_CTS */
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct aead_alg algs_aead[] = {
|
|
|
|
{
|
|
|
|
.base = {
|
|
|
|
.cra_name = "gcm(aes)",
|
|
|
|
.cra_driver_name = "gcm-aes-keembay-ocs",
|
|
|
|
.cra_priority = KMB_OCS_PRIORITY,
|
|
|
|
.cra_flags = CRYPTO_ALG_ASYNC |
|
|
|
|
CRYPTO_ALG_KERN_DRIVER_ONLY |
|
|
|
|
CRYPTO_ALG_NEED_FALLBACK,
|
|
|
|
.cra_blocksize = 1,
|
|
|
|
.cra_ctxsize = sizeof(struct ocs_aes_tctx),
|
|
|
|
.cra_alignmask = 0,
|
|
|
|
.cra_module = THIS_MODULE,
|
|
|
|
},
|
|
|
|
.init = ocs_aes_aead_cra_init,
|
|
|
|
.exit = ocs_aead_cra_exit,
|
|
|
|
.ivsize = GCM_AES_IV_SIZE,
|
|
|
|
.maxauthsize = AES_BLOCK_SIZE,
|
|
|
|
.setauthsize = kmb_ocs_aead_gcm_setauthsize,
|
|
|
|
.setkey = kmb_ocs_aes_aead_set_key,
|
|
|
|
.encrypt = kmb_ocs_aes_gcm_encrypt,
|
|
|
|
.decrypt = kmb_ocs_aes_gcm_decrypt,
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.base = {
|
|
|
|
.cra_name = "ccm(aes)",
|
|
|
|
.cra_driver_name = "ccm-aes-keembay-ocs",
|
|
|
|
.cra_priority = KMB_OCS_PRIORITY,
|
|
|
|
.cra_flags = CRYPTO_ALG_ASYNC |
|
|
|
|
CRYPTO_ALG_KERN_DRIVER_ONLY |
|
|
|
|
CRYPTO_ALG_NEED_FALLBACK,
|
|
|
|
.cra_blocksize = 1,
|
|
|
|
.cra_ctxsize = sizeof(struct ocs_aes_tctx),
|
|
|
|
.cra_alignmask = 0,
|
|
|
|
.cra_module = THIS_MODULE,
|
|
|
|
},
|
|
|
|
.init = ocs_aes_aead_cra_init,
|
|
|
|
.exit = ocs_aead_cra_exit,
|
|
|
|
.ivsize = AES_BLOCK_SIZE,
|
|
|
|
.maxauthsize = AES_BLOCK_SIZE,
|
|
|
|
.setauthsize = kmb_ocs_aead_ccm_setauthsize,
|
|
|
|
.setkey = kmb_ocs_aes_aead_set_key,
|
|
|
|
.encrypt = kmb_ocs_aes_ccm_encrypt,
|
|
|
|
.decrypt = kmb_ocs_aes_ccm_decrypt,
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.base = {
|
|
|
|
.cra_name = "gcm(sm4)",
|
|
|
|
.cra_driver_name = "gcm-sm4-keembay-ocs",
|
|
|
|
.cra_priority = KMB_OCS_PRIORITY,
|
|
|
|
.cra_flags = CRYPTO_ALG_ASYNC |
|
|
|
|
CRYPTO_ALG_KERN_DRIVER_ONLY,
|
|
|
|
.cra_blocksize = 1,
|
|
|
|
.cra_ctxsize = sizeof(struct ocs_aes_tctx),
|
|
|
|
.cra_alignmask = 0,
|
|
|
|
.cra_module = THIS_MODULE,
|
|
|
|
},
|
|
|
|
.init = ocs_sm4_aead_cra_init,
|
|
|
|
.exit = ocs_aead_cra_exit,
|
|
|
|
.ivsize = GCM_AES_IV_SIZE,
|
|
|
|
.maxauthsize = AES_BLOCK_SIZE,
|
|
|
|
.setauthsize = kmb_ocs_aead_gcm_setauthsize,
|
|
|
|
.setkey = kmb_ocs_sm4_aead_set_key,
|
|
|
|
.encrypt = kmb_ocs_sm4_gcm_encrypt,
|
|
|
|
.decrypt = kmb_ocs_sm4_gcm_decrypt,
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.base = {
|
|
|
|
.cra_name = "ccm(sm4)",
|
|
|
|
.cra_driver_name = "ccm-sm4-keembay-ocs",
|
|
|
|
.cra_priority = KMB_OCS_PRIORITY,
|
|
|
|
.cra_flags = CRYPTO_ALG_ASYNC |
|
|
|
|
CRYPTO_ALG_KERN_DRIVER_ONLY,
|
|
|
|
.cra_blocksize = 1,
|
|
|
|
.cra_ctxsize = sizeof(struct ocs_aes_tctx),
|
|
|
|
.cra_alignmask = 0,
|
|
|
|
.cra_module = THIS_MODULE,
|
|
|
|
},
|
|
|
|
.init = ocs_sm4_aead_cra_init,
|
|
|
|
.exit = ocs_aead_cra_exit,
|
|
|
|
.ivsize = AES_BLOCK_SIZE,
|
|
|
|
.maxauthsize = AES_BLOCK_SIZE,
|
|
|
|
.setauthsize = kmb_ocs_aead_ccm_setauthsize,
|
|
|
|
.setkey = kmb_ocs_sm4_aead_set_key,
|
|
|
|
.encrypt = kmb_ocs_sm4_ccm_encrypt,
|
|
|
|
.decrypt = kmb_ocs_sm4_ccm_decrypt,
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
|
|
|
static void unregister_aes_algs(struct ocs_aes_dev *aes_dev)
|
|
|
|
{
|
|
|
|
crypto_unregister_aeads(algs_aead, ARRAY_SIZE(algs_aead));
|
|
|
|
crypto_unregister_skciphers(algs, ARRAY_SIZE(algs));
|
|
|
|
}
|
|
|
|
|
|
|
|
static int register_aes_algs(struct ocs_aes_dev *aes_dev)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* If any algorithm fails to register, all preceding algorithms that
|
|
|
|
* were successfully registered will be automatically unregistered.
|
|
|
|
*/
|
|
|
|
ret = crypto_register_aeads(algs_aead, ARRAY_SIZE(algs_aead));
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
ret = crypto_register_skciphers(algs, ARRAY_SIZE(algs));
|
|
|
|
if (ret)
|
|
|
|
crypto_unregister_aeads(algs_aead, ARRAY_SIZE(algs));
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Device tree driver match. */
|
|
|
|
static const struct of_device_id kmb_ocs_aes_of_match[] = {
|
|
|
|
{
|
|
|
|
.compatible = "intel,keembay-ocs-aes",
|
|
|
|
},
|
|
|
|
{}
|
|
|
|
};
|
|
|
|
|
|
|
|
static int kmb_ocs_aes_remove(struct platform_device *pdev)
|
|
|
|
{
|
|
|
|
struct ocs_aes_dev *aes_dev;
|
|
|
|
|
|
|
|
aes_dev = platform_get_drvdata(pdev);
|
|
|
|
if (!aes_dev)
|
|
|
|
return -ENODEV;
|
|
|
|
|
|
|
|
unregister_aes_algs(aes_dev);
|
|
|
|
|
|
|
|
spin_lock(&ocs_aes.lock);
|
|
|
|
list_del(&aes_dev->list);
|
|
|
|
spin_unlock(&ocs_aes.lock);
|
|
|
|
|
|
|
|
crypto_engine_exit(aes_dev->engine);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int kmb_ocs_aes_probe(struct platform_device *pdev)
|
|
|
|
{
|
|
|
|
struct device *dev = &pdev->dev;
|
|
|
|
struct ocs_aes_dev *aes_dev;
|
|
|
|
struct resource *aes_mem;
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
aes_dev = devm_kzalloc(dev, sizeof(*aes_dev), GFP_KERNEL);
|
|
|
|
if (!aes_dev)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
aes_dev->dev = dev;
|
|
|
|
|
|
|
|
platform_set_drvdata(pdev, aes_dev);
|
|
|
|
|
|
|
|
rc = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
|
|
|
|
if (rc) {
|
|
|
|
dev_err(dev, "Failed to set 32 bit dma mask %d\n", rc);
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Get base register address. */
|
|
|
|
aes_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
|
|
if (!aes_mem) {
|
|
|
|
dev_err(dev, "Could not retrieve io mem resource\n");
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
|
|
|
|
aes_dev->base_reg = devm_ioremap_resource(&pdev->dev, aes_mem);
|
2021-04-07 22:18:18 +08:00
|
|
|
if (IS_ERR(aes_dev->base_reg))
|
crypto: keembay - Add support for Keem Bay OCS AES/SM4
Add support for the AES/SM4 crypto engine included in the Offload and
Crypto Subsystem (OCS) of the Intel Keem Bay SoC, thus enabling
hardware-acceleration for the following transformations:
- ecb(aes), cbc(aes), ctr(aes), cts(cbc(aes)), gcm(aes) and cbc(aes);
supported for 128-bit and 256-bit keys.
- ecb(sm4), cbc(sm4), ctr(sm4), cts(cbc(sm4)), gcm(sm4) and cbc(sm4);
supported for 128-bit keys.
The driver passes crypto manager self-tests, including the extra tests
(CRYPTO_MANAGER_EXTRA_TESTS=y).
Signed-off-by: Mike Healy <mikex.healy@intel.com>
Co-developed-by: Daniele Alessandrelli <daniele.alessandrelli@intel.com>
Signed-off-by: Daniele Alessandrelli <daniele.alessandrelli@intel.com>
Acked-by: Mark Gross <mgross@linux.intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-11-26 19:51:48 +08:00
|
|
|
return PTR_ERR(aes_dev->base_reg);
|
|
|
|
|
|
|
|
/* Get and request IRQ */
|
|
|
|
aes_dev->irq = platform_get_irq(pdev, 0);
|
|
|
|
if (aes_dev->irq < 0)
|
|
|
|
return aes_dev->irq;
|
|
|
|
|
|
|
|
rc = devm_request_threaded_irq(dev, aes_dev->irq, ocs_aes_irq_handler,
|
|
|
|
NULL, 0, "keembay-ocs-aes", aes_dev);
|
|
|
|
if (rc < 0) {
|
|
|
|
dev_err(dev, "Could not request IRQ\n");
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
INIT_LIST_HEAD(&aes_dev->list);
|
|
|
|
spin_lock(&ocs_aes.lock);
|
|
|
|
list_add_tail(&aes_dev->list, &ocs_aes.dev_list);
|
|
|
|
spin_unlock(&ocs_aes.lock);
|
|
|
|
|
|
|
|
init_completion(&aes_dev->irq_completion);
|
|
|
|
|
|
|
|
/* Initialize crypto engine */
|
|
|
|
aes_dev->engine = crypto_engine_alloc_init(dev, true);
|
2021-02-10 15:45:27 +08:00
|
|
|
if (!aes_dev->engine) {
|
|
|
|
rc = -ENOMEM;
|
crypto: keembay - Add support for Keem Bay OCS AES/SM4
Add support for the AES/SM4 crypto engine included in the Offload and
Crypto Subsystem (OCS) of the Intel Keem Bay SoC, thus enabling
hardware-acceleration for the following transformations:
- ecb(aes), cbc(aes), ctr(aes), cts(cbc(aes)), gcm(aes) and cbc(aes);
supported for 128-bit and 256-bit keys.
- ecb(sm4), cbc(sm4), ctr(sm4), cts(cbc(sm4)), gcm(sm4) and cbc(sm4);
supported for 128-bit keys.
The driver passes crypto manager self-tests, including the extra tests
(CRYPTO_MANAGER_EXTRA_TESTS=y).
Signed-off-by: Mike Healy <mikex.healy@intel.com>
Co-developed-by: Daniele Alessandrelli <daniele.alessandrelli@intel.com>
Signed-off-by: Daniele Alessandrelli <daniele.alessandrelli@intel.com>
Acked-by: Mark Gross <mgross@linux.intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-11-26 19:51:48 +08:00
|
|
|
goto list_del;
|
2021-02-10 15:45:27 +08:00
|
|
|
}
|
crypto: keembay - Add support for Keem Bay OCS AES/SM4
Add support for the AES/SM4 crypto engine included in the Offload and
Crypto Subsystem (OCS) of the Intel Keem Bay SoC, thus enabling
hardware-acceleration for the following transformations:
- ecb(aes), cbc(aes), ctr(aes), cts(cbc(aes)), gcm(aes) and cbc(aes);
supported for 128-bit and 256-bit keys.
- ecb(sm4), cbc(sm4), ctr(sm4), cts(cbc(sm4)), gcm(sm4) and cbc(sm4);
supported for 128-bit keys.
The driver passes crypto manager self-tests, including the extra tests
(CRYPTO_MANAGER_EXTRA_TESTS=y).
Signed-off-by: Mike Healy <mikex.healy@intel.com>
Co-developed-by: Daniele Alessandrelli <daniele.alessandrelli@intel.com>
Signed-off-by: Daniele Alessandrelli <daniele.alessandrelli@intel.com>
Acked-by: Mark Gross <mgross@linux.intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-11-26 19:51:48 +08:00
|
|
|
|
|
|
|
rc = crypto_engine_start(aes_dev->engine);
|
|
|
|
if (rc) {
|
|
|
|
dev_err(dev, "Could not start crypto engine\n");
|
|
|
|
goto cleanup;
|
|
|
|
}
|
|
|
|
|
|
|
|
rc = register_aes_algs(aes_dev);
|
|
|
|
if (rc) {
|
|
|
|
dev_err(dev,
|
|
|
|
"Could not register OCS algorithms with Crypto API\n");
|
|
|
|
goto cleanup;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
cleanup:
|
|
|
|
crypto_engine_exit(aes_dev->engine);
|
|
|
|
list_del:
|
|
|
|
spin_lock(&ocs_aes.lock);
|
|
|
|
list_del(&aes_dev->list);
|
|
|
|
spin_unlock(&ocs_aes.lock);
|
|
|
|
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* The OCS driver is a platform device. */
|
|
|
|
static struct platform_driver kmb_ocs_aes_driver = {
|
|
|
|
.probe = kmb_ocs_aes_probe,
|
|
|
|
.remove = kmb_ocs_aes_remove,
|
|
|
|
.driver = {
|
|
|
|
.name = DRV_NAME,
|
|
|
|
.of_match_table = kmb_ocs_aes_of_match,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
module_platform_driver(kmb_ocs_aes_driver);
|
|
|
|
|
|
|
|
MODULE_DESCRIPTION("Intel Keem Bay Offload and Crypto Subsystem (OCS) AES/SM4 Driver");
|
|
|
|
MODULE_LICENSE("GPL");
|
|
|
|
|
|
|
|
MODULE_ALIAS_CRYPTO("cbc-aes-keembay-ocs");
|
|
|
|
MODULE_ALIAS_CRYPTO("ctr-aes-keembay-ocs");
|
|
|
|
MODULE_ALIAS_CRYPTO("gcm-aes-keembay-ocs");
|
|
|
|
MODULE_ALIAS_CRYPTO("ccm-aes-keembay-ocs");
|
|
|
|
|
|
|
|
MODULE_ALIAS_CRYPTO("cbc-sm4-keembay-ocs");
|
|
|
|
MODULE_ALIAS_CRYPTO("ctr-sm4-keembay-ocs");
|
|
|
|
MODULE_ALIAS_CRYPTO("gcm-sm4-keembay-ocs");
|
|
|
|
MODULE_ALIAS_CRYPTO("ccm-sm4-keembay-ocs");
|
|
|
|
|
|
|
|
#ifdef CONFIG_CRYPTO_DEV_KEEMBAY_OCS_AES_SM4_ECB
|
|
|
|
MODULE_ALIAS_CRYPTO("ecb-aes-keembay-ocs");
|
|
|
|
MODULE_ALIAS_CRYPTO("ecb-sm4-keembay-ocs");
|
|
|
|
#endif /* CONFIG_CRYPTO_DEV_KEEMBAY_OCS_AES_SM4_ECB */
|
|
|
|
|
|
|
|
#ifdef CONFIG_CRYPTO_DEV_KEEMBAY_OCS_AES_SM4_CTS
|
|
|
|
MODULE_ALIAS_CRYPTO("cts-aes-keembay-ocs");
|
|
|
|
MODULE_ALIAS_CRYPTO("cts-sm4-keembay-ocs");
|
|
|
|
#endif /* CONFIG_CRYPTO_DEV_KEEMBAY_OCS_AES_SM4_CTS */
|