2006-11-17 14:07:26 +08:00
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/*
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* Philips UCB1400 touchscreen driver
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*
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* Author: Nicolas Pitre
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* Created: September 25, 2006
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* Copyright: MontaVista Software, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This code is heavily based on ucb1x00-*.c copyrighted by Russell King
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* covering the UCB1100, UCB1200 and UCB1300.. Support for the UCB1400 has
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* been made separate from ucb1x00-core/ucb1x00-ts on Russell's request.
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*/
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/init.h>
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#include <linux/completion.h>
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#include <linux/delay.h>
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#include <linux/input.h>
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#include <linux/device.h>
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#include <linux/interrupt.h>
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#include <linux/suspend.h>
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#include <linux/slab.h>
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#include <linux/kthread.h>
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2006-12-08 14:37:03 +08:00
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#include <linux/freezer.h>
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2006-11-17 14:07:26 +08:00
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#include <sound/driver.h>
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#include <sound/core.h>
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#include <sound/ac97_codec.h>
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/*
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* Interesting UCB1400 AC-link registers
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*/
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#define UCB_IE_RIS 0x5e
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#define UCB_IE_FAL 0x60
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#define UCB_IE_STATUS 0x62
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#define UCB_IE_CLEAR 0x62
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#define UCB_IE_ADC (1 << 11)
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#define UCB_IE_TSPX (1 << 12)
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#define UCB_TS_CR 0x64
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#define UCB_TS_CR_TSMX_POW (1 << 0)
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#define UCB_TS_CR_TSPX_POW (1 << 1)
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#define UCB_TS_CR_TSMY_POW (1 << 2)
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#define UCB_TS_CR_TSPY_POW (1 << 3)
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#define UCB_TS_CR_TSMX_GND (1 << 4)
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#define UCB_TS_CR_TSPX_GND (1 << 5)
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#define UCB_TS_CR_TSMY_GND (1 << 6)
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#define UCB_TS_CR_TSPY_GND (1 << 7)
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#define UCB_TS_CR_MODE_INT (0 << 8)
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#define UCB_TS_CR_MODE_PRES (1 << 8)
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#define UCB_TS_CR_MODE_POS (2 << 8)
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#define UCB_TS_CR_BIAS_ENA (1 << 11)
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#define UCB_TS_CR_TSPX_LOW (1 << 12)
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#define UCB_TS_CR_TSMX_LOW (1 << 13)
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#define UCB_ADC_CR 0x66
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#define UCB_ADC_SYNC_ENA (1 << 0)
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#define UCB_ADC_VREFBYP_CON (1 << 1)
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#define UCB_ADC_INP_TSPX (0 << 2)
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#define UCB_ADC_INP_TSMX (1 << 2)
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#define UCB_ADC_INP_TSPY (2 << 2)
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#define UCB_ADC_INP_TSMY (3 << 2)
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#define UCB_ADC_INP_AD0 (4 << 2)
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#define UCB_ADC_INP_AD1 (5 << 2)
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#define UCB_ADC_INP_AD2 (6 << 2)
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#define UCB_ADC_INP_AD3 (7 << 2)
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#define UCB_ADC_EXT_REF (1 << 5)
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#define UCB_ADC_START (1 << 7)
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#define UCB_ADC_ENA (1 << 15)
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#define UCB_ADC_DATA 0x68
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#define UCB_ADC_DAT_VALID (1 << 15)
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#define UCB_ADC_DAT_VALUE(x) ((x) & 0x3ff)
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#define UCB_ID 0x7e
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#define UCB_ID_1400 0x4304
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struct ucb1400 {
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2006-12-15 16:26:20 +08:00
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struct snd_ac97 *ac97;
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2006-11-17 14:07:26 +08:00
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struct input_dev *ts_idev;
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int irq;
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wait_queue_head_t ts_wait;
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struct task_struct *ts_task;
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unsigned int irq_pending; /* not bit field shared */
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unsigned int ts_restart:1;
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unsigned int adcsync:1;
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};
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static int adcsync;
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static inline u16 ucb1400_reg_read(struct ucb1400 *ucb, u16 reg)
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{
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return ucb->ac97->bus->ops->read(ucb->ac97, reg);
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}
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static inline void ucb1400_reg_write(struct ucb1400 *ucb, u16 reg, u16 val)
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{
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ucb->ac97->bus->ops->write(ucb->ac97, reg, val);
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}
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static inline void ucb1400_adc_enable(struct ucb1400 *ucb)
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{
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ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA);
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}
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static unsigned int ucb1400_adc_read(struct ucb1400 *ucb, u16 adc_channel)
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{
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unsigned int val;
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if (ucb->adcsync)
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adc_channel |= UCB_ADC_SYNC_ENA;
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ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA | adc_channel);
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ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA | adc_channel | UCB_ADC_START);
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for (;;) {
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val = ucb1400_reg_read(ucb, UCB_ADC_DATA);
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if (val & UCB_ADC_DAT_VALID)
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break;
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/* yield to other processes */
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set_current_state(TASK_INTERRUPTIBLE);
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schedule_timeout(1);
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}
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return UCB_ADC_DAT_VALUE(val);
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}
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static inline void ucb1400_adc_disable(struct ucb1400 *ucb)
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{
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ucb1400_reg_write(ucb, UCB_ADC_CR, 0);
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}
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/* Switch to interrupt mode. */
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static inline void ucb1400_ts_mode_int(struct ucb1400 *ucb)
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{
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ucb1400_reg_write(ucb, UCB_TS_CR,
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UCB_TS_CR_TSMX_POW | UCB_TS_CR_TSPX_POW |
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UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND |
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UCB_TS_CR_MODE_INT);
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}
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/*
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* Switch to pressure mode, and read pressure. We don't need to wait
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* here, since both plates are being driven.
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*/
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static inline unsigned int ucb1400_ts_read_pressure(struct ucb1400 *ucb)
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{
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ucb1400_reg_write(ucb, UCB_TS_CR,
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UCB_TS_CR_TSMX_POW | UCB_TS_CR_TSPX_POW |
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UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND |
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UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
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return ucb1400_adc_read(ucb, UCB_ADC_INP_TSPY);
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}
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/*
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* Switch to X position mode and measure Y plate. We switch the plate
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* configuration in pressure mode, then switch to position mode. This
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* gives a faster response time. Even so, we need to wait about 55us
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* for things to stabilise.
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*/
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static inline unsigned int ucb1400_ts_read_xpos(struct ucb1400 *ucb)
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{
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ucb1400_reg_write(ucb, UCB_TS_CR,
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UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
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UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
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ucb1400_reg_write(ucb, UCB_TS_CR,
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UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
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UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
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ucb1400_reg_write(ucb, UCB_TS_CR,
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UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
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UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA);
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udelay(55);
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return ucb1400_adc_read(ucb, UCB_ADC_INP_TSPY);
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}
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/*
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* Switch to Y position mode and measure X plate. We switch the plate
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* configuration in pressure mode, then switch to position mode. This
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* gives a faster response time. Even so, we need to wait about 55us
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* for things to stabilise.
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*/
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static inline unsigned int ucb1400_ts_read_ypos(struct ucb1400 *ucb)
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{
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ucb1400_reg_write(ucb, UCB_TS_CR,
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UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
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UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
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ucb1400_reg_write(ucb, UCB_TS_CR,
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UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
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UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
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ucb1400_reg_write(ucb, UCB_TS_CR,
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UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
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UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA);
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udelay(55);
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return ucb1400_adc_read(ucb, UCB_ADC_INP_TSPX);
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}
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/*
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* Switch to X plate resistance mode. Set MX to ground, PX to
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* supply. Measure current.
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*/
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static inline unsigned int ucb1400_ts_read_xres(struct ucb1400 *ucb)
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{
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ucb1400_reg_write(ucb, UCB_TS_CR,
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UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
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UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
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return ucb1400_adc_read(ucb, 0);
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}
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/*
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* Switch to Y plate resistance mode. Set MY to ground, PY to
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* supply. Measure current.
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*/
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static inline unsigned int ucb1400_ts_read_yres(struct ucb1400 *ucb)
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{
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ucb1400_reg_write(ucb, UCB_TS_CR,
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UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
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UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
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return ucb1400_adc_read(ucb, 0);
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}
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static inline int ucb1400_ts_pen_down(struct ucb1400 *ucb)
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{
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unsigned short val = ucb1400_reg_read(ucb, UCB_TS_CR);
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return (val & (UCB_TS_CR_TSPX_LOW | UCB_TS_CR_TSMX_LOW));
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}
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static inline void ucb1400_ts_irq_enable(struct ucb1400 *ucb)
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{
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ucb1400_reg_write(ucb, UCB_IE_CLEAR, UCB_IE_TSPX);
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ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0);
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ucb1400_reg_write(ucb, UCB_IE_FAL, UCB_IE_TSPX);
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}
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static inline void ucb1400_ts_irq_disable(struct ucb1400 *ucb)
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{
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ucb1400_reg_write(ucb, UCB_IE_FAL, 0);
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}
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static void ucb1400_ts_evt_add(struct input_dev *idev, u16 pressure, u16 x, u16 y)
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{
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input_report_abs(idev, ABS_X, x);
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input_report_abs(idev, ABS_Y, y);
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input_report_abs(idev, ABS_PRESSURE, pressure);
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input_sync(idev);
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}
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static void ucb1400_ts_event_release(struct input_dev *idev)
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{
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input_report_abs(idev, ABS_PRESSURE, 0);
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input_sync(idev);
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}
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static void ucb1400_handle_pending_irq(struct ucb1400 *ucb)
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{
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unsigned int isr;
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isr = ucb1400_reg_read(ucb, UCB_IE_STATUS);
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ucb1400_reg_write(ucb, UCB_IE_CLEAR, isr);
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ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0);
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if (isr & UCB_IE_TSPX)
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ucb1400_ts_irq_disable(ucb);
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else
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printk(KERN_ERR "ucb1400: unexpected IE_STATUS = %#x\n", isr);
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enable_irq(ucb->irq);
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}
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static int ucb1400_ts_thread(void *_ucb)
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{
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struct ucb1400 *ucb = _ucb;
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struct task_struct *tsk = current;
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int valid = 0;
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tsk->policy = SCHED_FIFO;
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tsk->rt_priority = 1;
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while (!kthread_should_stop()) {
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unsigned int x, y, p;
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long timeout;
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ucb->ts_restart = 0;
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if (ucb->irq_pending) {
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ucb->irq_pending = 0;
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ucb1400_handle_pending_irq(ucb);
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}
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ucb1400_adc_enable(ucb);
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x = ucb1400_ts_read_xpos(ucb);
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y = ucb1400_ts_read_ypos(ucb);
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p = ucb1400_ts_read_pressure(ucb);
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ucb1400_adc_disable(ucb);
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/* Switch back to interrupt mode. */
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ucb1400_ts_mode_int(ucb);
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msleep(10);
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if (ucb1400_ts_pen_down(ucb)) {
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ucb1400_ts_irq_enable(ucb);
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/*
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* If we spat out a valid sample set last time,
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* spit out a "pen off" sample here.
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*/
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if (valid) {
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ucb1400_ts_event_release(ucb->ts_idev);
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valid = 0;
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}
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timeout = MAX_SCHEDULE_TIMEOUT;
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} else {
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valid = 1;
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ucb1400_ts_evt_add(ucb->ts_idev, p, x, y);
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timeout = msecs_to_jiffies(10);
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}
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wait_event_interruptible_timeout(ucb->ts_wait,
|
|
|
|
ucb->irq_pending || ucb->ts_restart || kthread_should_stop(),
|
|
|
|
timeout);
|
|
|
|
try_to_freeze();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Send the "pen off" if we are stopping with the pen still active */
|
|
|
|
if (valid)
|
|
|
|
ucb1400_ts_event_release(ucb->ts_idev);
|
|
|
|
|
|
|
|
ucb->ts_task = NULL;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* A restriction with interrupts exists when using the ucb1400, as
|
|
|
|
* the codec read/write routines may sleep while waiting for codec
|
|
|
|
* access completion and uses semaphores for access control to the
|
|
|
|
* AC97 bus. A complete codec read cycle could take anywhere from
|
|
|
|
* 60 to 100uSec so we *definitely* don't want to spin inside the
|
|
|
|
* interrupt handler waiting for codec access. So, we handle the
|
|
|
|
* interrupt by scheduling a RT kernel thread to run in process
|
|
|
|
* context instead of interrupt context.
|
|
|
|
*/
|
|
|
|
static irqreturn_t ucb1400_hard_irq(int irqnr, void *devid)
|
|
|
|
{
|
|
|
|
struct ucb1400 *ucb = devid;
|
|
|
|
|
|
|
|
if (irqnr == ucb->irq) {
|
|
|
|
disable_irq(ucb->irq);
|
|
|
|
ucb->irq_pending = 1;
|
|
|
|
wake_up(&ucb->ts_wait);
|
|
|
|
return IRQ_HANDLED;
|
|
|
|
}
|
|
|
|
return IRQ_NONE;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int ucb1400_ts_open(struct input_dev *idev)
|
|
|
|
{
|
2007-04-12 13:34:08 +08:00
|
|
|
struct ucb1400 *ucb = input_get_drvdata(idev);
|
2006-11-17 14:07:26 +08:00
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
BUG_ON(ucb->ts_task);
|
|
|
|
|
|
|
|
ucb->ts_task = kthread_run(ucb1400_ts_thread, ucb, "UCB1400_ts");
|
|
|
|
if (IS_ERR(ucb->ts_task)) {
|
|
|
|
ret = PTR_ERR(ucb->ts_task);
|
|
|
|
ucb->ts_task = NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void ucb1400_ts_close(struct input_dev *idev)
|
|
|
|
{
|
2007-04-12 13:34:08 +08:00
|
|
|
struct ucb1400 *ucb = input_get_drvdata(idev);
|
2006-11-17 14:07:26 +08:00
|
|
|
|
|
|
|
if (ucb->ts_task)
|
|
|
|
kthread_stop(ucb->ts_task);
|
|
|
|
|
|
|
|
ucb1400_ts_irq_disable(ucb);
|
|
|
|
ucb1400_reg_write(ucb, UCB_TS_CR, 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef CONFIG_PM
|
|
|
|
static int ucb1400_ts_resume(struct device *dev)
|
|
|
|
{
|
|
|
|
struct ucb1400 *ucb = dev_get_drvdata(dev);
|
|
|
|
|
|
|
|
if (ucb->ts_task) {
|
|
|
|
/*
|
|
|
|
* Restart the TS thread to ensure the
|
|
|
|
* TS interrupt mode is set up again
|
|
|
|
* after sleep.
|
|
|
|
*/
|
|
|
|
ucb->ts_restart = 1;
|
|
|
|
wake_up(&ucb->ts_wait);
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
#else
|
|
|
|
#define ucb1400_ts_resume NULL
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#ifndef NO_IRQ
|
|
|
|
#define NO_IRQ 0
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Try to probe our interrupt, rather than relying on lots of
|
|
|
|
* hard-coded machine dependencies.
|
|
|
|
*/
|
|
|
|
static int ucb1400_detect_irq(struct ucb1400 *ucb)
|
|
|
|
{
|
|
|
|
unsigned long mask, timeout;
|
|
|
|
|
|
|
|
mask = probe_irq_on();
|
|
|
|
if (!mask) {
|
|
|
|
probe_irq_off(mask);
|
|
|
|
return -EBUSY;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Enable the ADC interrupt. */
|
|
|
|
ucb1400_reg_write(ucb, UCB_IE_RIS, UCB_IE_ADC);
|
|
|
|
ucb1400_reg_write(ucb, UCB_IE_FAL, UCB_IE_ADC);
|
|
|
|
ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0xffff);
|
|
|
|
ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0);
|
|
|
|
|
|
|
|
/* Cause an ADC interrupt. */
|
|
|
|
ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA);
|
|
|
|
ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA | UCB_ADC_START);
|
|
|
|
|
|
|
|
/* Wait for the conversion to complete. */
|
|
|
|
timeout = jiffies + HZ/2;
|
|
|
|
while (!(ucb1400_reg_read(ucb, UCB_ADC_DATA) & UCB_ADC_DAT_VALID)) {
|
|
|
|
cpu_relax();
|
|
|
|
if (time_after(jiffies, timeout)) {
|
|
|
|
printk(KERN_ERR "ucb1400: timed out in IRQ probe\n");
|
|
|
|
probe_irq_off(mask);
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
ucb1400_reg_write(ucb, UCB_ADC_CR, 0);
|
|
|
|
|
|
|
|
/* Disable and clear interrupt. */
|
|
|
|
ucb1400_reg_write(ucb, UCB_IE_RIS, 0);
|
|
|
|
ucb1400_reg_write(ucb, UCB_IE_FAL, 0);
|
|
|
|
ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0xffff);
|
|
|
|
ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0);
|
|
|
|
|
|
|
|
/* Read triggered interrupt. */
|
|
|
|
ucb->irq = probe_irq_off(mask);
|
|
|
|
if (ucb->irq < 0 || ucb->irq == NO_IRQ)
|
|
|
|
return -ENODEV;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int ucb1400_ts_probe(struct device *dev)
|
|
|
|
{
|
|
|
|
struct ucb1400 *ucb;
|
|
|
|
struct input_dev *idev;
|
|
|
|
int error, id, x_res, y_res;
|
|
|
|
|
|
|
|
ucb = kzalloc(sizeof(struct ucb1400), GFP_KERNEL);
|
|
|
|
idev = input_allocate_device();
|
|
|
|
if (!ucb || !idev) {
|
|
|
|
error = -ENOMEM;
|
|
|
|
goto err_free_devs;
|
|
|
|
}
|
|
|
|
|
|
|
|
ucb->ts_idev = idev;
|
|
|
|
ucb->adcsync = adcsync;
|
|
|
|
ucb->ac97 = to_ac97_t(dev);
|
|
|
|
init_waitqueue_head(&ucb->ts_wait);
|
|
|
|
|
|
|
|
id = ucb1400_reg_read(ucb, UCB_ID);
|
|
|
|
if (id != UCB_ID_1400) {
|
|
|
|
error = -ENODEV;
|
|
|
|
goto err_free_devs;
|
|
|
|
}
|
|
|
|
|
|
|
|
error = ucb1400_detect_irq(ucb);
|
|
|
|
if (error) {
|
|
|
|
printk(KERN_ERR "UCB1400: IRQ probe failed\n");
|
|
|
|
goto err_free_devs;
|
|
|
|
}
|
|
|
|
|
|
|
|
error = request_irq(ucb->irq, ucb1400_hard_irq, IRQF_TRIGGER_RISING,
|
|
|
|
"UCB1400", ucb);
|
|
|
|
if (error) {
|
|
|
|
printk(KERN_ERR "ucb1400: unable to grab irq%d: %d\n",
|
|
|
|
ucb->irq, error);
|
|
|
|
goto err_free_devs;
|
|
|
|
}
|
|
|
|
printk(KERN_DEBUG "UCB1400: found IRQ %d\n", ucb->irq);
|
|
|
|
|
2007-04-12 13:34:08 +08:00
|
|
|
input_set_drvdata(idev, ucb);
|
|
|
|
|
2007-04-12 13:35:14 +08:00
|
|
|
idev->dev.parent = dev;
|
2006-11-17 14:07:26 +08:00
|
|
|
idev->name = "UCB1400 touchscreen interface";
|
|
|
|
idev->id.vendor = ucb1400_reg_read(ucb, AC97_VENDOR_ID1);
|
|
|
|
idev->id.product = id;
|
|
|
|
idev->open = ucb1400_ts_open;
|
|
|
|
idev->close = ucb1400_ts_close;
|
|
|
|
idev->evbit[0] = BIT(EV_ABS);
|
|
|
|
|
|
|
|
ucb1400_adc_enable(ucb);
|
|
|
|
x_res = ucb1400_ts_read_xres(ucb);
|
|
|
|
y_res = ucb1400_ts_read_yres(ucb);
|
|
|
|
ucb1400_adc_disable(ucb);
|
|
|
|
printk(KERN_DEBUG "UCB1400: x/y = %d/%d\n", x_res, y_res);
|
|
|
|
|
|
|
|
input_set_abs_params(idev, ABS_X, 0, x_res, 0, 0);
|
|
|
|
input_set_abs_params(idev, ABS_Y, 0, y_res, 0, 0);
|
|
|
|
input_set_abs_params(idev, ABS_PRESSURE, 0, 0, 0, 0);
|
|
|
|
|
|
|
|
error = input_register_device(idev);
|
|
|
|
if (error)
|
|
|
|
goto err_free_irq;
|
|
|
|
|
|
|
|
dev_set_drvdata(dev, ucb);
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
err_free_irq:
|
|
|
|
free_irq(ucb->irq, ucb);
|
|
|
|
err_free_devs:
|
|
|
|
input_free_device(idev);
|
|
|
|
kfree(ucb);
|
|
|
|
return error;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int ucb1400_ts_remove(struct device *dev)
|
|
|
|
{
|
|
|
|
struct ucb1400 *ucb = dev_get_drvdata(dev);
|
|
|
|
|
|
|
|
free_irq(ucb->irq, ucb);
|
|
|
|
input_unregister_device(ucb->ts_idev);
|
|
|
|
dev_set_drvdata(dev, NULL);
|
|
|
|
kfree(ucb);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct device_driver ucb1400_ts_driver = {
|
|
|
|
.owner = THIS_MODULE,
|
|
|
|
.bus = &ac97_bus_type,
|
|
|
|
.probe = ucb1400_ts_probe,
|
|
|
|
.remove = ucb1400_ts_remove,
|
|
|
|
.resume = ucb1400_ts_resume,
|
|
|
|
};
|
|
|
|
|
|
|
|
static int __init ucb1400_ts_init(void)
|
|
|
|
{
|
|
|
|
return driver_register(&ucb1400_ts_driver);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void __exit ucb1400_ts_exit(void)
|
|
|
|
{
|
|
|
|
driver_unregister(&ucb1400_ts_driver);
|
|
|
|
}
|
|
|
|
|
|
|
|
module_param(adcsync, int, 0444);
|
|
|
|
|
|
|
|
module_init(ucb1400_ts_init);
|
|
|
|
module_exit(ucb1400_ts_exit);
|
|
|
|
|
|
|
|
MODULE_DESCRIPTION("Philips UCB1400 touchscreen driver");
|
|
|
|
MODULE_LICENSE("GPL");
|