2006-12-02 05:53:48 +08:00
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/*
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* Device Tree Souce for Buffalo KuroboxHG
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*
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* Choose CONFIG_LINKSTATION to build a kernel for KuroboxHG, or use
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* the default configuration linkstation_defconfig.
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*
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* Based on sandpoint.dts
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*
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* 2006 (c) G. Liakhovetski <g.liakhovetski@gmx.de>
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*
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* This file is licensed under
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* the terms of the GNU General Public License version 2. This program
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* is licensed "as is" without any warranty of any kind, whether express
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* or implied.
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XXXX add flash parts, rtc, ??
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*/
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/ {
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model = "KuroboxHG";
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compatible = "linkstation";
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#address-cells = <1>;
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#size-cells = <1>;
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2007-12-12 15:46:12 +08:00
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aliases {
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serial0 = &serial0;
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serial1 = &serial1;
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pci0 = &pci0;
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};
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2006-12-02 05:53:48 +08:00
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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PowerPC,603e { /* Really 8241 */
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device_type = "cpu";
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reg = <0>;
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2007-07-22 06:43:11 +08:00
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clock-frequency = <fdad680>; /* Fixed by bootloader */
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timebase-frequency = <1F04000>; /* Fixed by bootloader */
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bus-frequency = <0>; /* Fixed by bootloader */
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2006-12-02 05:53:48 +08:00
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/* Following required by dtc but not used */
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i-cache-size = <4000>;
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d-cache-size = <4000>;
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};
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};
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memory {
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device_type = "memory";
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reg = <00000000 08000000>;
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};
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soc10x { /* AFAICT need to make soc for 8245's uarts to be defined */
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#address-cells = <1>;
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#size-cells = <1>;
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device_type = "soc";
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compatible = "mpc10x";
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store-gathering = <0>; /* 0 == off, !0 == on */
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reg = <80000000 00100000>;
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ranges = <80000000 80000000 70000000 /* pci mem space */
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fc000000 fc000000 00100000 /* EUMB */
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fe000000 fe000000 00c00000 /* pci i/o space */
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fec00000 fec00000 00300000 /* pci cfg regs */
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fef00000 fef00000 00100000>; /* pci iack */
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i2c@80003000 {
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2007-07-22 06:43:11 +08:00
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#address-cells = <1>;
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#size-cells = <0>;
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2007-12-12 13:17:24 +08:00
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cell-index = <0>;
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2006-12-02 05:53:48 +08:00
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compatible = "fsl-i2c";
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reg = <80003000 1000>;
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interrupts = <5 2>;
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2007-05-16 05:12:27 +08:00
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interrupt-parent = <&mpic>;
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2007-07-22 06:43:11 +08:00
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rtc@32 {
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device_type = "rtc";
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2007-08-26 06:08:11 +08:00
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compatible = "ricoh,rs5c372a";
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2007-07-22 06:43:11 +08:00
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reg = <32>;
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};
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2006-12-02 05:53:48 +08:00
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};
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2007-12-12 15:46:12 +08:00
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serial0: serial@80004500 {
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cell-index = <0>;
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2006-12-02 05:53:48 +08:00
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device_type = "serial";
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compatible = "ns16550";
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reg = <80004500 8>;
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clock-frequency = <7c044a8>;
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current-speed = <2580>;
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2007-08-26 06:08:11 +08:00
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interrupts = <9 0>;
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2007-05-16 05:12:27 +08:00
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interrupt-parent = <&mpic>;
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2006-12-02 05:53:48 +08:00
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};
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2007-12-12 15:46:12 +08:00
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serial1: serial@80004600 {
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cell-index = <1>;
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2006-12-02 05:53:48 +08:00
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device_type = "serial";
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compatible = "ns16550";
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reg = <80004600 8>;
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clock-frequency = <7c044a8>;
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current-speed = <e100>;
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interrupts = <a 0>;
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2007-05-16 05:12:27 +08:00
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interrupt-parent = <&mpic>;
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2006-12-02 05:53:48 +08:00
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};
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2007-07-22 06:43:11 +08:00
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mpic: interrupt-controller@80040000 {
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2006-12-02 05:53:48 +08:00
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#interrupt-cells = <2>;
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#address-cells = <0>;
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device_type = "open-pic";
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compatible = "chrp,open-pic";
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interrupt-controller;
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reg = <80040000 40000>;
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};
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2007-12-12 15:46:12 +08:00
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pci0: pci@fec00000 {
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2006-12-02 05:53:48 +08:00
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#address-cells = <3>;
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#size-cells = <2>;
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#interrupt-cells = <1>;
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device_type = "pci";
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compatible = "mpc10x-pci";
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reg = <fec00000 400000>;
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ranges = <01000000 0 0 fe000000 0 00c00000
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02000000 0 80000000 80000000 0 70000000>;
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bus-range = <0 ff>;
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clock-frequency = <7f28155>;
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2007-05-16 05:12:27 +08:00
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interrupt-parent = <&mpic>;
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2006-12-02 05:53:48 +08:00
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interrupt-map-mask = <f800 0 0 7>;
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interrupt-map = <
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2007-04-22 05:24:04 +08:00
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/* IDSEL 11 - IRQ0 ETH */
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2007-05-16 05:12:27 +08:00
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5800 0 0 1 &mpic 0 1
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5800 0 0 2 &mpic 1 1
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5800 0 0 3 &mpic 2 1
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5800 0 0 4 &mpic 3 1
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2007-04-22 05:24:04 +08:00
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/* IDSEL 12 - IRQ1 IDE0 */
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2007-05-16 05:12:27 +08:00
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6000 0 0 1 &mpic 1 1
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6000 0 0 2 &mpic 2 1
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6000 0 0 3 &mpic 3 1
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6000 0 0 4 &mpic 0 1
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2007-04-22 05:24:04 +08:00
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/* IDSEL 14 - IRQ3 USB2.0 */
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2007-05-16 05:12:27 +08:00
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7000 0 0 1 &mpic 3 1
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7000 0 0 2 &mpic 3 1
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7000 0 0 3 &mpic 3 1
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7000 0 0 4 &mpic 3 1
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2006-12-02 05:53:48 +08:00
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>;
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};
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};
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};
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