UbiquitousOS
/
OpenCloudOS-Kernel
mirror of https://gitee.com/OpenCloudOS/OpenCloudOS-Kernel.git
11
0
Fork 0
Code Issues Projects Releases Wiki Activity
OpenCloudOS-Kernel/Documentation/devicetree/bindings/mmc/sunxi-mmc.txt

51 lines
1.5 KiB
Plaintext
Raw Normal View History

mmc: sunxi: Add driver for SD/MMC hosts found on Allwinner sunxi SoCs The Allwinner sunxi mmc host uses dma in bus-master mode using a built-in designware idmac controller, which is identical to the one found in the mmc-dw hosts. However the rest of the host is not identical to mmc-dw, it deals with sending stop commands in hardware which makes it significantly different from the mmc-dw devices. Signed-off-by: David Lanzendörfer <david.lanzendoerfer@o2s.ch> [hdegoede@redhat.com: various cleanups and fixes] Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Chris Ball <chris@printf.net> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-05-12 20:04:48 +08:00
* Allwinner sunxi MMC controller
The highspeed MMC host controller on Allwinner SoCs provides an interface
for MMC, SD and SDIO types of memory cards.
Supported maximum speeds are the ones of the eMMC standard 4.5 as well
as the speed of SD standard 3.0.
Absolute maximum transfer rate is 200MB/s
Required properties:
mmc: sunxi: sun4i / sun5i do not have sample clocks It turns out that sun4i (A10) and sun5i (A13 & co) do not have sample clocks, so add a new sun7i-a20-mmc compatible and do not try to use sample clocks on sun4i / sun5i. Since sun4i / sun5i do not have sample clocks, they cannot (reliably) do DDR rates, so only set MMC_CAP_1_8V_DDR when we do have sample clks. Note this patch leaves the clk_prepare_enable() / clk_disable_unprepare() calls to the sample clks as-is, without adding checks for them being NULL. All the clk_foo calls accept a NULL clk and will return success when called with a NULL clk. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-07-30 22:25:47 +08:00
- compatible : should be one of:
* "allwinner,sun4i-a10-mmc"
* "allwinner,sun5i-a13-mmc"
* "allwinner,sun7i-a20-mmc"
mmc: sunxi: Add support for A83T eMMC (MMC2) The third MMC controller (MMC2) on the Allwinner A83T SoC is slightly different. It supports a wider 8-bit bus, has a dedicated controllable reset pin for eMMC, and a "new timing mode" which is supposed to deliver better signals and thus better performance. Add a compatible for this one to use the new timing mode not found in the other controllers. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-07-24 21:59:01 +08:00
* "allwinner,sun8i-a83t-emmc"
mmc: sunxi: sun4i / sun5i do not have sample clocks It turns out that sun4i (A10) and sun5i (A13 & co) do not have sample clocks, so add a new sun7i-a20-mmc compatible and do not try to use sample clocks on sun4i / sun5i. Since sun4i / sun5i do not have sample clocks, they cannot (reliably) do DDR rates, so only set MMC_CAP_1_8V_DDR when we do have sample clks. Note this patch leaves the clk_prepare_enable() / clk_disable_unprepare() calls to the sample clks as-is, without adding checks for them being NULL. All the clk_foo calls accept a NULL clk and will return success when called with a NULL clk. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-07-30 22:25:47 +08:00
* "allwinner,sun9i-a80-mmc"
dt-bindings: mmc: sunxi: Document A64 eMMC compatible We introduced recently a new compatible to deal with the A64 eMMC controller, let's document its binding. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-01-30 21:27:13 +08:00
* "allwinner,sun50i-a64-emmc"
Documentation: dt: Add new compatible to sunxi mmc driver bindings Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-08-05 10:57:14 +08:00
* "allwinner,sun50i-a64-mmc"
mmc: sunxi: Add driver for SD/MMC hosts found on Allwinner sunxi SoCs The Allwinner sunxi mmc host uses dma in bus-master mode using a built-in designware idmac controller, which is identical to the one found in the mmc-dw hosts. However the rest of the host is not identical to mmc-dw, it deals with sending stop commands in hardware which makes it significantly different from the mmc-dw devices. Signed-off-by: David Lanzendörfer <david.lanzendoerfer@o2s.ch> [hdegoede@redhat.com: various cleanups and fixes] Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Chris Ball <chris@printf.net> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-05-12 20:04:48 +08:00
- reg : mmc controller base registers
mmc: sunxi: Convert MMC driver to the standard clock phase API Now that we have proper support to use the generic phase API in our clock driver, switch the MMC driver to use it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: David Lanzendörfer <david.lanzendoerfer@o2s.ch> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Chen-Yu Tsai <wens@csie.org>
2014-07-12 18:01:33 +08:00
- clocks : a list with 4 phandle + clock specifier pairs
- clock-names : must contain "ahb", "mmc", "output" and "sample"
mmc: sunxi: Add driver for SD/MMC hosts found on Allwinner sunxi SoCs The Allwinner sunxi mmc host uses dma in bus-master mode using a built-in designware idmac controller, which is identical to the one found in the mmc-dw hosts. However the rest of the host is not identical to mmc-dw, it deals with sending stop commands in hardware which makes it significantly different from the mmc-dw devices. Signed-off-by: David Lanzendörfer <david.lanzendoerfer@o2s.ch> [hdegoede@redhat.com: various cleanups and fixes] Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Chris Ball <chris@printf.net> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-05-12 20:04:48 +08:00
- interrupts : mmc controller interrupt
Optional properties:
- resets : phandle + reset specifier pair
- reset-names : must contain "ahb"
- for cd, bus-width and additional generic mmc parameters
please refer to mmc.txt within this directory
Examples:
- Within .dtsi:
dt-bindings: Remove leading zeros from bindings notation Improve the binding example by removing all the leading zeros to fix the following dtc warnings: Warning (unit_address_format): Node /XXX unit name should not have leading 0s Converted using the following command: perl -p -i -e 's/\@0+([0-9a-f])/\@$1/g' `find ./Documentation/devicetree/bindings "*.txt"` Some unnecessary changes were manually fixed. Signed-off-by: Marco Franchi <marco.franchi@nxp.com> Signed-off-by: Rob Herring <robh@kernel.org>
2017-11-09 00:27:48 +08:00
mmc0: mmc@1c0f000 {
mmc: sunxi: Add driver for SD/MMC hosts found on Allwinner sunxi SoCs The Allwinner sunxi mmc host uses dma in bus-master mode using a built-in designware idmac controller, which is identical to the one found in the mmc-dw hosts. However the rest of the host is not identical to mmc-dw, it deals with sending stop commands in hardware which makes it significantly different from the mmc-dw devices. Signed-off-by: David Lanzendörfer <david.lanzendoerfer@o2s.ch> [hdegoede@redhat.com: various cleanups and fixes] Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Chris Ball <chris@printf.net> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-05-12 20:04:48 +08:00
compatible = "allwinner,sun5i-a13-mmc";
reg = <0x01c0f000 0x1000>;
mmc: sunxi: Convert MMC driver to the standard clock phase API Now that we have proper support to use the generic phase API in our clock driver, switch the MMC driver to use it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: David Lanzendörfer <david.lanzendoerfer@o2s.ch> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Chen-Yu Tsai <wens@csie.org>
2014-07-12 18:01:33 +08:00
clocks = <&ahb_gates 8>, <&mmc0_clk>, <&mmc0_output_clk>, <&mmc0_sample_clk>;
clock-names = "ahb", "mod", "output", "sample";
mmc: sunxi: Add driver for SD/MMC hosts found on Allwinner sunxi SoCs The Allwinner sunxi mmc host uses dma in bus-master mode using a built-in designware idmac controller, which is identical to the one found in the mmc-dw hosts. However the rest of the host is not identical to mmc-dw, it deals with sending stop commands in hardware which makes it significantly different from the mmc-dw devices. Signed-off-by: David Lanzendörfer <david.lanzendoerfer@o2s.ch> [hdegoede@redhat.com: various cleanups and fixes] Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Chris Ball <chris@printf.net> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-05-12 20:04:48 +08:00
interrupts = <0 32 4>;
status = "disabled";
};
- Within dts:
dt-bindings: Remove leading zeros from bindings notation Improve the binding example by removing all the leading zeros to fix the following dtc warnings: Warning (unit_address_format): Node /XXX unit name should not have leading 0s Converted using the following command: perl -p -i -e 's/\@0+([0-9a-f])/\@$1/g' `find ./Documentation/devicetree/bindings "*.txt"` Some unnecessary changes were manually fixed. Signed-off-by: Marco Franchi <marco.franchi@nxp.com> Signed-off-by: Rob Herring <robh@kernel.org>
2017-11-09 00:27:48 +08:00
mmc0: mmc@1c0f000 {
mmc: sunxi: Add driver for SD/MMC hosts found on Allwinner sunxi SoCs The Allwinner sunxi mmc host uses dma in bus-master mode using a built-in designware idmac controller, which is identical to the one found in the mmc-dw hosts. However the rest of the host is not identical to mmc-dw, it deals with sending stop commands in hardware which makes it significantly different from the mmc-dw devices. Signed-off-by: David Lanzendörfer <david.lanzendoerfer@o2s.ch> [hdegoede@redhat.com: various cleanups and fixes] Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Chris Ball <chris@printf.net> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-05-12 20:04:48 +08:00
pinctrl-names = "default", "default";
pinctrl-0 = <&mmc0_pins_a>;
pinctrl-1 = <&mmc0_cd_pin_reference_design>;
bus-width = <4>;
cd-gpios = <&pio 7 1 0>; /* PH1 */
cd-inverted;
status = "okay";
};