2009-12-18 07:27:20 +08:00
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/*
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* Freescale eSDHC controller driver.
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*
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* Copyright (c) 2007 Freescale Semiconductor, Inc.
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* Copyright (c) 2009 MontaVista Software, Inc.
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*
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* Authors: Xiaobo Xie <X.Xie@freescale.com>
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* Anton Vorontsov <avorontsov@ru.mvista.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or (at
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* your option) any later version.
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*/
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#include <linux/io.h>
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#include <linux/delay.h>
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#include <linux/mmc/host.h>
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#include "sdhci-of.h"
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#include "sdhci.h"
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2010-10-15 18:21:03 +08:00
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#include "sdhci-esdhc.h"
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2009-12-18 07:27:20 +08:00
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static u16 esdhc_readw(struct sdhci_host *host, int reg)
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{
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u16 ret;
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if (unlikely(reg == SDHCI_HOST_VERSION))
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ret = in_be16(host->ioaddr + reg);
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else
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ret = sdhci_be32bs_readw(host, reg);
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return ret;
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}
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static void esdhc_writew(struct sdhci_host *host, u16 val, int reg)
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{
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if (reg == SDHCI_BLOCK_SIZE) {
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/*
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* Two last DMA bits are reserved, and first one is used for
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* non-standard blksz of 4096 bytes that we don't support
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* yet. So clear the DMA boundary bits.
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*/
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val &= ~SDHCI_MAKE_BLKSZ(0x7, 0);
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}
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sdhci_be32bs_writew(host, val, reg);
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}
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static void esdhc_writeb(struct sdhci_host *host, u8 val, int reg)
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{
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/* Prevent SDHCI core from writing reserved bits (e.g. HISPD). */
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if (reg == SDHCI_HOST_CONTROL)
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val &= ~ESDHC_HOST_CONTROL_RES;
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sdhci_be32bs_writeb(host, val, reg);
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}
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2010-10-15 18:21:03 +08:00
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static int esdhc_of_enable_dma(struct sdhci_host *host)
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2009-12-18 07:27:20 +08:00
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{
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setbits32(host->ioaddr + ESDHC_DMA_SYSCTL, ESDHC_DMA_SNOOP);
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return 0;
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}
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2010-10-15 18:21:03 +08:00
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static unsigned int esdhc_of_get_max_clock(struct sdhci_host *host)
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2009-12-18 07:27:20 +08:00
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{
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struct sdhci_of_host *of_host = sdhci_priv(host);
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return of_host->clock;
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}
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2010-10-15 18:21:03 +08:00
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static unsigned int esdhc_of_get_min_clock(struct sdhci_host *host)
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2009-12-18 07:27:20 +08:00
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{
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struct sdhci_of_host *of_host = sdhci_priv(host);
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return of_host->clock / 256 / 16;
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}
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struct sdhci_of_data sdhci_esdhc = {
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2010-10-15 18:21:03 +08:00
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.quirks = ESDHC_DEFAULT_QUIRKS,
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2009-12-18 07:27:20 +08:00
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.ops = {
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sdhci: build fix: rename SDHCI I/O accessor functions
Unfortunately some architectures #define their read{b,w,l} and
write{b,w,l} I/O accessors which makes the SDHCI I/O accessor functions of
the same names subject to preprocessing. This leads to the following
compiler error,
In file included from drivers/mmc/host/sdhci.c:26:
drivers/mmc/host/sdhci.h:318:35: error: macro "writel" passed 3 arguments, but takes just 2
Rename the SDHCI I/O functions so that CONFIG_MMC_SDHCI_IO_ACCESSORS can
be enabled for architectures that implement their read{b,w,l} and
write{b,w,l} functions with macros.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
Cc: Zhangfei Gao <zgao6@marvell.com>
Acked-by: Anton Vorontsov <cbouatmailru@gmail.com>
Acked-by: Wolfram Sang <w.sang@pengutronix.de>
Acked-by: Ben Dooks <ben-linux@fluff.org>
Cc: <linux-mmc@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2010-05-27 05:42:03 +08:00
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.read_l = sdhci_be32bs_readl,
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.read_w = esdhc_readw,
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.read_b = sdhci_be32bs_readb,
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.write_l = sdhci_be32bs_writel,
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.write_w = esdhc_writew,
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.write_b = esdhc_writeb,
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2009-12-18 07:27:20 +08:00
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.set_clock = esdhc_set_clock,
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2010-10-15 18:21:03 +08:00
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.enable_dma = esdhc_of_enable_dma,
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.get_max_clock = esdhc_of_get_max_clock,
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.get_min_clock = esdhc_of_get_min_clock,
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2009-12-18 07:27:20 +08:00
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},
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};
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