OpenCloudOS-Kernel/Documentation/devicetree/bindings/display/st,stm32-dsi.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/st,stm32-dsi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics STM32 DSI host controller
maintainers:
dt-bindings: treewide: Update @st.com email address to @foss.st.com Not all @st.com email address are concerned, only people who have a specific @foss.st.com email will see their entry updated. For some people, who left the company, remove their email. Cc: Alexandre Torgue <alexandre.torgue@foss.st.com> Cc: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com> Cc: Fabien Dessenne <fabien.dessenne@foss.st.com> Cc: Christophe Roullier <christophe.roullier@foss.st.com> Cc: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Cc: Lionel Debieve <lionel.debieve@foss.st.com> Cc: Amelie Delaunay <amelie.delaunay@foss.st.com> Cc: Pierre-Yves MORDRET <pierre-yves.mordret@foss.st.com> Cc: Ludovic Barre <ludovic.barre@foss.st.com> Cc: Christophe Kerello <christophe.kerello@foss.st.com> Cc: pascal Paillet <p.paillet@foss.st.com> Cc: Erwan Le Ray <erwan.leray@foss.st.com> Cc: Philippe CORNU <philippe.cornu@foss.st.com> Cc: Yannick Fertre <yannick.fertre@foss.st.com> Cc: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Cc: Olivier Moysan <olivier.moysan@foss.st.com> Cc: Hugues Fruchet <hugues.fruchet@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-By: Vinod Koul <vkoul@kernel.org> Acked-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20211110150144.18272-6-patrice.chotard@foss.st.com Signed-off-by: Rob Herring <robh@kernel.org>
2021-11-10 23:01:44 +08:00
- Philippe Cornu <philippe.cornu@foss.st.com>
- Yannick Fertre <yannick.fertre@foss.st.com>
description:
The STMicroelectronics STM32 DSI controller uses the Synopsys DesignWare MIPI-DSI host controller.
allOf:
- $ref: dsi-controller.yaml#
properties:
compatible:
const: st,stm32-dsi
reg:
maxItems: 1
clocks:
items:
- description: Module Clock
- description: DSI bus clock
- description: Pixel clock
minItems: 2
clock-names:
items:
- const: pclk
- const: ref
- const: px_clk
minItems: 2
resets:
maxItems: 1
reset-names:
items:
- const: apb
phy-dsi-supply:
description:
Phandle of the regulator that provides the supply voltage.
ports:
$ref: /schemas/graph.yaml#/properties/ports
properties:
port@0:
$ref: /schemas/graph.yaml#/properties/port
description:
DSI input port node, connected to the ltdc rgb output port.
port@1:
$ref: /schemas/graph.yaml#/properties/port
description:
DSI output port node, connected to a panel or a bridge input port"
required:
- "#address-cells"
- "#size-cells"
- compatible
- reg
- clocks
- clock-names
- ports
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/stm32mp1-clks.h>
#include <dt-bindings/reset/stm32mp1-resets.h>
#include <dt-bindings/gpio/gpio.h>
dsi: dsi@5a000000 {
compatible = "st,stm32-dsi";
reg = <0x5a000000 0x800>;
clocks = <&rcc DSI_K>, <&clk_hse>, <&rcc DSI_PX>;
clock-names = "pclk", "ref", "px_clk";
resets = <&rcc DSI_R>;
reset-names = "apb";
phy-dsi-supply = <&reg18>;
#address-cells = <1>;
#size-cells = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dsi_in: endpoint {
remote-endpoint = <&ltdc_ep1_out>;
};
};
port@1 {
reg = <1>;
dsi_out: endpoint {
remote-endpoint = <&panel_in>;
};
};
};
panel@0 {
compatible = "orisetech,otm8009a";
reg = <0>;
reset-gpios = <&gpioe 4 GPIO_ACTIVE_LOW>;
power-supply = <&v3v3>;
port {
panel_in: endpoint {
remote-endpoint = <&dsi_out>;
};
};
};
};
...