2012-01-26 18:59:20 +08:00
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/*
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* at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
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* applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
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* AT91SAM9X25, AT91SAM9X35 SoC
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*
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* Copyright (C) 2012 Atmel,
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* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
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*
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* Licensed under GPLv2 or later.
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*/
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/include/ "skeleton.dtsi"
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/ {
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model = "Atmel AT91SAM9x5 family SoC";
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compatible = "atmel,at91sam9x5";
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interrupt-parent = <&aic>;
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aliases {
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serial0 = &dbgu;
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serial1 = &usart0;
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serial2 = &usart1;
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serial3 = &usart2;
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gpio0 = &pioA;
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gpio1 = &pioB;
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gpio2 = &pioC;
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gpio3 = &pioD;
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tcb0 = &tcb0;
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tcb1 = &tcb1;
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2012-09-12 14:42:16 +08:00
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i2c0 = &i2c0;
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i2c1 = &i2c1;
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i2c2 = &i2c2;
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2012-01-26 18:59:20 +08:00
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};
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cpus {
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cpu@0 {
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compatible = "arm,arm926ejs";
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};
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};
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2012-04-03 02:44:20 +08:00
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memory {
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2012-01-26 18:59:20 +08:00
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reg = <0x20000000 0x10000000>;
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};
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ahb {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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apb {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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aic: interrupt-controller@fffff000 {
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2012-06-20 22:13:30 +08:00
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#interrupt-cells = <3>;
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2012-01-26 18:59:20 +08:00
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compatible = "atmel,at91rm9200-aic";
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interrupt-controller;
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reg = <0xfffff000 0x200>;
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2012-04-09 19:36:36 +08:00
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atmel,external-irqs = <31>;
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2012-01-26 18:59:20 +08:00
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};
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2012-03-02 20:54:37 +08:00
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ramc0: ramc@ffffe800 {
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compatible = "atmel,at91sam9g45-ddramc";
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reg = <0xffffe800 0x200>;
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};
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2012-03-02 20:44:23 +08:00
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pmc: pmc@fffffc00 {
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compatible = "atmel,at91rm9200-pmc";
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reg = <0xfffffc00 0x100>;
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};
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2012-03-03 03:16:27 +08:00
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rstc@fffffe00 {
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compatible = "atmel,at91sam9g45-rstc";
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reg = <0xfffffe00 0x10>;
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};
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2012-03-02 21:01:00 +08:00
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shdwc@fffffe10 {
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compatible = "atmel,at91sam9x5-shdwc";
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reg = <0xfffffe10 0x10>;
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};
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2012-01-26 18:59:20 +08:00
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pit: timer@fffffe30 {
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compatible = "atmel,at91sam9260-pit";
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reg = <0xfffffe30 0xf>;
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2012-06-20 22:13:30 +08:00
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interrupts = <1 4 7>;
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2012-01-26 18:59:20 +08:00
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};
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tcb0: timer@f8008000 {
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compatible = "atmel,at91sam9x5-tcb";
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reg = <0xf8008000 0x100>;
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2012-06-20 22:13:30 +08:00
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interrupts = <17 4 0>;
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2012-01-26 18:59:20 +08:00
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};
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tcb1: timer@f800c000 {
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compatible = "atmel,at91sam9x5-tcb";
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reg = <0xf800c000 0x100>;
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2012-06-20 22:13:30 +08:00
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interrupts = <17 4 0>;
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2012-01-26 18:59:20 +08:00
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};
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dma0: dma-controller@ffffec00 {
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compatible = "atmel,at91sam9g45-dma";
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reg = <0xffffec00 0x200>;
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2012-06-20 22:13:30 +08:00
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interrupts = <20 4 0>;
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2012-01-26 18:59:20 +08:00
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};
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dma1: dma-controller@ffffee00 {
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compatible = "atmel,at91sam9g45-dma";
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reg = <0xffffee00 0x200>;
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2012-06-20 22:13:30 +08:00
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interrupts = <21 4 0>;
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2012-01-26 18:59:20 +08:00
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};
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2012-07-05 16:56:09 +08:00
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pinctrl@fffff400 {
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2012-07-04 17:20:46 +08:00
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#address-cells = <1>;
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#size-cells = <1>;
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2012-07-05 16:56:09 +08:00
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compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
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2012-07-04 17:20:46 +08:00
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ranges = <0xfffff400 0xfffff400 0x800>;
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2012-07-05 16:56:09 +08:00
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/* shared pinctrl settings */
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2012-07-05 16:56:09 +08:00
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dbgu {
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pinctrl_dbgu: dbgu-0 {
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atmel,pins =
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<0 9 0x1 0x0 /* PA9 periph A */
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0 10 0x1 0x1>; /* PA10 periph A with pullup */
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};
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};
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2012-11-19 06:40:01 +08:00
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usart0 {
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pinctrl_usart0: usart0-0 {
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2012-07-05 16:56:09 +08:00
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atmel,pins =
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<0 0 0x1 0x1 /* PA0 periph A with pullup */
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0 1 0x1 0x0>; /* PA1 periph A */
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};
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2012-11-19 07:30:01 +08:00
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pinctrl_usart0_rts: usart0_rts-0 {
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2012-07-05 16:56:09 +08:00
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atmel,pins =
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2012-11-19 07:30:01 +08:00
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<0 2 0x1 0x0>; /* PA2 periph A */
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};
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pinctrl_usart0_cts: usart0_cts-0 {
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atmel,pins =
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<0 3 0x1 0x0>; /* PA3 periph A */
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2012-07-05 16:56:09 +08:00
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};
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};
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2012-11-19 06:40:01 +08:00
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usart1 {
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pinctrl_usart1: usart1-0 {
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2012-07-05 16:56:09 +08:00
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atmel,pins =
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<0 5 0x1 0x1 /* PA5 periph A with pullup */
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0 6 0x1 0x0>; /* PA6 periph A */
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};
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2012-11-19 07:30:01 +08:00
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pinctrl_usart1_rts: usart1_rts-0 {
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atmel,pins =
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<3 27 0x3 0x0>; /* PC27 periph C */
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};
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pinctrl_usart1_cts: usart1_cts-0 {
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2012-07-05 16:56:09 +08:00
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atmel,pins =
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2012-11-19 07:30:01 +08:00
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<3 28 0x3 0x0>; /* PC28 periph C */
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2012-07-05 16:56:09 +08:00
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};
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};
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2012-11-19 06:40:01 +08:00
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usart2 {
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pinctrl_usart2: usart2-0 {
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2012-07-05 16:56:09 +08:00
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atmel,pins =
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<0 7 0x1 0x1 /* PA7 periph A with pullup */
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0 8 0x1 0x0>; /* PA8 periph A */
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};
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2012-11-19 07:30:01 +08:00
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pinctrl_uart2_rts: uart2_rts-0 {
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2012-07-05 16:56:09 +08:00
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atmel,pins =
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2012-11-19 07:30:01 +08:00
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<0 0 0x2 0x0>; /* PB0 periph B */
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};
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pinctrl_uart2_cts: uart2_cts-0 {
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atmel,pins =
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<0 1 0x2 0x0>; /* PB1 periph B */
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2012-07-05 16:56:09 +08:00
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};
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};
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2012-11-19 06:40:01 +08:00
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usart3 {
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pinctrl_uart3: usart3-0 {
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2012-07-05 16:56:09 +08:00
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atmel,pins =
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<3 23 0x2 0x1 /* PC22 periph B with pullup */
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3 23 0x2 0x0>; /* PC23 periph B */
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};
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2012-11-19 07:30:01 +08:00
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pinctrl_usart3_rts: usart3_rts-0 {
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atmel,pins =
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<3 24 0x2 0x0>; /* PC24 periph B */
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};
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pinctrl_usart3_cts: usart3_cts-0 {
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2012-07-05 16:56:09 +08:00
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atmel,pins =
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2012-11-19 07:30:01 +08:00
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<3 25 0x2 0x0>; /* PC25 periph B */
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2012-07-05 16:56:09 +08:00
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};
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};
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2012-11-19 06:40:01 +08:00
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uart0 {
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pinctrl_uart0: uart0-0 {
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2012-07-05 16:56:09 +08:00
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atmel,pins =
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<3 8 0x3 0x0 /* PC8 periph C */
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3 9 0x3 0x1>; /* PC9 periph C with pullup */
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};
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};
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2012-11-19 06:40:01 +08:00
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uart1 {
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pinctrl_uart1: uart1-0 {
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2012-07-05 16:56:09 +08:00
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atmel,pins =
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<3 16 0x3 0x0 /* PC16 periph C */
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3 17 0x3 0x1>; /* PC17 periph C with pullup */
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};
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};
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2012-07-05 16:56:09 +08:00
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2012-07-12 23:36:52 +08:00
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nand {
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pinctrl_nand: nand-0 {
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atmel,pins =
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<3 4 0x0 0x1 /* PD5 gpio RDY pin pull_up */
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3 5 0x0 0x1>; /* PD4 gpio enable pin pull_up */
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};
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};
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2012-10-23 10:19:11 +08:00
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macb0 {
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pinctrl_macb0_rmii: macb0_rmii-0 {
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atmel,pins =
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<1 0 0x1 0x0 /* PB0 periph A */
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1 1 0x1 0x0 /* PB1 periph A */
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1 2 0x1 0x0 /* PB2 periph A */
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1 3 0x1 0x0 /* PB3 periph A */
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1 4 0x1 0x0 /* PB4 periph A */
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1 5 0x1 0x0 /* PB5 periph A */
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1 6 0x1 0x0 /* PB6 periph A */
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1 7 0x1 0x0 /* PB7 periph A */
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1 9 0x1 0x0 /* PB9 periph A */
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1 10 0x1 0x0>; /* PB10 periph A */
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};
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pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 {
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atmel,pins =
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<1 8 0x1 0x0 /* PA8 periph A */
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1 11 0x1 0x0 /* PA11 periph A */
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1 12 0x1 0x0 /* PA12 periph A */
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1 13 0x1 0x0 /* PA13 periph A */
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1 14 0x1 0x0 /* PA14 periph A */
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1 15 0x1 0x0 /* PA15 periph A */
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1 16 0x1 0x0 /* PA16 periph A */
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1 17 0x1 0x0>; /* PA17 periph A */
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};
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};
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2012-07-04 17:20:46 +08:00
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pioA: gpio@fffff400 {
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compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
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reg = <0xfffff400 0x200>;
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interrupts = <2 4 1>;
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#gpio-cells = <2>;
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gpio-controller;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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pioB: gpio@fffff600 {
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compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
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reg = <0xfffff600 0x200>;
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interrupts = <2 4 1>;
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#gpio-cells = <2>;
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gpio-controller;
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2012-07-14 15:26:08 +08:00
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#gpio-lines = <19>;
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2012-07-04 17:20:46 +08:00
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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pioC: gpio@fffff800 {
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compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
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reg = <0xfffff800 0x200>;
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interrupts = <3 4 1>;
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#gpio-cells = <2>;
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gpio-controller;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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pioD: gpio@fffffa00 {
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compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
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reg = <0xfffffa00 0x200>;
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interrupts = <3 4 1>;
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#gpio-cells = <2>;
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gpio-controller;
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2012-07-14 15:26:08 +08:00
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#gpio-lines = <22>;
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2012-07-04 17:20:46 +08:00
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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2012-01-26 18:59:20 +08:00
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};
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dbgu: serial@fffff200 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xfffff200 0x200>;
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2012-06-20 22:13:30 +08:00
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interrupts = <1 4 7>;
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2012-07-05 16:56:09 +08:00
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_dbgu>;
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2012-01-26 18:59:20 +08:00
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status = "disabled";
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};
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usart0: serial@f801c000 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xf801c000 0x200>;
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2012-06-20 22:13:30 +08:00
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interrupts = <5 4 5>;
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2012-01-26 18:59:20 +08:00
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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2012-07-05 16:56:09 +08:00
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pinctrl-names = "default";
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2012-11-19 06:40:01 +08:00
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pinctrl-0 = <&pinctrl_usart0>;
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2012-01-26 18:59:20 +08:00
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status = "disabled";
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};
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usart1: serial@f8020000 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xf8020000 0x200>;
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2012-06-20 22:13:30 +08:00
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|
interrupts = <6 4 5>;
|
2012-01-26 18:59:20 +08:00
|
|
|
atmel,use-dma-rx;
|
|
|
|
atmel,use-dma-tx;
|
2012-07-05 16:56:09 +08:00
|
|
|
pinctrl-names = "default";
|
2012-11-19 06:40:01 +08:00
|
|
|
pinctrl-0 = <&pinctrl_usart1>;
|
2012-01-26 18:59:20 +08:00
|
|
|
status = "disabled";
|
|
|
|
};
|
|
|
|
|
|
|
|
usart2: serial@f8024000 {
|
|
|
|
compatible = "atmel,at91sam9260-usart";
|
|
|
|
reg = <0xf8024000 0x200>;
|
2012-06-20 22:13:30 +08:00
|
|
|
interrupts = <7 4 5>;
|
2012-01-26 18:59:20 +08:00
|
|
|
atmel,use-dma-rx;
|
|
|
|
atmel,use-dma-tx;
|
2012-07-05 16:56:09 +08:00
|
|
|
pinctrl-names = "default";
|
2012-11-19 06:40:01 +08:00
|
|
|
pinctrl-0 = <&pinctrl_usart2>;
|
2012-01-26 18:59:20 +08:00
|
|
|
status = "disabled";
|
|
|
|
};
|
|
|
|
|
|
|
|
macb0: ethernet@f802c000 {
|
|
|
|
compatible = "cdns,at32ap7000-macb", "cdns,macb";
|
|
|
|
reg = <0xf802c000 0x100>;
|
2012-06-20 22:13:30 +08:00
|
|
|
interrupts = <24 4 3>;
|
2012-10-23 10:19:11 +08:00
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&pinctrl_macb0_rmii>;
|
2012-01-26 18:59:20 +08:00
|
|
|
status = "disabled";
|
|
|
|
};
|
|
|
|
|
|
|
|
macb1: ethernet@f8030000 {
|
|
|
|
compatible = "cdns,at32ap7000-macb", "cdns,macb";
|
|
|
|
reg = <0xf8030000 0x100>;
|
2012-06-20 22:13:30 +08:00
|
|
|
interrupts = <27 4 3>;
|
2012-01-26 18:59:20 +08:00
|
|
|
status = "disabled";
|
|
|
|
};
|
2012-05-11 21:35:39 +08:00
|
|
|
|
2012-09-12 14:42:16 +08:00
|
|
|
i2c0: i2c@f8010000 {
|
|
|
|
compatible = "atmel,at91sam9x5-i2c";
|
|
|
|
reg = <0xf8010000 0x100>;
|
|
|
|
interrupts = <9 4 6>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
status = "disabled";
|
|
|
|
};
|
|
|
|
|
|
|
|
i2c1: i2c@f8014000 {
|
|
|
|
compatible = "atmel,at91sam9x5-i2c";
|
|
|
|
reg = <0xf8014000 0x100>;
|
|
|
|
interrupts = <10 4 6>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
status = "disabled";
|
|
|
|
};
|
|
|
|
|
|
|
|
i2c2: i2c@f8018000 {
|
|
|
|
compatible = "atmel,at91sam9x5-i2c";
|
|
|
|
reg = <0xf8018000 0x100>;
|
|
|
|
interrupts = <11 4 6>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
status = "disabled";
|
|
|
|
};
|
|
|
|
|
2012-05-11 21:35:39 +08:00
|
|
|
adc0: adc@f804c000 {
|
|
|
|
compatible = "atmel,at91sam9260-adc";
|
|
|
|
reg = <0xf804c000 0x100>;
|
2012-06-20 22:13:30 +08:00
|
|
|
interrupts = <19 4 0>;
|
2012-05-11 21:35:39 +08:00
|
|
|
atmel,adc-use-external;
|
|
|
|
atmel,adc-channels-used = <0xffff>;
|
|
|
|
atmel,adc-vref = <3300>;
|
|
|
|
atmel,adc-num-channels = <12>;
|
|
|
|
atmel,adc-startup-time = <40>;
|
|
|
|
atmel,adc-channel-base = <0x50>;
|
|
|
|
atmel,adc-drdy-mask = <0x1000000>;
|
|
|
|
atmel,adc-status-register = <0x30>;
|
|
|
|
atmel,adc-trigger-register = <0xc0>;
|
|
|
|
|
|
|
|
trigger@0 {
|
|
|
|
trigger-name = "external-rising";
|
|
|
|
trigger-value = <0x1>;
|
|
|
|
trigger-external;
|
|
|
|
};
|
|
|
|
|
|
|
|
trigger@1 {
|
|
|
|
trigger-name = "external-falling";
|
|
|
|
trigger-value = <0x2>;
|
|
|
|
trigger-external;
|
|
|
|
};
|
|
|
|
|
|
|
|
trigger@2 {
|
|
|
|
trigger-name = "external-any";
|
|
|
|
trigger-value = <0x3>;
|
|
|
|
trigger-external;
|
|
|
|
};
|
|
|
|
|
|
|
|
trigger@3 {
|
|
|
|
trigger-name = "continuous";
|
|
|
|
trigger-value = <0x6>;
|
|
|
|
};
|
|
|
|
};
|
2012-01-26 18:59:20 +08:00
|
|
|
};
|
2012-02-21 21:38:18 +08:00
|
|
|
|
|
|
|
nand0: nand@40000000 {
|
|
|
|
compatible = "atmel,at91rm9200-nand";
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <1>;
|
|
|
|
reg = <0x40000000 0x10000000
|
|
|
|
>;
|
|
|
|
atmel,nand-addr-offset = <21>;
|
|
|
|
atmel,nand-cmd-offset = <22>;
|
2012-07-12 23:36:52 +08:00
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&pinctrl_nand>;
|
2012-03-22 21:47:40 +08:00
|
|
|
gpios = <&pioD 5 0
|
|
|
|
&pioD 4 0
|
2012-02-21 21:38:18 +08:00
|
|
|
0
|
|
|
|
>;
|
|
|
|
status = "disabled";
|
|
|
|
};
|
2011-11-21 06:55:18 +08:00
|
|
|
|
|
|
|
usb0: ohci@00600000 {
|
|
|
|
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
|
|
|
|
reg = <0x00600000 0x100000>;
|
2012-06-20 22:13:30 +08:00
|
|
|
interrupts = <22 4 2>;
|
2011-11-21 06:55:18 +08:00
|
|
|
status = "disabled";
|
|
|
|
};
|
2011-11-22 12:11:13 +08:00
|
|
|
|
|
|
|
usb1: ehci@00700000 {
|
|
|
|
compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
|
|
|
|
reg = <0x00700000 0x100000>;
|
2012-06-20 22:13:30 +08:00
|
|
|
interrupts = <22 4 2>;
|
2011-11-22 12:11:13 +08:00
|
|
|
status = "disabled";
|
|
|
|
};
|
2012-01-26 18:59:20 +08:00
|
|
|
};
|
2012-02-23 22:50:32 +08:00
|
|
|
|
|
|
|
i2c@0 {
|
|
|
|
compatible = "i2c-gpio";
|
|
|
|
gpios = <&pioA 30 0 /* sda */
|
|
|
|
&pioA 31 0 /* scl */
|
|
|
|
>;
|
|
|
|
i2c-gpio,sda-open-drain;
|
|
|
|
i2c-gpio,scl-open-drain;
|
|
|
|
i2c-gpio,delay-us = <2>; /* ~100 kHz */
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
status = "disabled";
|
|
|
|
};
|
|
|
|
|
|
|
|
i2c@1 {
|
|
|
|
compatible = "i2c-gpio";
|
|
|
|
gpios = <&pioC 0 0 /* sda */
|
|
|
|
&pioC 1 0 /* scl */
|
|
|
|
>;
|
|
|
|
i2c-gpio,sda-open-drain;
|
|
|
|
i2c-gpio,scl-open-drain;
|
|
|
|
i2c-gpio,delay-us = <2>; /* ~100 kHz */
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
status = "disabled";
|
|
|
|
};
|
|
|
|
|
|
|
|
i2c@2 {
|
|
|
|
compatible = "i2c-gpio";
|
|
|
|
gpios = <&pioB 4 0 /* sda */
|
|
|
|
&pioB 5 0 /* scl */
|
|
|
|
>;
|
|
|
|
i2c-gpio,sda-open-drain;
|
|
|
|
i2c-gpio,scl-open-drain;
|
|
|
|
i2c-gpio,delay-us = <2>; /* ~100 kHz */
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
status = "disabled";
|
|
|
|
};
|
2012-01-26 18:59:20 +08:00
|
|
|
};
|