OpenCloudOS-Kernel/drivers/gpio/gpio-htc-egpio.c

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/*
* Support for the GPIO/IRQ expander chips present on several HTC phones.
* These are implemented in CPLD chips present on the board.
*
* Copyright (c) 2007 Kevin O'Connor <kevin@koconnor.net>
* Copyright (c) 2007 Philipp Zabel <philipp.zabel@gmail.com>
*
* This file may be distributed under the terms of the GNU GPL license.
*/
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/io.h>
#include <linux/spinlock.h>
#include <linux/platform_data/gpio-htc-egpio.h>
#include <linux/platform_device.h>
include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h percpu.h is included by sched.h and module.h and thus ends up being included when building most .c files. percpu.h includes slab.h which in turn includes gfp.h making everything defined by the two files universally available and complicating inclusion dependencies. percpu.h -> slab.h dependency is about to be removed. Prepare for this change by updating users of gfp and slab facilities include those headers directly instead of assuming availability. As this conversion needs to touch large number of source files, the following script is used as the basis of conversion. http://userweb.kernel.org/~tj/misc/slabh-sweep.py The script does the followings. * Scan files for gfp and slab usages and update includes such that only the necessary includes are there. ie. if only gfp is used, gfp.h, if slab is used, slab.h. * When the script inserts a new include, it looks at the include blocks and try to put the new include such that its order conforms to its surrounding. It's put in the include block which contains core kernel includes, in the same order that the rest are ordered - alphabetical, Christmas tree, rev-Xmas-tree or at the end if there doesn't seem to be any matching order. * If the script can't find a place to put a new include (mostly because the file doesn't have fitting include block), it prints out an error message indicating which .h file needs to be added to the file. The conversion was done in the following steps. 1. The initial automatic conversion of all .c files updated slightly over 4000 files, deleting around 700 includes and adding ~480 gfp.h and ~3000 slab.h inclusions. The script emitted errors for ~400 files. 2. Each error was manually checked. Some didn't need the inclusion, some needed manual addition while adding it to implementation .h or embedding .c file was more appropriate for others. This step added inclusions to around 150 files. 3. The script was run again and the output was compared to the edits from #2 to make sure no file was left behind. 4. Several build tests were done and a couple of problems were fixed. e.g. lib/decompress_*.c used malloc/free() wrappers around slab APIs requiring slab.h to be added manually. 5. The script was run on all .h files but without automatically editing them as sprinkling gfp.h and slab.h inclusions around .h files could easily lead to inclusion dependency hell. Most gfp.h inclusion directives were ignored as stuff from gfp.h was usually wildly available and often used in preprocessor macros. Each slab.h inclusion directive was examined and added manually as necessary. 6. percpu.h was updated not to include slab.h. 7. Build test were done on the following configurations and failures were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my distributed build env didn't work with gcov compiles) and a few more options had to be turned off depending on archs to make things build (like ipr on powerpc/64 which failed due to missing writeq). * x86 and x86_64 UP and SMP allmodconfig and a custom test config. * powerpc and powerpc64 SMP allmodconfig * sparc and sparc64 SMP allmodconfig * ia64 SMP allmodconfig * s390 SMP allmodconfig * alpha SMP allmodconfig * um on x86_64 SMP allmodconfig 8. percpu.h modifications were reverted so that it could be applied as a separate patch and serve as bisection point. Given the fact that I had only a couple of failures from tests on step 6, I'm fairly confident about the coverage of this conversion patch. If there is a breakage, it's likely to be something in one of the arch headers which should be easily discoverable easily on most builds of the specific arch. Signed-off-by: Tejun Heo <tj@kernel.org> Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 16:04:11 +08:00
#include <linux/slab.h>
#include <linux/init.h>
struct egpio_chip {
int reg_start;
int cached_values;
unsigned long is_out;
struct device *dev;
struct gpio_chip chip;
};
struct egpio_info {
spinlock_t lock;
/* iomem info */
void __iomem *base_addr;
int bus_shift; /* byte shift */
int reg_shift; /* bit shift */
int reg_mask;
/* irq info */
int ack_register;
int ack_write;
u16 irqs_enabled;
uint irq_start;
int nirqs;
uint chained_irq;
/* egpio info */
struct egpio_chip *chip;
int nchips;
};
static inline void egpio_writew(u16 value, struct egpio_info *ei, int reg)
{
writew(value, ei->base_addr + (reg << ei->bus_shift));
}
static inline u16 egpio_readw(struct egpio_info *ei, int reg)
{
return readw(ei->base_addr + (reg << ei->bus_shift));
}
/*
* IRQs
*/
static inline void ack_irqs(struct egpio_info *ei)
{
egpio_writew(ei->ack_write, ei, ei->ack_register);
pr_debug("EGPIO ack - write %x to base+%x\n",
ei->ack_write, ei->ack_register << ei->bus_shift);
}
static void egpio_ack(struct irq_data *data)
{
}
/* There does not appear to be a way to proactively mask interrupts
* on the egpio chip itself. So, we simply ignore interrupts that
* aren't desired. */
static void egpio_mask(struct irq_data *data)
{
struct egpio_info *ei = irq_data_get_irq_chip_data(data);
ei->irqs_enabled &= ~(1 << (data->irq - ei->irq_start));
pr_debug("EGPIO mask %d %04x\n", data->irq, ei->irqs_enabled);
}
static void egpio_unmask(struct irq_data *data)
{
struct egpio_info *ei = irq_data_get_irq_chip_data(data);
ei->irqs_enabled |= 1 << (data->irq - ei->irq_start);
pr_debug("EGPIO unmask %d %04x\n", data->irq, ei->irqs_enabled);
}
static struct irq_chip egpio_muxed_chip = {
.name = "htc-egpio",
.irq_ack = egpio_ack,
.irq_mask = egpio_mask,
.irq_unmask = egpio_unmask,
};
static void egpio_handler(struct irq_desc *desc)
{
struct egpio_info *ei = irq_desc_get_handler_data(desc);
int irqpin;
/* Read current pins. */
unsigned long readval = egpio_readw(ei, ei->ack_register);
pr_debug("IRQ reg: %x\n", (unsigned int)readval);
/* Ack/unmask interrupts. */
ack_irqs(ei);
/* Process all set pins. */
readval &= ei->irqs_enabled;
for_each_set_bit(irqpin, &readval, ei->nirqs) {
/* Run irq handler */
pr_debug("got IRQ %d\n", irqpin);
generic_handle_irq(ei->irq_start + irqpin);
}
}
int htc_egpio_get_wakeup_irq(struct device *dev)
{
struct egpio_info *ei = dev_get_drvdata(dev);
/* Read current pins. */
u16 readval = egpio_readw(ei, ei->ack_register);
/* Ack/unmask interrupts. */
ack_irqs(ei);
/* Return first set pin. */
readval &= ei->irqs_enabled;
return ei->irq_start + ffs(readval) - 1;
}
EXPORT_SYMBOL(htc_egpio_get_wakeup_irq);
static inline int egpio_pos(struct egpio_info *ei, int bit)
{
return bit >> ei->reg_shift;
}
static inline int egpio_bit(struct egpio_info *ei, int bit)
{
return 1 << (bit & ((1 << ei->reg_shift)-1));
}
/*
* Input pins
*/
static int egpio_get(struct gpio_chip *chip, unsigned offset)
{
struct egpio_chip *egpio;
struct egpio_info *ei;
unsigned bit;
int reg;
int value;
pr_debug("egpio_get_value(%d)\n", chip->base + offset);
egpio = gpiochip_get_data(chip);
ei = dev_get_drvdata(egpio->dev);
bit = egpio_bit(ei, offset);
reg = egpio->reg_start + egpio_pos(ei, offset);
if (test_bit(offset, &egpio->is_out)) {
return !!(egpio->cached_values & (1 << offset));
} else {
value = egpio_readw(ei, reg);
pr_debug("readw(%p + %x) = %x\n",
ei->base_addr, reg << ei->bus_shift, value);
return !!(value & bit);
}
}
static int egpio_direction_input(struct gpio_chip *chip, unsigned offset)
{
struct egpio_chip *egpio;
egpio = gpiochip_get_data(chip);
return test_bit(offset, &egpio->is_out) ? -EINVAL : 0;
}
/*
* Output pins
*/
static void egpio_set(struct gpio_chip *chip, unsigned offset, int value)
{
unsigned long flag;
struct egpio_chip *egpio;
struct egpio_info *ei;
unsigned bit;
int pos;
int reg;
int shift;
pr_debug("egpio_set(%s, %d(%d), %d)\n",
chip->label, offset, offset+chip->base, value);
egpio = gpiochip_get_data(chip);
ei = dev_get_drvdata(egpio->dev);
bit = egpio_bit(ei, offset);
pos = egpio_pos(ei, offset);
reg = egpio->reg_start + pos;
shift = pos << ei->reg_shift;
pr_debug("egpio %s: reg %d = 0x%04x\n", value ? "set" : "clear",
reg, (egpio->cached_values >> shift) & ei->reg_mask);
spin_lock_irqsave(&ei->lock, flag);
if (value)
egpio->cached_values |= (1 << offset);
else
egpio->cached_values &= ~(1 << offset);
egpio_writew((egpio->cached_values >> shift) & ei->reg_mask, ei, reg);
spin_unlock_irqrestore(&ei->lock, flag);
}
static int egpio_direction_output(struct gpio_chip *chip,
unsigned offset, int value)
{
struct egpio_chip *egpio;
egpio = gpiochip_get_data(chip);
if (test_bit(offset, &egpio->is_out)) {
egpio_set(chip, offset, value);
return 0;
} else {
return -EINVAL;
}
}
static int egpio_get_direction(struct gpio_chip *chip, unsigned offset)
{
struct egpio_chip *egpio;
egpio = gpiochip_get_data(chip);
return !test_bit(offset, &egpio->is_out);
}
static void egpio_write_cache(struct egpio_info *ei)
{
int i;
struct egpio_chip *egpio;
int shift;
for (i = 0; i < ei->nchips; i++) {
egpio = &(ei->chip[i]);
if (!egpio->is_out)
continue;
for (shift = 0; shift < egpio->chip.ngpio;
shift += (1<<ei->reg_shift)) {
int reg = egpio->reg_start + egpio_pos(ei, shift);
if (!((egpio->is_out >> shift) & ei->reg_mask))
continue;
pr_debug("EGPIO: setting %x to %x, was %x\n", reg,
(egpio->cached_values >> shift) & ei->reg_mask,
egpio_readw(ei, reg));
egpio_writew((egpio->cached_values >> shift)
& ei->reg_mask, ei, reg);
}
}
}
/*
* Setup
*/
static int __init egpio_probe(struct platform_device *pdev)
{
struct htc_egpio_platform_data *pdata = dev_get_platdata(&pdev->dev);
struct resource *res;
struct egpio_info *ei;
struct gpio_chip *chip;
unsigned int irq, irq_end;
int i;
int ret;
/* Initialize ei data structure. */
ei = devm_kzalloc(&pdev->dev, sizeof(*ei), GFP_KERNEL);
if (!ei)
return -ENOMEM;
spin_lock_init(&ei->lock);
/* Find chained irq */
ret = -EINVAL;
res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
if (res)
ei->chained_irq = res->start;
/* Map egpio chip into virtual address space. */
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res)
goto fail;
ei->base_addr = devm_ioremap_nocache(&pdev->dev, res->start,
resource_size(res));
if (!ei->base_addr)
goto fail;
pr_debug("EGPIO phys=%08x virt=%p\n", (u32)res->start, ei->base_addr);
if ((pdata->bus_width != 16) && (pdata->bus_width != 32))
goto fail;
ei->bus_shift = fls(pdata->bus_width - 1) - 3;
pr_debug("bus_shift = %d\n", ei->bus_shift);
if ((pdata->reg_width != 8) && (pdata->reg_width != 16))
goto fail;
ei->reg_shift = fls(pdata->reg_width - 1);
pr_debug("reg_shift = %d\n", ei->reg_shift);
ei->reg_mask = (1 << pdata->reg_width) - 1;
platform_set_drvdata(pdev, ei);
ei->nchips = pdata->num_chips;
ei->chip = devm_kzalloc(&pdev->dev,
sizeof(struct egpio_chip) * ei->nchips,
GFP_KERNEL);
if (!ei->chip) {
ret = -ENOMEM;
goto fail;
}
for (i = 0; i < ei->nchips; i++) {
ei->chip[i].reg_start = pdata->chip[i].reg_start;
ei->chip[i].cached_values = pdata->chip[i].initial_values;
ei->chip[i].is_out = pdata->chip[i].direction;
ei->chip[i].dev = &(pdev->dev);
chip = &(ei->chip[i].chip);
chip->label = "htc-egpio";
gpio: change member .dev to .parent The name .dev in a struct is normally reserved for a struct device that is let us say a superclass to the thing described by the struct. struct gpio_chip stands out by confusingly using a struct device *dev to point to the parent device (such as a platform_device) that represents the hardware. As we want to give gpio_chip:s real devices, this is not working. We need to rename this member to parent. This was done by two coccinelle scripts, I guess it is possible to combine them into one, but I don't know such stuff. They look like this: @@ struct gpio_chip *var; @@ -var->dev +var->parent and: @@ struct gpio_chip var; @@ -var.dev +var.parent and: @@ struct bgpio_chip *var; @@ -var->gc.dev +var->gc.parent Plus a few instances of bgpio that I couldn't figure out how to teach Coccinelle to rewrite. This patch hits all over the place, but I *strongly* prefer this solution to any piecemal approaches that just exercise patch mechanics all over the place. It mainly hits drivers/gpio and drivers/pinctrl which is my own backyard anyway. Cc: Haavard Skinnemoen <hskinnemoen@gmail.com> Cc: Rafał Miłecki <zajec5@gmail.com> Cc: Richard Purdie <rpurdie@rpsys.net> Cc: Mauro Carvalho Chehab <mchehab@osg.samsung.com> Cc: Alek Du <alek.du@intel.com> Cc: Jaroslav Kysela <perex@perex.cz> Cc: Takashi Iwai <tiwai@suse.com> Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Jiri Kosina <jkosina@suse.cz> Acked-by: Hans-Christian Egtvedt <egtvedt@samfundet.no> Acked-by: Jacek Anaszewski <j.anaszewski@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-11-04 16:56:26 +08:00
chip->parent = &pdev->dev;
gpio: sysfs interface This adds a simple sysfs interface for GPIOs. /sys/class/gpio /export ... asks the kernel to export a GPIO to userspace /unexport ... to return a GPIO to the kernel /gpioN ... for each exported GPIO #N /value ... always readable, writes fail for input GPIOs /direction ... r/w as: in, out (default low); write high, low /gpiochipN ... for each gpiochip; #N is its first GPIO /base ... (r/o) same as N /label ... (r/o) descriptive, not necessarily unique /ngpio ... (r/o) number of GPIOs; numbered N .. N+(ngpio - 1) GPIOs claimed by kernel code may be exported by its owner using a new gpio_export() call, which should be most useful for driver debugging. Such exports may optionally be done without a "direction" attribute. Userspace may ask to take over a GPIO by writing to a sysfs control file, helping to cope with incomplete board support or other "one-off" requirements that don't merit full kernel support: echo 23 > /sys/class/gpio/export ... will gpio_request(23, "sysfs") and gpio_export(23); use /sys/class/gpio/gpio-23/direction to (re)configure it, when that GPIO can be used as both input and output. echo 23 > /sys/class/gpio/unexport ... will gpio_free(23), when it was exported as above The extra D-space footprint is a few hundred bytes, except for the sysfs resources associated with each exported GPIO. The additional I-space footprint is about two thirds of the current size of gpiolib (!). Since no /dev node creation is involved, no "udev" support is needed. Related changes: * This adds a device pointer to "struct gpio_chip". When GPIO providers initialize that, sysfs gpio class devices become children of that device instead of being "virtual" devices. * The (few) gpio_chip providers which have such a device node have been updated. * Some gpio_chip drivers also needed to update their module "owner" field ... for which missing kerneldoc was added. * Some gpio_chips don't support input GPIOs. Those GPIOs are now flagged appropriately when the chip is registered. Based on previous patches, and discussion both on and off LKML. A Documentation/ABI/testing/sysfs-gpio update is ready to submit once this merges to mainline. [akpm@linux-foundation.org: a few maintenance build fixes] Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Cc: Guennadi Liakhovetski <g.liakhovetski@pengutronix.de> Cc: Greg KH <greg@kroah.com> Cc: Kay Sievers <kay.sievers@vrfy.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-07-25 16:46:07 +08:00
chip->owner = THIS_MODULE;
chip->get = egpio_get;
chip->set = egpio_set;
chip->direction_input = egpio_direction_input;
chip->direction_output = egpio_direction_output;
chip->get_direction = egpio_get_direction;
chip->base = pdata->chip[i].gpio_base;
chip->ngpio = pdata->chip[i].num_gpios;
gpiochip_add_data(chip, &ei->chip[i]);
}
/* Set initial pin values */
egpio_write_cache(ei);
ei->irq_start = pdata->irq_base;
ei->nirqs = pdata->num_irqs;
ei->ack_register = pdata->ack_register;
if (ei->chained_irq) {
/* Setup irq handlers */
ei->ack_write = 0xFFFF;
if (pdata->invert_acks)
ei->ack_write = 0;
irq_end = ei->irq_start + ei->nirqs;
for (irq = ei->irq_start; irq < irq_end; irq++) {
irq_set_chip_and_handler(irq, &egpio_muxed_chip,
handle_simple_irq);
irq_set_chip_data(irq, ei);
irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE);
}
irq_set_irq_type(ei->chained_irq, IRQ_TYPE_EDGE_RISING);
irq_set_chained_handler_and_data(ei->chained_irq,
egpio_handler, ei);
ack_irqs(ei);
device_init_wakeup(&pdev->dev, 1);
}
return 0;
fail:
printk(KERN_ERR "EGPIO failed to setup\n");
return ret;
}
#ifdef CONFIG_PM
static int egpio_suspend(struct platform_device *pdev, pm_message_t state)
{
struct egpio_info *ei = platform_get_drvdata(pdev);
if (ei->chained_irq && device_may_wakeup(&pdev->dev))
enable_irq_wake(ei->chained_irq);
return 0;
}
static int egpio_resume(struct platform_device *pdev)
{
struct egpio_info *ei = platform_get_drvdata(pdev);
if (ei->chained_irq && device_may_wakeup(&pdev->dev))
disable_irq_wake(ei->chained_irq);
/* Update registers from the cache, in case
the CPLD was powered off during suspend */
egpio_write_cache(ei);
return 0;
}
#else
#define egpio_suspend NULL
#define egpio_resume NULL
#endif
static struct platform_driver egpio_driver = {
.driver = {
.name = "htc-egpio",
.suppress_bind_attrs = true,
},
.suspend = egpio_suspend,
.resume = egpio_resume,
};
static int __init egpio_init(void)
{
return platform_driver_probe(&egpio_driver, egpio_probe);
}
/* start early for dependencies */
subsys_initcall(egpio_init);