drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
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/*
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2014-12-08 23:48:57 +08:00
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* Copyright (c) 2014 The Linux Foundation. All rights reserved.
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
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* Copyright (C) 2013 Red Hat
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* Author: Rob Clark <robdclark@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "msm_drv.h"
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2013-12-01 03:58:23 +08:00
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#include "mdp_kms.h"
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
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2014-12-08 23:48:57 +08:00
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static struct csc_cfg csc_convert[CSC_MAX] = {
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[CSC_RGB2RGB] = {
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.type = CSC_RGB2RGB,
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.matrix = {
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0x0200, 0x0000, 0x0000,
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0x0000, 0x0200, 0x0000,
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0x0000, 0x0000, 0x0200
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},
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.pre_bias = { 0x0, 0x0, 0x0 },
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.post_bias = { 0x0, 0x0, 0x0 },
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.pre_clamp = { 0x0, 0xff, 0x0, 0xff, 0x0, 0xff },
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.post_clamp = { 0x0, 0xff, 0x0, 0xff, 0x0, 0xff },
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},
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[CSC_YUV2RGB] = {
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.type = CSC_YUV2RGB,
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.matrix = {
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0x0254, 0x0000, 0x0331,
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0x0254, 0xff37, 0xfe60,
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0x0254, 0x0409, 0x0000
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},
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.pre_bias = { 0xfff0, 0xff80, 0xff80 },
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.post_bias = { 0x00, 0x00, 0x00 },
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.pre_clamp = { 0x00, 0xff, 0x00, 0xff, 0x00, 0xff },
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.post_clamp = { 0x00, 0xff, 0x00, 0xff, 0x00, 0xff },
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},
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[CSC_RGB2YUV] = {
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.type = CSC_RGB2YUV,
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.matrix = {
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0x0083, 0x0102, 0x0032,
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0x1fb5, 0x1f6c, 0x00e1,
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0x00e1, 0x1f45, 0x1fdc
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},
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.pre_bias = { 0x00, 0x00, 0x00 },
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.post_bias = { 0x10, 0x80, 0x80 },
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.pre_clamp = { 0x00, 0xff, 0x00, 0xff, 0x00, 0xff },
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.post_clamp = { 0x10, 0xeb, 0x10, 0xf0, 0x10, 0xf0 },
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},
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[CSC_YUV2YUV] = {
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.type = CSC_YUV2YUV,
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.matrix = {
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0x0200, 0x0000, 0x0000,
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0x0000, 0x0200, 0x0000,
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0x0000, 0x0000, 0x0200
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},
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.pre_bias = { 0x00, 0x00, 0x00 },
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.post_bias = { 0x00, 0x00, 0x00 },
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.pre_clamp = { 0x00, 0xff, 0x00, 0xff, 0x00, 0xff },
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.post_clamp = { 0x00, 0xff, 0x00, 0xff, 0x00, 0xff },
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},
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};
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2015-07-07 04:35:29 +08:00
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#define FMT(name, a, r, g, b, e0, e1, e2, e3, alpha, tight, c, cnt, fp, cs, yuv) { \
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
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.base = { .pixel_format = DRM_FORMAT_ ## name }, \
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.bpc_a = BPC ## a ## A, \
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.bpc_r = BPC ## r, \
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.bpc_g = BPC ## g, \
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.bpc_b = BPC ## b, \
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.unpack = { e0, e1, e2, e3 }, \
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.alpha_enable = alpha, \
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.unpack_tight = tight, \
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.cpp = c, \
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.unpack_count = cnt, \
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2014-12-08 23:48:57 +08:00
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.fetch_type = fp, \
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2015-07-07 04:35:29 +08:00
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.chroma_sample = cs, \
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.is_yuv = yuv, \
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2014-12-08 23:48:57 +08:00
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}
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
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#define BPC0A 0
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2014-12-08 23:48:57 +08:00
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/*
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* Note: Keep RGB formats 1st, followed by YUV formats to avoid breaking
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* mdp_get_rgb_formats()'s implementation.
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*/
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2013-12-01 03:58:23 +08:00
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static const struct mdp_format formats[] = {
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2014-12-08 23:48:57 +08:00
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/* name a r g b e0 e1 e2 e3 alpha tight cpp cnt ... */
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FMT(ARGB8888, 8, 8, 8, 8, 1, 0, 2, 3, true, true, 4, 4,
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2015-07-07 04:35:29 +08:00
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MDP_PLANE_INTERLEAVED, CHROMA_FULL, false),
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2015-06-04 05:27:21 +08:00
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FMT(ABGR8888, 8, 8, 8, 8, 2, 0, 1, 3, true, true, 4, 4,
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2015-07-07 04:35:29 +08:00
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MDP_PLANE_INTERLEAVED, CHROMA_FULL, false),
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2015-06-04 05:27:21 +08:00
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FMT(RGBA8888, 8, 8, 8, 8, 3, 1, 0, 2, true, true, 4, 4,
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2015-07-07 04:35:29 +08:00
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MDP_PLANE_INTERLEAVED, CHROMA_FULL, false),
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2015-06-04 05:27:21 +08:00
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FMT(BGRA8888, 8, 8, 8, 8, 3, 2, 0, 1, true, true, 4, 4,
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2015-07-07 04:35:29 +08:00
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MDP_PLANE_INTERLEAVED, CHROMA_FULL, false),
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2014-12-08 23:48:57 +08:00
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FMT(XRGB8888, 8, 8, 8, 8, 1, 0, 2, 3, false, true, 4, 4,
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2015-07-07 04:35:29 +08:00
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MDP_PLANE_INTERLEAVED, CHROMA_FULL, false),
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2014-12-08 23:48:57 +08:00
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FMT(RGB888, 0, 8, 8, 8, 1, 0, 2, 0, false, true, 3, 3,
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2015-07-07 04:35:29 +08:00
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MDP_PLANE_INTERLEAVED, CHROMA_FULL, false),
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2014-12-08 23:48:57 +08:00
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FMT(BGR888, 0, 8, 8, 8, 2, 0, 1, 0, false, true, 3, 3,
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2015-07-07 04:35:29 +08:00
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MDP_PLANE_INTERLEAVED, CHROMA_FULL, false),
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2014-12-08 23:48:57 +08:00
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FMT(RGB565, 0, 5, 6, 5, 1, 0, 2, 0, false, true, 2, 3,
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2015-07-07 04:35:29 +08:00
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MDP_PLANE_INTERLEAVED, CHROMA_FULL, false),
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2014-12-08 23:48:57 +08:00
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FMT(BGR565, 0, 5, 6, 5, 2, 0, 1, 0, false, true, 2, 3,
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2015-07-07 04:35:29 +08:00
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MDP_PLANE_INTERLEAVED, CHROMA_FULL, false),
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2014-12-08 23:48:57 +08:00
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/* --- RGB formats above / YUV formats below this line --- */
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2015-07-07 04:35:31 +08:00
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/* 2 plane YUV */
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2014-12-08 23:48:57 +08:00
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FMT(NV12, 0, 8, 8, 8, 1, 2, 0, 0, false, true, 2, 2,
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2015-07-07 04:35:29 +08:00
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MDP_PLANE_PSEUDO_PLANAR, CHROMA_420, true),
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2014-12-08 23:48:57 +08:00
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FMT(NV21, 0, 8, 8, 8, 2, 1, 0, 0, false, true, 2, 2,
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2015-07-07 04:35:29 +08:00
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MDP_PLANE_PSEUDO_PLANAR, CHROMA_420, true),
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2015-07-07 04:35:31 +08:00
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FMT(NV16, 0, 8, 8, 8, 1, 2, 0, 0, false, true, 2, 2,
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MDP_PLANE_PSEUDO_PLANAR, CHROMA_H2V1, true),
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FMT(NV61, 0, 8, 8, 8, 2, 1, 0, 0, false, true, 2, 2,
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MDP_PLANE_PSEUDO_PLANAR, CHROMA_H2V1, true),
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/* 1 plane YUV */
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FMT(VYUY, 0, 8, 8, 8, 2, 0, 1, 0, false, true, 2, 4,
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MDP_PLANE_INTERLEAVED, CHROMA_H2V1, true),
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FMT(UYVY, 0, 8, 8, 8, 1, 0, 2, 0, false, true, 2, 4,
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MDP_PLANE_INTERLEAVED, CHROMA_H2V1, true),
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FMT(YUYV, 0, 8, 8, 8, 0, 1, 0, 2, false, true, 2, 4,
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MDP_PLANE_INTERLEAVED, CHROMA_H2V1, true),
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FMT(YVYU, 0, 8, 8, 8, 0, 2, 0, 1, false, true, 2, 4,
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MDP_PLANE_INTERLEAVED, CHROMA_H2V1, true),
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/* 3 plane YUV */
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FMT(YUV420, 0, 8, 8, 8, 2, 1, 0, 0, false, true, 1, 1,
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MDP_PLANE_PLANAR, CHROMA_420, true),
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FMT(YVU420, 0, 8, 8, 8, 1, 2, 0, 0, false, true, 1, 1,
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MDP_PLANE_PLANAR, CHROMA_420, true),
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
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};
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2014-12-08 23:48:57 +08:00
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/*
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* Note:
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* @rgb_only must be set to true, when requesting
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* supported formats for RGB pipes.
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*/
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uint32_t mdp_get_formats(uint32_t *pixel_formats, uint32_t max_formats,
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bool rgb_only)
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2013-10-09 00:57:48 +08:00
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{
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uint32_t i;
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for (i = 0; i < ARRAY_SIZE(formats); i++) {
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2013-12-01 03:58:23 +08:00
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const struct mdp_format *f = &formats[i];
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2013-10-09 00:57:48 +08:00
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if (i == max_formats)
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break;
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2014-12-08 23:48:57 +08:00
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if (rgb_only && MDP_FORMAT_IS_YUV(f))
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break;
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2013-10-09 00:57:48 +08:00
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pixel_formats[i] = f->base.pixel_format;
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}
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return i;
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}
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2013-12-01 03:58:23 +08:00
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const struct msm_format *mdp_get_format(struct msm_kms *kms, uint32_t format)
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
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|
|
{
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int i;
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for (i = 0; i < ARRAY_SIZE(formats); i++) {
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2013-12-01 03:58:23 +08:00
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const struct mdp_format *f = &formats[i];
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
if (f->base.pixel_format == format)
|
|
|
|
|
return &f->base;
|
|
|
|
|
}
|
|
|
|
|
return NULL;
|
|
|
|
|
}
|
2014-12-08 23:48:57 +08:00
|
|
|
|
|
|
|
|
struct csc_cfg *mdp_get_default_csc_cfg(enum csc_type type)
|
|
|
|
|
{
|
|
|
|
|
if (unlikely(WARN_ON(type >= CSC_MAX)))
|
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
|
|
return &csc_convert[type];
|
|
|
|
|
}
|