2018-01-10 02:29:55 +08:00
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// SPDX-License-Identifier: GPL-2.0
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//
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// Copyright (c) 2015 Samsung Electronics Co., Ltd.
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// http://www.samsung.com/
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//
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2020-01-04 23:20:56 +08:00
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// Exynos - SROM Controller support
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2018-01-10 02:29:55 +08:00
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// Author: Pankaj Dubey <pankaj.dubey@samsung.com>
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2016-04-11 15:42:24 +08:00
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#include <linux/io.h>
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2016-06-17 08:37:47 +08:00
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#include <linux/init.h>
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2016-04-11 15:42:24 +08:00
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#include <linux/of.h>
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#include <linux/of_address.h>
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2016-04-11 15:42:27 +08:00
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#include <linux/of_platform.h>
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2016-04-11 15:42:24 +08:00
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include "exynos-srom.h"
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static const unsigned long exynos_srom_offsets[] = {
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/* SROM side */
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EXYNOS_SROM_BW,
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EXYNOS_SROM_BC0,
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EXYNOS_SROM_BC1,
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EXYNOS_SROM_BC2,
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EXYNOS_SROM_BC3,
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};
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/**
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* struct exynos_srom_reg_dump: register dump of SROM Controller registers.
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* @offset: srom register offset from the controller base address.
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* @value: the value of register under the offset.
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*/
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struct exynos_srom_reg_dump {
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u32 offset;
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u32 value;
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};
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/**
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* struct exynos_srom: platform data for exynos srom controller driver.
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* @dev: platform device pointer
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* @reg_base: srom base address
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* @reg_offset: exynos_srom_reg_dump pointer to hold offset and its value.
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*/
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struct exynos_srom {
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struct device *dev;
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void __iomem *reg_base;
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struct exynos_srom_reg_dump *reg_offset;
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};
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2020-07-25 02:23:27 +08:00
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static struct exynos_srom_reg_dump *
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exynos_srom_alloc_reg_dump(const unsigned long *rdump,
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unsigned long nr_rdump)
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2016-04-11 15:42:24 +08:00
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{
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struct exynos_srom_reg_dump *rd;
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unsigned int i;
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rd = kcalloc(nr_rdump, sizeof(*rd), GFP_KERNEL);
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if (!rd)
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return NULL;
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for (i = 0; i < nr_rdump; ++i)
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rd[i].offset = rdump[i];
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return rd;
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}
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2016-04-11 15:42:27 +08:00
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static int exynos_srom_configure_bank(struct exynos_srom *srom,
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struct device_node *np)
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{
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u32 bank, width, pmc = 0;
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u32 timing[6];
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u32 cs, bw;
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if (of_property_read_u32(np, "reg", &bank))
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return -EINVAL;
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if (of_property_read_u32(np, "reg-io-width", &width))
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width = 1;
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if (of_property_read_bool(np, "samsung,srom-page-mode"))
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pmc = 1 << EXYNOS_SROM_BCX__PMC__SHIFT;
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if (of_property_read_u32_array(np, "samsung,srom-timing", timing,
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ARRAY_SIZE(timing)))
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return -EINVAL;
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bank *= 4; /* Convert bank into shift/offset */
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cs = 1 << EXYNOS_SROM_BW__BYTEENABLE__SHIFT;
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if (width == 2)
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cs |= 1 << EXYNOS_SROM_BW__DATAWIDTH__SHIFT;
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2016-06-18 01:08:10 +08:00
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bw = readl_relaxed(srom->reg_base + EXYNOS_SROM_BW);
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bw = (bw & ~(EXYNOS_SROM_BW__CS_MASK << bank)) | (cs << bank);
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writel_relaxed(bw, srom->reg_base + EXYNOS_SROM_BW);
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writel_relaxed(pmc | (timing[0] << EXYNOS_SROM_BCX__TACP__SHIFT) |
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(timing[1] << EXYNOS_SROM_BCX__TCAH__SHIFT) |
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(timing[2] << EXYNOS_SROM_BCX__TCOH__SHIFT) |
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(timing[3] << EXYNOS_SROM_BCX__TACC__SHIFT) |
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(timing[4] << EXYNOS_SROM_BCX__TCOS__SHIFT) |
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(timing[5] << EXYNOS_SROM_BCX__TACS__SHIFT),
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srom->reg_base + EXYNOS_SROM_BC0 + bank);
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2016-04-11 15:42:27 +08:00
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return 0;
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}
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2016-04-11 15:42:24 +08:00
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static int exynos_srom_probe(struct platform_device *pdev)
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{
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struct device_node *np, *child;
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struct exynos_srom *srom;
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struct device *dev = &pdev->dev;
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bool bad_bank_config = false;
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np = dev->of_node;
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if (!np) {
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dev_err(&pdev->dev, "could not find device info\n");
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return -EINVAL;
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}
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srom = devm_kzalloc(&pdev->dev,
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sizeof(struct exynos_srom), GFP_KERNEL);
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if (!srom)
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return -ENOMEM;
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srom->dev = dev;
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srom->reg_base = of_iomap(np, 0);
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if (!srom->reg_base) {
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dev_err(&pdev->dev, "iomap of exynos srom controller failed\n");
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return -ENOMEM;
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}
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platform_set_drvdata(pdev, srom);
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srom->reg_offset = exynos_srom_alloc_reg_dump(exynos_srom_offsets,
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ARRAY_SIZE(exynos_srom_offsets));
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if (!srom->reg_offset) {
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iounmap(srom->reg_base);
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return -ENOMEM;
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}
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2016-04-11 15:42:27 +08:00
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for_each_child_of_node(np, child) {
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if (exynos_srom_configure_bank(srom, child)) {
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dev_err(dev,
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2018-08-28 08:57:23 +08:00
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"Could not decode bank configuration for %pOFn\n",
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child);
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2016-04-11 15:42:27 +08:00
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bad_bank_config = true;
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}
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}
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/*
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* If any bank failed to configure, we still provide suspend/resume,
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* but do not probe child devices
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*/
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if (bad_bank_config)
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return 0;
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return of_platform_populate(np, NULL, NULL, dev);
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2016-04-11 15:42:24 +08:00
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}
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#ifdef CONFIG_PM_SLEEP
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static void exynos_srom_save(void __iomem *base,
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struct exynos_srom_reg_dump *rd,
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unsigned int num_regs)
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{
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for (; num_regs > 0; --num_regs, ++rd)
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rd->value = readl(base + rd->offset);
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}
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static void exynos_srom_restore(void __iomem *base,
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2020-07-25 02:23:27 +08:00
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const struct exynos_srom_reg_dump *rd,
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unsigned int num_regs)
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{
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for (; num_regs > 0; --num_regs, ++rd)
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writel(rd->value, base + rd->offset);
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}
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static int exynos_srom_suspend(struct device *dev)
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{
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struct exynos_srom *srom = dev_get_drvdata(dev);
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exynos_srom_save(srom->reg_base, srom->reg_offset,
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ARRAY_SIZE(exynos_srom_offsets));
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2016-04-11 15:42:24 +08:00
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return 0;
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}
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static int exynos_srom_resume(struct device *dev)
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{
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struct exynos_srom *srom = dev_get_drvdata(dev);
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exynos_srom_restore(srom->reg_base, srom->reg_offset,
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ARRAY_SIZE(exynos_srom_offsets));
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2016-04-11 15:42:24 +08:00
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return 0;
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}
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#endif
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static const struct of_device_id of_exynos_srom_ids[] = {
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{
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.compatible = "samsung,exynos4210-srom",
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},
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{},
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};
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static SIMPLE_DEV_PM_OPS(exynos_srom_pm_ops, exynos_srom_suspend, exynos_srom_resume);
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static struct platform_driver exynos_srom_driver = {
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.probe = exynos_srom_probe,
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.driver = {
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.name = "exynos-srom",
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.of_match_table = of_exynos_srom_ids,
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.pm = &exynos_srom_pm_ops,
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2016-06-17 08:37:47 +08:00
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.suppress_bind_attrs = true,
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2016-04-11 15:42:24 +08:00
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},
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};
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2016-06-17 08:37:47 +08:00
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builtin_platform_driver(exynos_srom_driver);
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