2019-01-07 19:07:41 +08:00
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// SPDX-License-Identifier: GPL-2.0
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2013-06-05 20:26:46 +08:00
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/*
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* PCI driver for the Synopsys DesignWare DMA Controller
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*
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* Copyright (C) 2013 Intel Corporation
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* Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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*/
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/device.h>
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#include "internal.h"
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static int dw_pci_probe(struct pci_dev *pdev, const struct pci_device_id *pid)
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{
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2019-08-20 21:15:39 +08:00
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const struct dw_dma_chip_pdata *drv_data = (void *)pid->driver_data;
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struct dw_dma_chip_pdata *data;
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2013-06-05 20:26:46 +08:00
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struct dw_dma_chip *chip;
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int ret;
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ret = pcim_enable_device(pdev);
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if (ret)
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return ret;
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ret = pcim_iomap_regions(pdev, 1 << 0, pci_name(pdev));
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if (ret) {
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dev_err(&pdev->dev, "I/O memory remapping failed\n");
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return ret;
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}
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pci_set_master(pdev);
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pci_try_set_mwi(pdev);
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2021-10-08 11:28:31 +08:00
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ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
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2013-06-05 20:26:46 +08:00
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if (ret)
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return ret;
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2019-06-14 19:06:04 +08:00
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data = devm_kmemdup(&pdev->dev, drv_data, sizeof(*drv_data), GFP_KERNEL);
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if (!data)
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return -ENOMEM;
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2013-06-05 20:26:46 +08:00
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chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
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if (!chip)
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return -ENOMEM;
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chip->dev = &pdev->dev;
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2017-01-17 19:57:26 +08:00
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chip->id = pdev->devfn;
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2013-06-05 20:26:46 +08:00
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chip->regs = pcim_iomap_table(pdev)[0];
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chip->irq = pdev->irq;
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2019-01-07 19:07:38 +08:00
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chip->pdata = data->pdata;
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2013-06-05 20:26:46 +08:00
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2019-06-14 19:06:04 +08:00
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data->chip = chip;
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2019-01-07 19:07:38 +08:00
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ret = data->probe(chip);
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2013-06-05 20:26:46 +08:00
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if (ret)
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return ret;
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2020-05-27 02:24:15 +08:00
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dw_dma_acpi_controller_register(chip->dw);
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2019-06-14 19:06:04 +08:00
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pci_set_drvdata(pdev, data);
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2013-06-05 20:26:46 +08:00
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return 0;
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}
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static void dw_pci_remove(struct pci_dev *pdev)
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{
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2019-08-20 21:15:39 +08:00
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struct dw_dma_chip_pdata *data = pci_get_drvdata(pdev);
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2019-06-14 19:06:04 +08:00
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struct dw_dma_chip *chip = data->chip;
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2013-06-05 20:26:46 +08:00
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int ret;
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2020-05-27 02:24:15 +08:00
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dw_dma_acpi_controller_free(chip->dw);
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2019-06-14 19:06:04 +08:00
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ret = data->remove(chip);
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2013-06-05 20:26:46 +08:00
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if (ret)
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dev_warn(&pdev->dev, "can't remove device properly: %d\n", ret);
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}
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2014-03-15 02:02:39 +08:00
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#ifdef CONFIG_PM_SLEEP
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static int dw_pci_suspend_late(struct device *dev)
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{
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2019-08-20 21:15:39 +08:00
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struct dw_dma_chip_pdata *data = dev_get_drvdata(dev);
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2019-06-14 19:06:04 +08:00
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struct dw_dma_chip *chip = data->chip;
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2014-03-15 02:02:39 +08:00
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2019-01-07 19:07:38 +08:00
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return do_dw_dma_disable(chip);
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2014-03-15 02:02:39 +08:00
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};
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static int dw_pci_resume_early(struct device *dev)
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{
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2019-08-20 21:15:39 +08:00
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struct dw_dma_chip_pdata *data = dev_get_drvdata(dev);
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2019-06-14 19:06:04 +08:00
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struct dw_dma_chip *chip = data->chip;
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2014-03-15 02:02:39 +08:00
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2019-01-07 19:07:38 +08:00
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return do_dw_dma_enable(chip);
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2014-03-15 02:02:39 +08:00
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};
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2014-04-15 21:18:42 +08:00
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#endif /* CONFIG_PM_SLEEP */
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2014-03-15 02:02:39 +08:00
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static const struct dev_pm_ops dw_pci_dev_pm_ops = {
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2014-04-15 21:18:42 +08:00
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SET_LATE_SYSTEM_SLEEP_PM_OPS(dw_pci_suspend_late, dw_pci_resume_early)
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2014-03-15 02:02:39 +08:00
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};
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2014-05-09 13:59:36 +08:00
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static const struct pci_device_id dw_pci_id_table[] = {
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2017-01-02 23:26:21 +08:00
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/* Medfield (GPDMA) */
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2019-08-20 21:15:39 +08:00
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{ PCI_VDEVICE(INTEL, 0x0827), (kernel_ulong_t)&dw_dma_chip_pdata },
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2013-06-05 20:26:46 +08:00
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/* BayTrail */
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2019-08-20 21:15:39 +08:00
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{ PCI_VDEVICE(INTEL, 0x0f06), (kernel_ulong_t)&dw_dma_chip_pdata },
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{ PCI_VDEVICE(INTEL, 0x0f40), (kernel_ulong_t)&dw_dma_chip_pdata },
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2014-02-06 19:26:55 +08:00
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2019-01-07 19:07:38 +08:00
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/* Merrifield */
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2019-08-20 21:15:39 +08:00
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{ PCI_VDEVICE(INTEL, 0x11a2), (kernel_ulong_t)&idma32_chip_pdata },
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2017-01-17 19:57:32 +08:00
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2014-08-20 01:29:18 +08:00
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/* Braswell */
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2019-08-20 21:15:39 +08:00
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{ PCI_VDEVICE(INTEL, 0x2286), (kernel_ulong_t)&dw_dma_chip_pdata },
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{ PCI_VDEVICE(INTEL, 0x22c0), (kernel_ulong_t)&dw_dma_chip_pdata },
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2014-08-20 01:29:18 +08:00
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2019-08-13 16:06:02 +08:00
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/* Elkhart Lake iDMA 32-bit (PSE DMA) */
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2021-07-12 19:39:40 +08:00
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{ PCI_VDEVICE(INTEL, 0x4bb4), (kernel_ulong_t)&xbar_chip_pdata },
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{ PCI_VDEVICE(INTEL, 0x4bb5), (kernel_ulong_t)&xbar_chip_pdata },
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{ PCI_VDEVICE(INTEL, 0x4bb6), (kernel_ulong_t)&xbar_chip_pdata },
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2019-06-21 21:19:14 +08:00
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2014-02-06 19:26:55 +08:00
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/* Haswell */
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2019-08-20 21:15:39 +08:00
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{ PCI_VDEVICE(INTEL, 0x9c60), (kernel_ulong_t)&dw_dma_chip_pdata },
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2016-01-29 22:27:07 +08:00
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/* Broadwell */
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2019-08-20 21:15:39 +08:00
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{ PCI_VDEVICE(INTEL, 0x9ce0), (kernel_ulong_t)&dw_dma_chip_pdata },
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2016-01-29 22:27:07 +08:00
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2013-06-05 20:26:46 +08:00
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{ }
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};
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MODULE_DEVICE_TABLE(pci, dw_pci_id_table);
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static struct pci_driver dw_pci_driver = {
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.name = "dw_dmac_pci",
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.id_table = dw_pci_id_table,
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.probe = dw_pci_probe,
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.remove = dw_pci_remove,
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2014-03-15 02:02:39 +08:00
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.driver = {
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.pm = &dw_pci_dev_pm_ops,
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},
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2013-06-05 20:26:46 +08:00
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};
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module_pci_driver(dw_pci_driver);
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MODULE_LICENSE("GPL v2");
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MODULE_DESCRIPTION("Synopsys DesignWare DMA Controller PCI driver");
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MODULE_AUTHOR("Andy Shevchenko <andriy.shevchenko@linux.intel.com>");
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