2019-05-27 14:55:01 +08:00
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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2017-12-02 00:47:08 +08:00
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/*
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* drmem.h: Power specific logical memory block representation
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*
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* Copyright 2017 IBM Corporation
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*/
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#ifndef _ASM_POWERPC_LMB_H
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#define _ASM_POWERPC_LMB_H
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struct drmem_lmb {
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u64 base_addr;
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u32 drc_index;
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u32 aa_index;
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u32 flags;
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2018-10-02 23:35:59 +08:00
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#ifdef CONFIG_MEMORY_HOTPLUG
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int nid;
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#endif
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2017-12-02 00:47:08 +08:00
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};
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struct drmem_lmb_info {
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struct drmem_lmb *lmbs;
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int n_lmbs;
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u32 lmb_size;
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};
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extern struct drmem_lmb_info *drmem_info;
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#define for_each_drmem_lmb_in_range(lmb, start, end) \
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for ((lmb) = (start); (lmb) <= (end); (lmb)++)
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#define for_each_drmem_lmb(lmb) \
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for_each_drmem_lmb_in_range((lmb), \
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&drmem_info->lmbs[0], \
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&drmem_info->lmbs[drmem_info->n_lmbs - 1])
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2017-12-02 00:47:42 +08:00
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/*
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* The of_drconf_cell_v1 struct defines the layout of the LMB data
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* specified in the ibm,dynamic-memory device tree property.
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* The property itself is a 32-bit value specifying the number of
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* LMBs followed by an array of of_drconf_cell_v1 entries, one
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* per LMB.
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*/
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struct of_drconf_cell_v1 {
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__be64 base_addr;
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__be32 drc_index;
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__be32 reserved;
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__be32 aa_index;
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__be32 flags;
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};
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2017-12-02 00:47:53 +08:00
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/*
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* Version 2 of the ibm,dynamic-memory property is defined as a
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* 32-bit value specifying the number of LMB sets followed by an
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* array of of_drconf_cell_v2 entries, one per LMB set.
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*/
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struct of_drconf_cell_v2 {
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u32 seq_lmbs;
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u64 base_addr;
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u32 drc_index;
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u32 aa_index;
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u32 flags;
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} __packed;
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2017-12-02 00:47:42 +08:00
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#define DRCONF_MEM_ASSIGNED 0x00000008
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#define DRCONF_MEM_AI_INVALID 0x00000040
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#define DRCONF_MEM_RESERVED 0x00000080
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2017-12-02 00:47:08 +08:00
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static inline u32 drmem_lmb_size(void)
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{
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return drmem_info->lmb_size;
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}
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2017-12-02 00:47:31 +08:00
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#define DRMEM_LMB_RESERVED 0x80000000
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static inline void drmem_mark_lmb_reserved(struct drmem_lmb *lmb)
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{
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lmb->flags |= DRMEM_LMB_RESERVED;
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}
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static inline void drmem_remove_lmb_reservation(struct drmem_lmb *lmb)
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{
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lmb->flags &= ~DRMEM_LMB_RESERVED;
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}
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static inline bool drmem_lmb_reserved(struct drmem_lmb *lmb)
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{
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return lmb->flags & DRMEM_LMB_RESERVED;
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}
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2017-12-02 00:47:21 +08:00
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u64 drmem_lmb_memory_max(void);
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void __init walk_drmem_lmbs(struct device_node *dn,
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void (*func)(struct drmem_lmb *, const __be32 **));
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2017-12-02 00:47:31 +08:00
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int drmem_update_dt(void);
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2017-12-02 00:47:21 +08:00
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2017-12-02 00:47:08 +08:00
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#ifdef CONFIG_PPC_PSERIES
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void __init walk_drmem_lmbs_early(unsigned long node,
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void (*func)(struct drmem_lmb *, const __be32 **));
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#endif
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2018-04-21 04:29:48 +08:00
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static inline void invalidate_lmb_associativity_index(struct drmem_lmb *lmb)
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{
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lmb->aa_index = 0xffffffff;
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}
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2018-10-02 23:35:59 +08:00
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#ifdef CONFIG_MEMORY_HOTPLUG
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static inline void lmb_set_nid(struct drmem_lmb *lmb)
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{
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lmb->nid = memory_add_physaddr_to_nid(lmb->base_addr);
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}
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static inline void lmb_clear_nid(struct drmem_lmb *lmb)
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{
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lmb->nid = -1;
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}
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#else
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static inline void lmb_set_nid(struct drmem_lmb *lmb)
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{
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}
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static inline void lmb_clear_nid(struct drmem_lmb *lmb)
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{
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}
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#endif
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2017-12-02 00:47:08 +08:00
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#endif /* _ASM_POWERPC_LMB_H */
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