2005-04-17 06:20:36 +08:00
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2000 Ani Joshi <ajoshi@unixbox.com>
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2006-11-16 10:56:12 +08:00
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* Copyright (C) 2000, 2001, 06 Ralf Baechle <ralf@linux-mips.org>
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2005-04-17 06:20:36 +08:00
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* swiped from i386, and cloned for MIPS by Geert, polished by Ralf.
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*/
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2006-11-16 10:56:12 +08:00
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2005-04-17 06:20:36 +08:00
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#include <linux/types.h>
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2006-11-16 10:56:12 +08:00
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#include <linux/dma-mapping.h>
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2005-04-17 06:20:36 +08:00
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#include <linux/mm.h>
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#include <linux/module.h>
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#include <linux/string.h>
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2007-10-23 18:32:34 +08:00
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#include <linux/scatterlist.h>
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2005-04-17 06:20:36 +08:00
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#include <asm/cache.h>
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#include <asm/io.h>
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2006-11-16 10:56:12 +08:00
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#include <dma-coherence.h>
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2007-03-20 00:36:42 +08:00
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static inline unsigned long dma_addr_to_virt(dma_addr_t dma_addr)
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{
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unsigned long addr = plat_dma_addr_to_phys(dma_addr);
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return (unsigned long)phys_to_virt(addr);
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}
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2005-04-17 06:20:36 +08:00
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/*
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* Warning on the terminology - Linux calls an uncached area coherent;
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* MIPS terminology calls memory areas with hardware maintained coherency
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* coherent.
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*/
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2006-11-16 10:56:12 +08:00
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static inline int cpu_is_noncoherent_r10000(struct device *dev)
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{
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return !plat_device_is_coherent(dev) &&
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2007-10-12 06:46:15 +08:00
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(current_cpu_type() == CPU_R10000 ||
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current_cpu_type() == CPU_R12000);
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2006-11-16 10:56:12 +08:00
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}
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2005-04-17 06:20:36 +08:00
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void *dma_alloc_noncoherent(struct device *dev, size_t size,
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2005-10-21 15:21:23 +08:00
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dma_addr_t * dma_handle, gfp_t gfp)
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2005-04-17 06:20:36 +08:00
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{
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void *ret;
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2006-11-16 10:56:12 +08:00
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2005-04-17 06:20:36 +08:00
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/* ignore region specifiers */
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gfp &= ~(__GFP_DMA | __GFP_HIGHMEM);
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if (dev == NULL || (dev->coherent_dma_mask < 0xffffffff))
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gfp |= GFP_DMA;
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ret = (void *) __get_free_pages(gfp, get_order(size));
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if (ret != NULL) {
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memset(ret, 0, size);
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2006-11-16 10:56:12 +08:00
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*dma_handle = plat_map_dma_mem(dev, ret, size);
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2005-04-17 06:20:36 +08:00
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}
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return ret;
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}
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EXPORT_SYMBOL(dma_alloc_noncoherent);
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void *dma_alloc_coherent(struct device *dev, size_t size,
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2005-10-21 15:21:23 +08:00
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dma_addr_t * dma_handle, gfp_t gfp)
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2005-04-17 06:20:36 +08:00
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{
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void *ret;
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2006-11-16 10:56:12 +08:00
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/* ignore region specifiers */
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gfp &= ~(__GFP_DMA | __GFP_HIGHMEM);
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if (dev == NULL || (dev->coherent_dma_mask < 0xffffffff))
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gfp |= GFP_DMA;
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ret = (void *) __get_free_pages(gfp, get_order(size));
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2005-04-17 06:20:36 +08:00
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if (ret) {
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2006-11-16 10:56:12 +08:00
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memset(ret, 0, size);
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*dma_handle = plat_map_dma_mem(dev, ret, size);
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if (!plat_device_is_coherent(dev)) {
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dma_cache_wback_inv((unsigned long) ret, size);
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ret = UNCAC_ADDR(ret);
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}
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2005-04-17 06:20:36 +08:00
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}
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return ret;
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}
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EXPORT_SYMBOL(dma_alloc_coherent);
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void dma_free_noncoherent(struct device *dev, size_t size, void *vaddr,
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dma_addr_t dma_handle)
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{
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free_pages((unsigned long) vaddr, get_order(size));
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}
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EXPORT_SYMBOL(dma_free_noncoherent);
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void dma_free_coherent(struct device *dev, size_t size, void *vaddr,
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dma_addr_t dma_handle)
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{
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unsigned long addr = (unsigned long) vaddr;
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2006-11-16 10:56:12 +08:00
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if (!plat_device_is_coherent(dev))
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addr = CAC_ADDR(addr);
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2005-04-17 06:20:36 +08:00
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free_pages(addr, get_order(size));
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}
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EXPORT_SYMBOL(dma_free_coherent);
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static inline void __dma_sync(unsigned long addr, size_t size,
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enum dma_data_direction direction)
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{
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switch (direction) {
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case DMA_TO_DEVICE:
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dma_cache_wback(addr, size);
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break;
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case DMA_FROM_DEVICE:
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dma_cache_inv(addr, size);
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break;
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case DMA_BIDIRECTIONAL:
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dma_cache_wback_inv(addr, size);
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break;
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default:
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BUG();
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}
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}
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dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
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enum dma_data_direction direction)
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{
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unsigned long addr = (unsigned long) ptr;
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2006-11-16 10:56:12 +08:00
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if (!plat_device_is_coherent(dev))
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__dma_sync(addr, size, direction);
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2005-04-17 06:20:36 +08:00
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2006-11-16 10:56:12 +08:00
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return plat_map_dma_mem(dev, ptr, size);
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2005-04-17 06:20:36 +08:00
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}
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EXPORT_SYMBOL(dma_map_single);
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void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
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enum dma_data_direction direction)
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{
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2006-11-16 10:56:12 +08:00
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if (cpu_is_noncoherent_r10000(dev))
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2007-03-20 00:36:42 +08:00
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__dma_sync(dma_addr_to_virt(dma_addr), size,
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2006-11-16 10:56:12 +08:00
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direction);
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2005-04-17 06:20:36 +08:00
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2006-11-16 10:56:12 +08:00
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plat_unmap_dma_mem(dma_addr);
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2005-04-17 06:20:36 +08:00
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}
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EXPORT_SYMBOL(dma_unmap_single);
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int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
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enum dma_data_direction direction)
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{
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int i;
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BUG_ON(direction == DMA_NONE);
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for (i = 0; i < nents; i++, sg++) {
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unsigned long addr;
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2005-09-04 06:56:17 +08:00
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2007-10-23 02:02:46 +08:00
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addr = (unsigned long) sg_virt(sg);
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2006-11-16 10:56:12 +08:00
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if (!plat_device_is_coherent(dev) && addr)
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2007-10-23 02:02:46 +08:00
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__dma_sync(addr, sg->length, direction);
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2007-05-18 20:32:36 +08:00
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sg->dma_address = plat_map_dma_mem(dev,
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2007-10-23 02:02:46 +08:00
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(void *)addr, sg->length);
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2005-04-17 06:20:36 +08:00
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}
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return nents;
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}
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EXPORT_SYMBOL(dma_map_sg);
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dma_addr_t dma_map_page(struct device *dev, struct page *page,
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unsigned long offset, size_t size, enum dma_data_direction direction)
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{
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BUG_ON(direction == DMA_NONE);
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2006-11-16 10:56:12 +08:00
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if (!plat_device_is_coherent(dev)) {
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unsigned long addr;
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addr = (unsigned long) page_address(page) + offset;
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dma_cache_wback_inv(addr, size);
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}
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2005-04-17 06:20:36 +08:00
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2006-11-16 10:56:12 +08:00
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return plat_map_dma_mem_page(dev, page) + offset;
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2005-04-17 06:20:36 +08:00
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}
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EXPORT_SYMBOL(dma_map_page);
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void dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
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enum dma_data_direction direction)
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{
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BUG_ON(direction == DMA_NONE);
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2006-11-16 10:56:12 +08:00
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if (!plat_device_is_coherent(dev) && direction != DMA_TO_DEVICE) {
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2005-04-17 06:20:36 +08:00
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unsigned long addr;
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2006-11-16 10:56:12 +08:00
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addr = plat_dma_addr_to_phys(dma_address);
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2005-04-17 06:20:36 +08:00
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dma_cache_wback_inv(addr, size);
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}
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2006-11-16 10:56:12 +08:00
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plat_unmap_dma_mem(dma_address);
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2005-04-17 06:20:36 +08:00
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}
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EXPORT_SYMBOL(dma_unmap_page);
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void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
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enum dma_data_direction direction)
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{
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unsigned long addr;
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int i;
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BUG_ON(direction == DMA_NONE);
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for (i = 0; i < nhwentries; i++, sg++) {
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2006-11-16 10:56:12 +08:00
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if (!plat_device_is_coherent(dev) &&
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direction != DMA_TO_DEVICE) {
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2007-10-23 02:02:46 +08:00
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addr = (unsigned long) sg_virt(sg);
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2006-11-16 10:56:12 +08:00
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if (addr)
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2007-10-23 02:02:46 +08:00
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__dma_sync(addr, sg->length, direction);
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2006-11-16 10:56:12 +08:00
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}
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plat_unmap_dma_mem(sg->dma_address);
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2005-04-17 06:20:36 +08:00
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}
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}
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EXPORT_SYMBOL(dma_unmap_sg);
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void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
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size_t size, enum dma_data_direction direction)
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{
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BUG_ON(direction == DMA_NONE);
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2005-09-04 06:56:17 +08:00
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2006-11-16 10:56:12 +08:00
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if (cpu_is_noncoherent_r10000(dev)) {
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unsigned long addr;
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2007-03-20 00:36:42 +08:00
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addr = dma_addr_to_virt(dma_handle);
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2006-11-16 10:56:12 +08:00
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__dma_sync(addr, size, direction);
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}
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2005-04-17 06:20:36 +08:00
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}
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EXPORT_SYMBOL(dma_sync_single_for_cpu);
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void dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle,
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size_t size, enum dma_data_direction direction)
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{
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BUG_ON(direction == DMA_NONE);
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2007-02-24 02:58:48 +08:00
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if (!plat_device_is_coherent(dev)) {
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2006-11-16 10:56:12 +08:00
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unsigned long addr;
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2007-03-20 00:36:42 +08:00
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addr = dma_addr_to_virt(dma_handle);
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2006-11-16 10:56:12 +08:00
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__dma_sync(addr, size, direction);
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}
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2005-04-17 06:20:36 +08:00
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}
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EXPORT_SYMBOL(dma_sync_single_for_device);
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void dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
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unsigned long offset, size_t size, enum dma_data_direction direction)
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{
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BUG_ON(direction == DMA_NONE);
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2006-11-16 10:56:12 +08:00
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if (cpu_is_noncoherent_r10000(dev)) {
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unsigned long addr;
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2007-03-20 00:36:42 +08:00
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addr = dma_addr_to_virt(dma_handle);
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2006-11-16 10:56:12 +08:00
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__dma_sync(addr + offset, size, direction);
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}
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2005-04-17 06:20:36 +08:00
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}
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EXPORT_SYMBOL(dma_sync_single_range_for_cpu);
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void dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
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unsigned long offset, size_t size, enum dma_data_direction direction)
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{
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BUG_ON(direction == DMA_NONE);
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2007-02-24 02:58:48 +08:00
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if (!plat_device_is_coherent(dev)) {
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2006-11-16 10:56:12 +08:00
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unsigned long addr;
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2007-03-20 00:36:42 +08:00
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addr = dma_addr_to_virt(dma_handle);
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2006-11-16 10:56:12 +08:00
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__dma_sync(addr + offset, size, direction);
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}
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2005-04-17 06:20:36 +08:00
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}
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EXPORT_SYMBOL(dma_sync_single_range_for_device);
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void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
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enum dma_data_direction direction)
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{
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int i;
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2005-09-04 06:56:17 +08:00
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2005-04-17 06:20:36 +08:00
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BUG_ON(direction == DMA_NONE);
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2005-09-04 06:56:17 +08:00
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2005-04-17 06:20:36 +08:00
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/* Make sure that gcc doesn't leave the empty loop body. */
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2006-11-16 10:56:12 +08:00
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for (i = 0; i < nelems; i++, sg++) {
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2007-03-02 19:42:11 +08:00
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if (cpu_is_noncoherent_r10000(dev))
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2007-10-23 02:02:46 +08:00
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__dma_sync((unsigned long)page_address(sg_page(sg)),
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2006-11-16 10:56:12 +08:00
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sg->length, direction);
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plat_unmap_dma_mem(sg->dma_address);
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}
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2005-04-17 06:20:36 +08:00
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}
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EXPORT_SYMBOL(dma_sync_sg_for_cpu);
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void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems,
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enum dma_data_direction direction)
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{
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int i;
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BUG_ON(direction == DMA_NONE);
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|
/* Make sure that gcc doesn't leave the empty loop body. */
|
2006-11-16 10:56:12 +08:00
|
|
|
for (i = 0; i < nelems; i++, sg++) {
|
|
|
|
if (!plat_device_is_coherent(dev))
|
2007-10-23 02:02:46 +08:00
|
|
|
__dma_sync((unsigned long)page_address(sg_page(sg)),
|
2006-11-16 10:56:12 +08:00
|
|
|
sg->length, direction);
|
|
|
|
plat_unmap_dma_mem(sg->dma_address);
|
|
|
|
}
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
EXPORT_SYMBOL(dma_sync_sg_for_device);
|
|
|
|
|
|
|
|
int dma_mapping_error(dma_addr_t dma_addr)
|
|
|
|
{
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
EXPORT_SYMBOL(dma_mapping_error);
|
|
|
|
|
|
|
|
int dma_supported(struct device *dev, u64 mask)
|
|
|
|
{
|
|
|
|
/*
|
|
|
|
* we fall back to GFP_DMA when the mask isn't all 1s,
|
|
|
|
* so we can't guarantee allocations that must be
|
|
|
|
* within a tighter range than GFP_DMA..
|
|
|
|
*/
|
|
|
|
if (mask < 0x00ffffff)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
EXPORT_SYMBOL(dma_supported);
|
|
|
|
|
2006-12-07 12:38:54 +08:00
|
|
|
int dma_is_consistent(struct device *dev, dma_addr_t dma_addr)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
2006-11-16 10:56:12 +08:00
|
|
|
return plat_device_is_coherent(dev);
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
EXPORT_SYMBOL(dma_is_consistent);
|
|
|
|
|
2006-12-07 12:38:56 +08:00
|
|
|
void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
|
2006-11-16 10:56:12 +08:00
|
|
|
enum dma_data_direction direction)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
2006-11-16 10:56:12 +08:00
|
|
|
BUG_ON(direction == DMA_NONE);
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2006-11-16 10:56:12 +08:00
|
|
|
if (!plat_device_is_coherent(dev))
|
|
|
|
dma_cache_wback_inv((unsigned long)vaddr, size);
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
EXPORT_SYMBOL(dma_cache_sync);
|