2008-07-24 17:27:36 +08:00
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/*
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* MUSB OTG driver virtual root hub support
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*
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* Copyright 2005 Mentor Graphics Corporation
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* Copyright (C) 2005-2006 by Texas Instruments
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* Copyright (C) 2006-2007 Nokia Corporation
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
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* 02110-1301 USA
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*
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* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/errno.h>
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#include <linux/init.h>
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#include <linux/time.h>
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#include <linux/timer.h>
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#include <asm/unaligned.h>
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#include "musb_core.h"
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2013-04-11 03:55:44 +08:00
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/*
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* Program the HDRC to start (enable interrupts, dma, etc.).
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*/
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static void musb_start(struct musb *musb)
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{
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void __iomem *regs = musb->mregs;
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u8 devctl = musb_readb(regs, MUSB_DEVCTL);
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dev_dbg(musb->controller, "<== devctl %02x\n", devctl);
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/* Set INT enable registers, enable interrupts */
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musb->intrtxe = musb->epmask;
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musb_writew(regs, MUSB_INTRTXE, musb->intrtxe);
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musb->intrrxe = musb->epmask & 0xfffe;
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musb_writew(regs, MUSB_INTRRXE, musb->intrrxe);
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musb_writeb(regs, MUSB_INTRUSBE, 0xf7);
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musb_writeb(regs, MUSB_TESTMODE, 0);
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/* put into basic highspeed mode and start session */
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musb_writeb(regs, MUSB_POWER, MUSB_POWER_ISOUPDATE
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| MUSB_POWER_HSENAB
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/* ENSUSPEND wedges tusb */
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/* | MUSB_POWER_ENSUSPEND */
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);
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musb->is_active = 0;
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devctl = musb_readb(regs, MUSB_DEVCTL);
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devctl &= ~MUSB_DEVCTL_SESSION;
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/* session started after:
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* (a) ID-grounded irq, host mode;
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* (b) vbus present/connect IRQ, peripheral mode;
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* (c) peripheral initiates, using SRP
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*/
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2013-04-11 03:55:49 +08:00
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if (musb->port_mode != MUSB_PORT_MODE_HOST &&
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(devctl & MUSB_DEVCTL_VBUS) == MUSB_DEVCTL_VBUS) {
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2013-04-11 03:55:44 +08:00
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musb->is_active = 1;
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} else {
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devctl |= MUSB_DEVCTL_SESSION;
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}
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musb_platform_enable(musb);
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musb_writeb(regs, MUSB_DEVCTL, devctl);
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}
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2008-07-24 17:27:36 +08:00
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static void musb_port_suspend(struct musb *musb, bool do_suspend)
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{
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2012-02-13 19:24:15 +08:00
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struct usb_otg *otg = musb->xceiv->otg;
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2008-07-24 17:27:36 +08:00
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u8 power;
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void __iomem *mbase = musb->mregs;
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if (!is_host_active(musb))
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return;
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/* NOTE: this doesn't necessarily put PHY into low power mode,
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* turning off its clock; that's a function of PHY integration and
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* MUSB_POWER_ENSUSPEND. PHY may need a clock (sigh) to detect
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* SE0 changing to connect (J) or wakeup (K) states.
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*/
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power = musb_readb(mbase, MUSB_POWER);
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if (do_suspend) {
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int retries = 10000;
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power &= ~MUSB_POWER_RESUME;
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power |= MUSB_POWER_SUSPENDM;
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musb_writeb(mbase, MUSB_POWER, power);
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/* Needed for OPT A tests */
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power = musb_readb(mbase, MUSB_POWER);
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while (power & MUSB_POWER_SUSPENDM) {
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power = musb_readb(mbase, MUSB_POWER);
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if (retries-- < 1)
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break;
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}
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2011-05-11 17:44:08 +08:00
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dev_dbg(musb->controller, "Root port suspended, power %02x\n", power);
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2008-07-24 17:27:36 +08:00
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musb->port1_status |= USB_PORT_STAT_SUSPEND;
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2009-04-01 03:30:04 +08:00
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switch (musb->xceiv->state) {
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2008-07-24 17:27:36 +08:00
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case OTG_STATE_A_HOST:
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2009-04-01 03:30:04 +08:00
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musb->xceiv->state = OTG_STATE_A_SUSPEND;
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2011-11-24 21:46:26 +08:00
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musb->is_active = otg->host->b_hnp_enable;
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2009-04-01 03:35:09 +08:00
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if (musb->is_active)
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mod_timer(&musb->otg_timer, jiffies
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+ msecs_to_jiffies(
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OTG_TIME_A_AIDL_BDIS));
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2008-07-24 17:27:36 +08:00
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musb_platform_try_idle(musb, 0);
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break;
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case OTG_STATE_B_HOST:
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2009-04-01 03:30:04 +08:00
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musb->xceiv->state = OTG_STATE_B_WAIT_ACON;
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2011-11-24 21:46:26 +08:00
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musb->is_active = otg->host->b_hnp_enable;
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2008-07-24 17:27:36 +08:00
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musb_platform_try_idle(musb, 0);
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break;
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default:
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2011-05-11 17:44:08 +08:00
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dev_dbg(musb->controller, "bogus rh suspend? %s\n",
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2013-03-07 16:39:57 +08:00
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usb_otg_state_string(musb->xceiv->state));
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2008-07-24 17:27:36 +08:00
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}
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} else if (power & MUSB_POWER_SUSPENDM) {
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power &= ~MUSB_POWER_SUSPENDM;
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power |= MUSB_POWER_RESUME;
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musb_writeb(mbase, MUSB_POWER, power);
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2011-05-11 17:44:08 +08:00
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dev_dbg(musb->controller, "Root port resuming, power %02x\n", power);
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2008-07-24 17:27:36 +08:00
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/* later, GetPortStatus will stop RESUME signaling */
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musb->port1_status |= MUSB_PORT_STAT_RESUME;
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musb->rh_timer = jiffies + msecs_to_jiffies(20);
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}
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}
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static void musb_port_reset(struct musb *musb, bool do_reset)
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{
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u8 power;
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void __iomem *mbase = musb->mregs;
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2009-04-01 03:30:04 +08:00
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if (musb->xceiv->state == OTG_STATE_B_IDLE) {
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2011-05-11 17:44:08 +08:00
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dev_dbg(musb->controller, "HNP: Returning from HNP; no hub reset from b_idle\n");
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2008-07-24 17:27:36 +08:00
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musb->port1_status &= ~USB_PORT_STAT_RESET;
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return;
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}
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if (!is_host_active(musb))
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return;
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/* NOTE: caller guarantees it will turn off the reset when
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* the appropriate amount of time has passed
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*/
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power = musb_readb(mbase, MUSB_POWER);
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if (do_reset) {
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/*
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* If RESUME is set, we must make sure it stays minimum 20 ms.
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* Then we must clear RESUME and wait a bit to let musb start
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* generating SOFs. If we don't do this, OPT HS A 6.8 tests
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* fail with "Error! Did not receive an SOF before suspend
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* detected".
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*/
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if (power & MUSB_POWER_RESUME) {
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while (time_before(jiffies, musb->rh_timer))
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msleep(1);
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musb_writeb(mbase, MUSB_POWER,
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power & ~MUSB_POWER_RESUME);
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msleep(1);
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}
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power &= 0xf0;
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musb_writeb(mbase, MUSB_POWER,
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power | MUSB_POWER_RESET);
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musb->port1_status |= USB_PORT_STAT_RESET;
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musb->port1_status &= ~USB_PORT_STAT_ENABLE;
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musb->rh_timer = jiffies + msecs_to_jiffies(50);
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} else {
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2011-05-11 17:44:08 +08:00
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dev_dbg(musb->controller, "root port reset stopped\n");
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2008-07-24 17:27:36 +08:00
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musb_writeb(mbase, MUSB_POWER,
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power & ~MUSB_POWER_RESET);
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power = musb_readb(mbase, MUSB_POWER);
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if (power & MUSB_POWER_HSMODE) {
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2011-05-11 17:44:08 +08:00
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dev_dbg(musb->controller, "high-speed device connected\n");
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2008-07-24 17:27:36 +08:00
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musb->port1_status |= USB_PORT_STAT_HIGH_SPEED;
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}
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musb->port1_status &= ~USB_PORT_STAT_RESET;
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musb->port1_status |= USB_PORT_STAT_ENABLE
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| (USB_PORT_STAT_C_RESET << 16)
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| (USB_PORT_STAT_C_ENABLE << 16);
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2013-04-11 03:55:50 +08:00
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usb_hcd_poll_rh_status(musb->hcd);
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2008-07-24 17:27:36 +08:00
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musb->vbuserr_retry = VBUSERR_RETRY_COUNT;
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}
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}
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void musb_root_disconnect(struct musb *musb)
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{
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2012-02-13 19:24:15 +08:00
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struct usb_otg *otg = musb->xceiv->otg;
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2010-03-05 06:05:08 +08:00
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musb->port1_status = USB_PORT_STAT_POWER
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| (USB_PORT_STAT_C_CONNECTION << 16);
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2008-07-24 17:27:36 +08:00
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2013-04-11 03:55:50 +08:00
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usb_hcd_poll_rh_status(musb->hcd);
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2008-07-24 17:27:36 +08:00
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musb->is_active = 0;
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2009-04-01 03:30:04 +08:00
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switch (musb->xceiv->state) {
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2008-07-24 17:27:36 +08:00
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case OTG_STATE_A_SUSPEND:
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2011-11-24 21:46:26 +08:00
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if (otg->host->b_hnp_enable) {
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2009-04-03 01:16:11 +08:00
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musb->xceiv->state = OTG_STATE_A_PERIPHERAL;
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musb->g.is_a_peripheral = 1;
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break;
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}
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/* FALLTHROUGH */
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case OTG_STATE_A_HOST:
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2009-04-01 03:30:04 +08:00
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musb->xceiv->state = OTG_STATE_A_WAIT_BCON;
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2008-07-24 17:27:36 +08:00
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musb->is_active = 0;
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break;
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case OTG_STATE_A_WAIT_VFALL:
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2009-04-01 03:30:04 +08:00
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musb->xceiv->state = OTG_STATE_B_IDLE;
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2008-07-24 17:27:36 +08:00
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break;
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default:
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2011-05-11 17:44:08 +08:00
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dev_dbg(musb->controller, "host disconnect (%s)\n",
|
2013-03-07 16:39:57 +08:00
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usb_otg_state_string(musb->xceiv->state));
|
2008-07-24 17:27:36 +08:00
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}
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}
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/*---------------------------------------------------------------------*/
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/* Caller may or may not hold musb->lock */
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int musb_hub_status_data(struct usb_hcd *hcd, char *buf)
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{
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struct musb *musb = hcd_to_musb(hcd);
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int retval = 0;
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/* called in_irq() via usb_hcd_poll_rh_status() */
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if (musb->port1_status & 0xffff0000) {
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*buf = 0x02;
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retval = 1;
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}
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return retval;
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}
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int musb_hub_control(
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struct usb_hcd *hcd,
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u16 typeReq,
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u16 wValue,
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u16 wIndex,
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char *buf,
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u16 wLength)
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{
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struct musb *musb = hcd_to_musb(hcd);
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u32 temp;
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int retval = 0;
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unsigned long flags;
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spin_lock_irqsave(&musb->lock, flags);
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|
2010-06-23 04:39:10 +08:00
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if (unlikely(!HCD_HW_ACCESSIBLE(hcd))) {
|
2008-07-24 17:27:36 +08:00
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spin_unlock_irqrestore(&musb->lock, flags);
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return -ESHUTDOWN;
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}
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|
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/* hub features: always zero, setting is a NOP
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|
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* port features: reported, sometimes updated when host is active
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* no indicators
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*/
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|
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switch (typeReq) {
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case ClearHubFeature:
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case SetHubFeature:
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switch (wValue) {
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case C_HUB_OVER_CURRENT:
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case C_HUB_LOCAL_POWER:
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break;
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default:
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goto error;
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}
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|
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break;
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|
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case ClearPortFeature:
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|
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if ((wIndex & 0xff) != 1)
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|
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goto error;
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|
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switch (wValue) {
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|
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case USB_PORT_FEAT_ENABLE:
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|
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break;
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|
|
case USB_PORT_FEAT_SUSPEND:
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|
|
musb_port_suspend(musb, false);
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|
|
break;
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|
|
|
case USB_PORT_FEAT_POWER:
|
2011-11-24 21:46:26 +08:00
|
|
|
if (!hcd->self.is_b_host)
|
2010-12-01 19:22:05 +08:00
|
|
|
musb_platform_set_vbus(musb, 0);
|
2008-07-24 17:27:36 +08:00
|
|
|
break;
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|
|
|
case USB_PORT_FEAT_C_CONNECTION:
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|
|
|
case USB_PORT_FEAT_C_ENABLE:
|
|
|
|
case USB_PORT_FEAT_C_OVER_CURRENT:
|
|
|
|
case USB_PORT_FEAT_C_RESET:
|
|
|
|
case USB_PORT_FEAT_C_SUSPEND:
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
goto error;
|
|
|
|
}
|
2011-05-11 17:44:08 +08:00
|
|
|
dev_dbg(musb->controller, "clear feature %d\n", wValue);
|
2008-07-24 17:27:36 +08:00
|
|
|
musb->port1_status &= ~(1 << wValue);
|
|
|
|
break;
|
|
|
|
case GetHubDescriptor:
|
|
|
|
{
|
|
|
|
struct usb_hub_descriptor *desc = (void *)buf;
|
|
|
|
|
|
|
|
desc->bDescLength = 9;
|
|
|
|
desc->bDescriptorType = 0x29;
|
|
|
|
desc->bNbrPorts = 1;
|
2009-02-12 06:11:36 +08:00
|
|
|
desc->wHubCharacteristics = cpu_to_le16(
|
2008-07-24 17:27:36 +08:00
|
|
|
0x0001 /* per-port power switching */
|
|
|
|
| 0x0010 /* no overcurrent reporting */
|
|
|
|
);
|
|
|
|
desc->bPwrOn2PwrGood = 5; /* msec/2 */
|
|
|
|
desc->bHubContrCurrent = 0;
|
|
|
|
|
|
|
|
/* workaround bogus struct definition */
|
2001-09-17 15:00:00 +08:00
|
|
|
desc->u.hs.DeviceRemovable[0] = 0x02; /* port 1 */
|
|
|
|
desc->u.hs.DeviceRemovable[1] = 0xff;
|
2008-07-24 17:27:36 +08:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
case GetHubStatus:
|
|
|
|
temp = 0;
|
|
|
|
*(__le32 *) buf = cpu_to_le32(temp);
|
|
|
|
break;
|
|
|
|
case GetPortStatus:
|
|
|
|
if (wIndex != 1)
|
|
|
|
goto error;
|
|
|
|
|
|
|
|
/* finish RESET signaling? */
|
|
|
|
if ((musb->port1_status & USB_PORT_STAT_RESET)
|
|
|
|
&& time_after_eq(jiffies, musb->rh_timer))
|
|
|
|
musb_port_reset(musb, false);
|
|
|
|
|
|
|
|
/* finish RESUME signaling? */
|
|
|
|
if ((musb->port1_status & MUSB_PORT_STAT_RESUME)
|
|
|
|
&& time_after_eq(jiffies, musb->rh_timer)) {
|
|
|
|
u8 power;
|
|
|
|
|
|
|
|
power = musb_readb(musb->mregs, MUSB_POWER);
|
|
|
|
power &= ~MUSB_POWER_RESUME;
|
2011-05-11 17:44:08 +08:00
|
|
|
dev_dbg(musb->controller, "root port resume stopped, power %02x\n",
|
2008-07-24 17:27:36 +08:00
|
|
|
power);
|
|
|
|
musb_writeb(musb->mregs, MUSB_POWER, power);
|
|
|
|
|
|
|
|
/* ISSUE: DaVinci (RTL 1.300) disconnects after
|
|
|
|
* resume of high speed peripherals (but not full
|
|
|
|
* speed ones).
|
|
|
|
*/
|
|
|
|
|
|
|
|
musb->is_active = 1;
|
|
|
|
musb->port1_status &= ~(USB_PORT_STAT_SUSPEND
|
|
|
|
| MUSB_PORT_STAT_RESUME);
|
|
|
|
musb->port1_status |= USB_PORT_STAT_C_SUSPEND << 16;
|
2013-04-11 03:55:50 +08:00
|
|
|
usb_hcd_poll_rh_status(musb->hcd);
|
2008-07-24 17:27:36 +08:00
|
|
|
/* NOTE: it might really be A_WAIT_BCON ... */
|
2009-04-01 03:30:04 +08:00
|
|
|
musb->xceiv->state = OTG_STATE_A_HOST;
|
2008-07-24 17:27:36 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
put_unaligned(cpu_to_le32(musb->port1_status
|
|
|
|
& ~MUSB_PORT_STAT_RESUME),
|
|
|
|
(__le32 *) buf);
|
|
|
|
|
|
|
|
/* port change status is more interesting */
|
2011-05-11 17:44:08 +08:00
|
|
|
dev_dbg(musb->controller, "port status %08x\n",
|
2008-07-24 17:27:36 +08:00
|
|
|
musb->port1_status);
|
|
|
|
break;
|
|
|
|
case SetPortFeature:
|
|
|
|
if ((wIndex & 0xff) != 1)
|
|
|
|
goto error;
|
|
|
|
|
|
|
|
switch (wValue) {
|
|
|
|
case USB_PORT_FEAT_POWER:
|
|
|
|
/* NOTE: this controller has a strange state machine
|
|
|
|
* that involves "requesting sessions" according to
|
|
|
|
* magic side effects from incompletely-described
|
|
|
|
* rules about startup...
|
|
|
|
*
|
|
|
|
* This call is what really starts the host mode; be
|
|
|
|
* very careful about side effects if you reorder any
|
|
|
|
* initialization logic, e.g. for OTG, or change any
|
|
|
|
* logic relating to VBUS power-up.
|
|
|
|
*/
|
2011-11-24 21:46:26 +08:00
|
|
|
if (!hcd->self.is_b_host)
|
2008-07-24 17:27:36 +08:00
|
|
|
musb_start(musb);
|
|
|
|
break;
|
|
|
|
case USB_PORT_FEAT_RESET:
|
|
|
|
musb_port_reset(musb, true);
|
|
|
|
break;
|
|
|
|
case USB_PORT_FEAT_SUSPEND:
|
|
|
|
musb_port_suspend(musb, true);
|
|
|
|
break;
|
|
|
|
case USB_PORT_FEAT_TEST:
|
|
|
|
if (unlikely(is_host_active(musb)))
|
|
|
|
goto error;
|
|
|
|
|
|
|
|
wIndex >>= 8;
|
|
|
|
switch (wIndex) {
|
|
|
|
case 1:
|
|
|
|
pr_debug("TEST_J\n");
|
|
|
|
temp = MUSB_TEST_J;
|
|
|
|
break;
|
|
|
|
case 2:
|
|
|
|
pr_debug("TEST_K\n");
|
|
|
|
temp = MUSB_TEST_K;
|
|
|
|
break;
|
|
|
|
case 3:
|
|
|
|
pr_debug("TEST_SE0_NAK\n");
|
|
|
|
temp = MUSB_TEST_SE0_NAK;
|
|
|
|
break;
|
|
|
|
case 4:
|
|
|
|
pr_debug("TEST_PACKET\n");
|
|
|
|
temp = MUSB_TEST_PACKET;
|
|
|
|
musb_load_testpacket(musb);
|
|
|
|
break;
|
|
|
|
case 5:
|
|
|
|
pr_debug("TEST_FORCE_ENABLE\n");
|
|
|
|
temp = MUSB_TEST_FORCE_HOST
|
|
|
|
| MUSB_TEST_FORCE_HS;
|
|
|
|
|
|
|
|
musb_writeb(musb->mregs, MUSB_DEVCTL,
|
|
|
|
MUSB_DEVCTL_SESSION);
|
|
|
|
break;
|
|
|
|
case 6:
|
|
|
|
pr_debug("TEST_FIFO_ACCESS\n");
|
|
|
|
temp = MUSB_TEST_FIFO_ACCESS;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
musb_writeb(musb->mregs, MUSB_TESTMODE, temp);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
goto error;
|
|
|
|
}
|
2011-05-11 17:44:08 +08:00
|
|
|
dev_dbg(musb->controller, "set feature %d\n", wValue);
|
2008-07-24 17:27:36 +08:00
|
|
|
musb->port1_status |= 1 << wValue;
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
error:
|
|
|
|
/* "protocol stall" on error */
|
|
|
|
retval = -EPIPE;
|
|
|
|
}
|
|
|
|
spin_unlock_irqrestore(&musb->lock, flags);
|
|
|
|
return retval;
|
|
|
|
}
|