2005-04-17 06:20:36 +08:00
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/*
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* Initio A100 device driver for Linux.
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*
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* Copyright (c) 1994-1998 Initio Corporation
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* Copyright (c) 2003-2004 Christoph Hellwig
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* All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; see the file COPYING. If not, write to
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* the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* Revision History:
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* 07/02/98 hl - v.91n Initial drivers.
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* 09/14/98 hl - v1.01 Support new Kernel.
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* 09/22/98 hl - v1.01a Support reset.
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* 09/24/98 hl - v1.01b Fixed reset.
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* 10/05/98 hl - v1.02 split the source code and release.
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* 12/19/98 bv - v1.02a Use spinlocks for 2.1.95 and up
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* 01/31/99 bv - v1.02b Use mdelay instead of waitForPause
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* 08/08/99 bv - v1.02c Use waitForPause again.
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* 06/25/02 Doug Ledford <dledford@redhat.com> - v1.02d
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* - Remove limit on number of controllers
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* - Port to DMA mapping API
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* - Clean up interrupt handler registration
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* - Fix memory leaks
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* - Fix allocation of scsi host structs and private data
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* 11/18/03 Christoph Hellwig <hch@lst.de>
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* - Port to new probing API
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* - Fix some more leaks in init failure cases
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* 9/28/04 Christoph Hellwig <hch@lst.de>
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* - merge the two source files
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* - remove internal queueing code
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2008-10-27 23:16:36 +08:00
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* 14/06/07 Alan Cox <alan@lxorguk.ukuu.org.uk>
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2007-06-15 21:45:30 +08:00
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* - Grand cleanup and Linuxisation
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2005-04-17 06:20:36 +08:00
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*/
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#include <linux/module.h>
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#include <linux/errno.h>
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <linux/blkdev.h>
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#include <linux/spinlock.h>
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#include <linux/kernel.h>
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#include <linux/string.h>
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#include <linux/ioport.h>
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2006-03-28 17:56:48 +08:00
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#include <linux/dma-mapping.h>
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2005-04-17 06:20:36 +08:00
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <scsi/scsi.h>
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#include <scsi/scsi_cmnd.h>
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#include <scsi/scsi_device.h>
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#include <scsi/scsi_host.h>
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#include "a100u2w.h"
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2007-06-15 21:45:30 +08:00
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static struct orc_scb *__orc_alloc_scb(struct orc_host * host);
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static void inia100_scb_handler(struct orc_host *host, struct orc_scb *scb);
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2005-04-17 06:20:36 +08:00
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2007-06-15 21:45:30 +08:00
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static struct orc_nvram nvram, *nvramp = &nvram;
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2005-04-17 06:20:36 +08:00
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2007-06-15 21:45:30 +08:00
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static u8 default_nvram[64] =
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2005-04-17 06:20:36 +08:00
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{
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/*----------header -------------*/
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0x01, /* 0x00: Sub System Vendor ID 0 */
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0x11, /* 0x01: Sub System Vendor ID 1 */
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0x60, /* 0x02: Sub System ID 0 */
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0x10, /* 0x03: Sub System ID 1 */
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0x00, /* 0x04: SubClass */
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0x01, /* 0x05: Vendor ID 0 */
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0x11, /* 0x06: Vendor ID 1 */
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0x60, /* 0x07: Device ID 0 */
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0x10, /* 0x08: Device ID 1 */
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0x00, /* 0x09: Reserved */
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0x00, /* 0x0A: Reserved */
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0x01, /* 0x0B: Revision of Data Structure */
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/* -- Host Adapter Structure --- */
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0x01, /* 0x0C: Number Of SCSI Channel */
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0x01, /* 0x0D: BIOS Configuration 1 */
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0x00, /* 0x0E: BIOS Configuration 2 */
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0x00, /* 0x0F: BIOS Configuration 3 */
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/* --- SCSI Channel 0 Configuration --- */
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0x07, /* 0x10: H/A ID */
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0x83, /* 0x11: Channel Configuration */
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0x20, /* 0x12: MAX TAG per target */
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0x0A, /* 0x13: SCSI Reset Recovering time */
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0x00, /* 0x14: Channel Configuration4 */
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0x00, /* 0x15: Channel Configuration5 */
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/* SCSI Channel 0 Target Configuration */
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/* 0x16-0x25 */
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0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8,
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0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8,
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/* --- SCSI Channel 1 Configuration --- */
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0x07, /* 0x26: H/A ID */
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0x83, /* 0x27: Channel Configuration */
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0x20, /* 0x28: MAX TAG per target */
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0x0A, /* 0x29: SCSI Reset Recovering time */
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0x00, /* 0x2A: Channel Configuration4 */
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0x00, /* 0x2B: Channel Configuration5 */
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/* SCSI Channel 1 Target Configuration */
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/* 0x2C-0x3B */
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0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8,
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0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8,
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0x00, /* 0x3C: Reserved */
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0x00, /* 0x3D: Reserved */
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0x00, /* 0x3E: Reserved */
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0x00 /* 0x3F: Checksum */
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};
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2007-06-15 21:45:30 +08:00
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static u8 wait_chip_ready(struct orc_host * host)
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2005-04-17 06:20:36 +08:00
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{
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int i;
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for (i = 0; i < 10; i++) { /* Wait 1 second for report timeout */
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2007-06-15 21:45:30 +08:00
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if (inb(host->base + ORC_HCTRL) & HOSTSTOP) /* Wait HOSTSTOP set */
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2005-04-17 06:20:36 +08:00
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return 1;
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2018-07-27 17:09:13 +08:00
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msleep(100);
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2005-04-17 06:20:36 +08:00
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}
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return 0;
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}
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2007-06-15 21:45:30 +08:00
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static u8 wait_firmware_ready(struct orc_host * host)
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2005-04-17 06:20:36 +08:00
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{
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int i;
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for (i = 0; i < 10; i++) { /* Wait 1 second for report timeout */
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2007-06-15 21:45:30 +08:00
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if (inb(host->base + ORC_HSTUS) & RREADY) /* Wait READY set */
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2005-04-17 06:20:36 +08:00
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return 1;
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2018-07-27 17:09:13 +08:00
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msleep(100); /* wait 100ms before try again */
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2005-04-17 06:20:36 +08:00
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}
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return 0;
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}
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/***************************************************************************/
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2007-06-15 21:45:30 +08:00
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static u8 wait_scsi_reset_done(struct orc_host * host)
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2005-04-17 06:20:36 +08:00
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{
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int i;
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for (i = 0; i < 10; i++) { /* Wait 1 second for report timeout */
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2007-06-15 21:45:30 +08:00
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if (!(inb(host->base + ORC_HCTRL) & SCSIRST)) /* Wait SCSIRST done */
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2005-04-17 06:20:36 +08:00
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return 1;
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2007-06-15 21:45:30 +08:00
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mdelay(100); /* wait 100ms before try again */
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2005-04-17 06:20:36 +08:00
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}
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return 0;
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}
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/***************************************************************************/
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2007-06-15 21:45:30 +08:00
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static u8 wait_HDO_off(struct orc_host * host)
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2005-04-17 06:20:36 +08:00
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{
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int i;
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for (i = 0; i < 10; i++) { /* Wait 1 second for report timeout */
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2007-06-15 21:45:30 +08:00
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if (!(inb(host->base + ORC_HCTRL) & HDO)) /* Wait HDO off */
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2005-04-17 06:20:36 +08:00
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return 1;
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2007-06-15 21:45:30 +08:00
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mdelay(100); /* wait 100ms before try again */
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2005-04-17 06:20:36 +08:00
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}
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return 0;
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}
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/***************************************************************************/
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2007-06-15 21:45:30 +08:00
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static u8 wait_hdi_set(struct orc_host * host, u8 * data)
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2005-04-17 06:20:36 +08:00
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{
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int i;
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for (i = 0; i < 10; i++) { /* Wait 1 second for report timeout */
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2007-06-15 21:45:30 +08:00
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if ((*data = inb(host->base + ORC_HSTUS)) & HDI)
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2005-04-17 06:20:36 +08:00
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return 1; /* Wait HDI set */
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2007-06-15 21:45:30 +08:00
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mdelay(100); /* wait 100ms before try again */
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2005-04-17 06:20:36 +08:00
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}
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return 0;
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}
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/***************************************************************************/
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2007-06-15 21:45:30 +08:00
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static unsigned short orc_read_fwrev(struct orc_host * host)
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2005-04-17 06:20:36 +08:00
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{
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2007-06-15 21:45:30 +08:00
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u16 version;
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u8 data;
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outb(ORC_CMD_VERSION, host->base + ORC_HDATA);
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outb(HDO, host->base + ORC_HCTRL);
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if (wait_HDO_off(host) == 0) /* Wait HDO off */
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2005-04-17 06:20:36 +08:00
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return 0;
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2007-06-15 21:45:30 +08:00
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if (wait_hdi_set(host, &data) == 0) /* Wait HDI set */
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2005-04-17 06:20:36 +08:00
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return 0;
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2007-06-15 21:45:30 +08:00
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version = inb(host->base + ORC_HDATA);
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outb(data, host->base + ORC_HSTUS); /* Clear HDI */
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2005-04-17 06:20:36 +08:00
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2007-06-15 21:45:30 +08:00
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if (wait_hdi_set(host, &data) == 0) /* Wait HDI set */
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2005-04-17 06:20:36 +08:00
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return 0;
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2007-06-15 21:45:30 +08:00
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version |= inb(host->base + ORC_HDATA) << 8;
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outb(data, host->base + ORC_HSTUS); /* Clear HDI */
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2005-04-17 06:20:36 +08:00
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2007-06-15 21:45:30 +08:00
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return version;
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2005-04-17 06:20:36 +08:00
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}
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/***************************************************************************/
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2007-06-15 21:45:30 +08:00
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static u8 orc_nv_write(struct orc_host * host, unsigned char address, unsigned char value)
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2005-04-17 06:20:36 +08:00
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{
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2007-06-15 21:45:30 +08:00
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outb(ORC_CMD_SET_NVM, host->base + ORC_HDATA); /* Write command */
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outb(HDO, host->base + ORC_HCTRL);
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if (wait_HDO_off(host) == 0) /* Wait HDO off */
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2005-04-17 06:20:36 +08:00
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return 0;
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2007-06-15 21:45:30 +08:00
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outb(address, host->base + ORC_HDATA); /* Write address */
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outb(HDO, host->base + ORC_HCTRL);
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if (wait_HDO_off(host) == 0) /* Wait HDO off */
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2005-04-17 06:20:36 +08:00
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return 0;
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2007-06-15 21:45:30 +08:00
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outb(value, host->base + ORC_HDATA); /* Write value */
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outb(HDO, host->base + ORC_HCTRL);
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if (wait_HDO_off(host) == 0) /* Wait HDO off */
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2005-04-17 06:20:36 +08:00
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return 0;
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return 1;
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}
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/***************************************************************************/
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2007-06-15 21:45:30 +08:00
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static u8 orc_nv_read(struct orc_host * host, u8 address, u8 *ptr)
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2005-04-17 06:20:36 +08:00
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{
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2007-06-15 21:45:30 +08:00
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unsigned char data;
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2005-04-17 06:20:36 +08:00
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2007-06-15 21:45:30 +08:00
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outb(ORC_CMD_GET_NVM, host->base + ORC_HDATA); /* Write command */
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outb(HDO, host->base + ORC_HCTRL);
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if (wait_HDO_off(host) == 0) /* Wait HDO off */
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2005-04-17 06:20:36 +08:00
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return 0;
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2007-06-15 21:45:30 +08:00
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outb(address, host->base + ORC_HDATA); /* Write address */
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outb(HDO, host->base + ORC_HCTRL);
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if (wait_HDO_off(host) == 0) /* Wait HDO off */
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2005-04-17 06:20:36 +08:00
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return 0;
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2007-06-15 21:45:30 +08:00
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if (wait_hdi_set(host, &data) == 0) /* Wait HDI set */
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2005-04-17 06:20:36 +08:00
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return 0;
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2007-06-15 21:45:30 +08:00
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*ptr = inb(host->base + ORC_HDATA);
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outb(data, host->base + ORC_HSTUS); /* Clear HDI */
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2005-04-17 06:20:36 +08:00
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return 1;
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2007-06-15 21:45:30 +08:00
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2005-04-17 06:20:36 +08:00
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}
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2007-06-15 21:45:30 +08:00
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/**
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2021-03-17 17:12:05 +08:00
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* orc_exec_scb - Queue an SCB with the HA
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2007-06-15 21:45:30 +08:00
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* @host: host adapter the SCB belongs to
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* @scb: SCB to queue for execution
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*/
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static void orc_exec_scb(struct orc_host * host, struct orc_scb * scb)
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2005-04-17 06:20:36 +08:00
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{
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2007-06-15 21:45:30 +08:00
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scb->status = ORCSCB_POST;
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outb(scb->scbidx, host->base + ORC_PQUEUE);
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2005-04-17 06:20:36 +08:00
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}
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2007-06-15 21:45:30 +08:00
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/**
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* se2_rd_all - read SCSI parameters from EEPROM
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* @host: Host whose EEPROM is being loaded
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*
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* Read SCSI H/A configuration parameters from serial EEPROM
|
|
|
|
*/
|
|
|
|
|
|
|
|
static int se2_rd_all(struct orc_host * host)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
|
|
|
int i;
|
2007-06-15 21:45:30 +08:00
|
|
|
u8 *np, chksum = 0;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
np = (u8 *) nvramp;
|
2005-04-17 06:20:36 +08:00
|
|
|
for (i = 0; i < 64; i++, np++) { /* <01> */
|
2007-06-15 21:45:30 +08:00
|
|
|
if (orc_nv_read(host, (u8) i, np) == 0)
|
2005-04-17 06:20:36 +08:00
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
/*------ Is ckecksum ok ? ------*/
|
|
|
|
np = (u8 *) nvramp;
|
2005-04-17 06:20:36 +08:00
|
|
|
for (i = 0; i < 63; i++)
|
|
|
|
chksum += *np++;
|
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
if (nvramp->CheckSum != (u8) chksum)
|
2005-04-17 06:20:36 +08:00
|
|
|
return -1;
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
/**
|
|
|
|
* se2_update_all - update the EEPROM
|
|
|
|
* @host: Host whose EEPROM is being updated
|
|
|
|
*
|
|
|
|
* Update changed bytes in the EEPROM image.
|
|
|
|
*/
|
|
|
|
|
|
|
|
static void se2_update_all(struct orc_host * host)
|
2005-04-17 06:20:36 +08:00
|
|
|
{ /* setup default pattern */
|
|
|
|
int i;
|
2007-06-15 21:45:30 +08:00
|
|
|
u8 *np, *np1, chksum = 0;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
/* Calculate checksum first */
|
2007-06-15 21:45:30 +08:00
|
|
|
np = (u8 *) default_nvram;
|
2005-04-17 06:20:36 +08:00
|
|
|
for (i = 0; i < 63; i++)
|
|
|
|
chksum += *np++;
|
|
|
|
*np = chksum;
|
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
np = (u8 *) default_nvram;
|
|
|
|
np1 = (u8 *) nvramp;
|
2005-04-17 06:20:36 +08:00
|
|
|
for (i = 0; i < 64; i++, np++, np1++) {
|
2007-06-15 21:45:30 +08:00
|
|
|
if (*np != *np1)
|
|
|
|
orc_nv_write(host, (u8) i, *np);
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
/**
|
|
|
|
* read_eeprom - load EEPROM
|
|
|
|
* @host: Host EEPROM to read
|
|
|
|
*
|
|
|
|
* Read the EEPROM for a given host. If it is invalid or fails
|
|
|
|
* the restore the defaults and use them.
|
|
|
|
*/
|
|
|
|
|
|
|
|
static void read_eeprom(struct orc_host * host)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
2007-06-15 21:45:30 +08:00
|
|
|
if (se2_rd_all(host) != 1) {
|
|
|
|
se2_update_all(host); /* setup default pattern */
|
|
|
|
se2_rd_all(host); /* load again */
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
/**
|
|
|
|
* orc_load_firmware - initialise firmware
|
|
|
|
* @host: Host to set up
|
|
|
|
*
|
|
|
|
* Load the firmware from the EEPROM into controller SRAM. This
|
|
|
|
* is basically a 4K block copy and then a 4K block read to check
|
|
|
|
* correctness. The rest is convulted by the indirect interfaces
|
|
|
|
* in the hardware
|
|
|
|
*/
|
|
|
|
|
|
|
|
static u8 orc_load_firmware(struct orc_host * host)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
2007-06-15 21:45:30 +08:00
|
|
|
u32 data32;
|
|
|
|
u16 bios_addr;
|
|
|
|
u16 i;
|
|
|
|
u8 *data32_ptr, data;
|
|
|
|
|
|
|
|
|
|
|
|
/* Set up the EEPROM for access */
|
|
|
|
|
|
|
|
data = inb(host->base + ORC_GCFG);
|
|
|
|
outb(data | EEPRG, host->base + ORC_GCFG); /* Enable EEPROM programming */
|
|
|
|
outb(0x00, host->base + ORC_EBIOSADR2);
|
|
|
|
outw(0x0000, host->base + ORC_EBIOSADR0);
|
|
|
|
if (inb(host->base + ORC_EBIOSDATA) != 0x55) {
|
|
|
|
outb(data, host->base + ORC_GCFG); /* Disable EEPROM programming */
|
2005-04-17 06:20:36 +08:00
|
|
|
return 0;
|
|
|
|
}
|
2007-06-15 21:45:30 +08:00
|
|
|
outw(0x0001, host->base + ORC_EBIOSADR0);
|
|
|
|
if (inb(host->base + ORC_EBIOSDATA) != 0xAA) {
|
|
|
|
outb(data, host->base + ORC_GCFG); /* Disable EEPROM programming */
|
2005-04-17 06:20:36 +08:00
|
|
|
return 0;
|
|
|
|
}
|
2007-06-15 21:45:30 +08:00
|
|
|
|
|
|
|
outb(PRGMRST | DOWNLOAD, host->base + ORC_RISCCTL); /* Enable SRAM programming */
|
|
|
|
data32_ptr = (u8 *) & data32;
|
2008-07-16 05:15:41 +08:00
|
|
|
data32 = cpu_to_le32(0); /* Initial FW address to 0 */
|
2007-06-15 21:45:30 +08:00
|
|
|
outw(0x0010, host->base + ORC_EBIOSADR0);
|
|
|
|
*data32_ptr = inb(host->base + ORC_EBIOSDATA); /* Read from BIOS */
|
|
|
|
outw(0x0011, host->base + ORC_EBIOSADR0);
|
|
|
|
*(data32_ptr + 1) = inb(host->base + ORC_EBIOSDATA); /* Read from BIOS */
|
|
|
|
outw(0x0012, host->base + ORC_EBIOSADR0);
|
|
|
|
*(data32_ptr + 2) = inb(host->base + ORC_EBIOSDATA); /* Read from BIOS */
|
|
|
|
outw(*(data32_ptr + 2), host->base + ORC_EBIOSADR2);
|
2008-07-16 05:15:41 +08:00
|
|
|
outl(le32_to_cpu(data32), host->base + ORC_FWBASEADR); /* Write FW address */
|
2007-06-15 21:45:30 +08:00
|
|
|
|
|
|
|
/* Copy the code from the BIOS to the SRAM */
|
|
|
|
|
2008-07-16 05:16:38 +08:00
|
|
|
udelay(500); /* Required on Sun Ultra 5 ... 350 -> failures */
|
2008-07-16 05:15:41 +08:00
|
|
|
bios_addr = (u16) le32_to_cpu(data32); /* FW code locate at BIOS address + ? */
|
2007-06-15 21:45:30 +08:00
|
|
|
for (i = 0, data32_ptr = (u8 *) & data32; /* Download the code */
|
2005-04-17 06:20:36 +08:00
|
|
|
i < 0x1000; /* Firmware code size = 4K */
|
2007-06-15 21:45:30 +08:00
|
|
|
i++, bios_addr++) {
|
|
|
|
outw(bios_addr, host->base + ORC_EBIOSADR0);
|
|
|
|
*data32_ptr++ = inb(host->base + ORC_EBIOSDATA); /* Read from BIOS */
|
2005-04-17 06:20:36 +08:00
|
|
|
if ((i % 4) == 3) {
|
2008-07-16 05:15:41 +08:00
|
|
|
outl(le32_to_cpu(data32), host->base + ORC_RISCRAM); /* Write every 4 bytes */
|
2007-06-15 21:45:30 +08:00
|
|
|
data32_ptr = (u8 *) & data32;
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
/* Go back and check they match */
|
|
|
|
|
|
|
|
outb(PRGMRST | DOWNLOAD, host->base + ORC_RISCCTL); /* Reset program count 0 */
|
tree-wide: fix comment/printk typos
"gadget", "through", "command", "maintain", "maintain", "controller", "address",
"between", "initiali[zs]e", "instead", "function", "select", "already",
"equal", "access", "management", "hierarchy", "registration", "interest",
"relative", "memory", "offset", "already",
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2010-11-02 03:38:34 +08:00
|
|
|
bios_addr -= 0x1000; /* Reset the BIOS address */
|
2007-06-15 21:45:30 +08:00
|
|
|
for (i = 0, data32_ptr = (u8 *) & data32; /* Check the code */
|
2005-04-17 06:20:36 +08:00
|
|
|
i < 0x1000; /* Firmware code size = 4K */
|
2007-06-15 21:45:30 +08:00
|
|
|
i++, bios_addr++) {
|
|
|
|
outw(bios_addr, host->base + ORC_EBIOSADR0);
|
|
|
|
*data32_ptr++ = inb(host->base + ORC_EBIOSDATA); /* Read from BIOS */
|
2005-04-17 06:20:36 +08:00
|
|
|
if ((i % 4) == 3) {
|
2008-07-16 05:15:41 +08:00
|
|
|
if (inl(host->base + ORC_RISCRAM) != le32_to_cpu(data32)) {
|
2007-06-15 21:45:30 +08:00
|
|
|
outb(PRGMRST, host->base + ORC_RISCCTL); /* Reset program to 0 */
|
|
|
|
outb(data, host->base + ORC_GCFG); /*Disable EEPROM programming */
|
2005-04-17 06:20:36 +08:00
|
|
|
return 0;
|
|
|
|
}
|
2007-06-15 21:45:30 +08:00
|
|
|
data32_ptr = (u8 *) & data32;
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
}
|
2007-06-15 21:45:30 +08:00
|
|
|
|
|
|
|
/* Success */
|
|
|
|
outb(PRGMRST, host->base + ORC_RISCCTL); /* Reset program to 0 */
|
|
|
|
outb(data, host->base + ORC_GCFG); /* Disable EEPROM programming */
|
2005-04-17 06:20:36 +08:00
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
/***************************************************************************/
|
2007-06-15 21:45:30 +08:00
|
|
|
static void setup_SCBs(struct orc_host * host)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
2007-06-15 21:45:30 +08:00
|
|
|
struct orc_scb *scb;
|
2005-04-17 06:20:36 +08:00
|
|
|
int i;
|
2007-06-15 21:45:30 +08:00
|
|
|
struct orc_extended_scb *escb;
|
|
|
|
dma_addr_t escb_phys;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
/* Setup SCB base and SCB Size registers */
|
|
|
|
outb(ORC_MAXQUEUE, host->base + ORC_SCBSIZE); /* Total number of SCBs */
|
|
|
|
/* SCB base address 0 */
|
|
|
|
outl(host->scb_phys, host->base + ORC_SCBBASE0);
|
|
|
|
/* SCB base address 1 */
|
|
|
|
outl(host->scb_phys, host->base + ORC_SCBBASE1);
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
/* setup scatter list address with one buffer */
|
2007-06-15 21:45:30 +08:00
|
|
|
scb = host->scb_virt;
|
|
|
|
escb = host->escb_virt;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
for (i = 0; i < ORC_MAXQUEUE; i++) {
|
2007-06-15 21:45:30 +08:00
|
|
|
escb_phys = (host->escb_phys + (sizeof(struct orc_extended_scb) * i));
|
2008-07-16 05:15:41 +08:00
|
|
|
scb->sg_addr = cpu_to_le32((u32) escb_phys);
|
|
|
|
scb->sense_addr = cpu_to_le32((u32) escb_phys);
|
2007-06-15 21:45:30 +08:00
|
|
|
scb->escb = escb;
|
|
|
|
scb->scbidx = i;
|
|
|
|
scb++;
|
|
|
|
escb++;
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
/**
|
|
|
|
* init_alloc_map - initialise allocation map
|
|
|
|
* @host: host map to configure
|
|
|
|
*
|
|
|
|
* Initialise the allocation maps for this device. If the device
|
|
|
|
* is not quiescent the caller must hold the allocation lock
|
|
|
|
*/
|
|
|
|
|
|
|
|
static void init_alloc_map(struct orc_host * host)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
2007-06-15 21:45:30 +08:00
|
|
|
u8 i, j;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
for (i = 0; i < MAX_CHANNELS; i++) {
|
|
|
|
for (j = 0; j < 8; j++) {
|
2007-06-15 21:45:30 +08:00
|
|
|
host->allocation_map[i][j] = 0xffffffff;
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
/**
|
|
|
|
* init_orchid - initialise the host adapter
|
|
|
|
* @host:host adapter to initialise
|
|
|
|
*
|
tree-wide: Assorted spelling fixes
In particular, several occurances of funny versions of 'success',
'unknown', 'therefore', 'acknowledge', 'argument', 'achieve', 'address',
'beginning', 'desirable', 'separate' and 'necessary' are fixed.
Signed-off-by: Daniel Mack <daniel@caiaq.de>
Cc: Joe Perches <joe@perches.com>
Cc: Junio C Hamano <gitster@pobox.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2010-02-03 08:01:28 +08:00
|
|
|
* Initialise the controller and if necessary load the firmware.
|
2007-06-15 21:45:30 +08:00
|
|
|
*
|
|
|
|
* Returns -1 if the initialisation fails.
|
|
|
|
*/
|
|
|
|
|
|
|
|
static int init_orchid(struct orc_host * host)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
2007-06-15 21:45:30 +08:00
|
|
|
u8 *ptr;
|
|
|
|
u16 revision;
|
|
|
|
u8 i;
|
|
|
|
|
|
|
|
init_alloc_map(host);
|
|
|
|
outb(0xFF, host->base + ORC_GIMSK); /* Disable all interrupts */
|
|
|
|
|
|
|
|
if (inb(host->base + ORC_HSTUS) & RREADY) { /* Orchid is ready */
|
|
|
|
revision = orc_read_fwrev(host);
|
2005-04-17 06:20:36 +08:00
|
|
|
if (revision == 0xFFFF) {
|
2007-06-15 21:45:30 +08:00
|
|
|
outb(DEVRST, host->base + ORC_HCTRL); /* Reset Host Adapter */
|
|
|
|
if (wait_chip_ready(host) == 0)
|
|
|
|
return -1;
|
|
|
|
orc_load_firmware(host); /* Download FW */
|
|
|
|
setup_SCBs(host); /* Setup SCB base and SCB Size registers */
|
|
|
|
outb(0x00, host->base + ORC_HCTRL); /* clear HOSTSTOP */
|
|
|
|
if (wait_firmware_ready(host) == 0)
|
|
|
|
return -1;
|
2005-04-17 06:20:36 +08:00
|
|
|
/* Wait for firmware ready */
|
|
|
|
} else {
|
2007-06-15 21:45:30 +08:00
|
|
|
setup_SCBs(host); /* Setup SCB base and SCB Size registers */
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
} else { /* Orchid is not Ready */
|
2007-06-15 21:45:30 +08:00
|
|
|
outb(DEVRST, host->base + ORC_HCTRL); /* Reset Host Adapter */
|
|
|
|
if (wait_chip_ready(host) == 0)
|
|
|
|
return -1;
|
|
|
|
orc_load_firmware(host); /* Download FW */
|
|
|
|
setup_SCBs(host); /* Setup SCB base and SCB Size registers */
|
|
|
|
outb(HDO, host->base + ORC_HCTRL); /* Do Hardware Reset & */
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
/* clear HOSTSTOP */
|
2007-06-15 21:45:30 +08:00
|
|
|
if (wait_firmware_ready(host) == 0) /* Wait for firmware ready */
|
|
|
|
return -1;
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
/* Load an EEProm copy into RAM */
|
|
|
|
/* Assumes single threaded at this point */
|
|
|
|
read_eeprom(host);
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
if (nvramp->revision != 1)
|
|
|
|
return -1;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
host->scsi_id = nvramp->scsi_id;
|
|
|
|
host->BIOScfg = nvramp->BIOSConfig1;
|
|
|
|
host->max_targets = MAX_TARGETS;
|
|
|
|
ptr = (u8 *) & (nvramp->Target00Config);
|
|
|
|
for (i = 0; i < 16; ptr++, i++) {
|
|
|
|
host->target_flag[i] = *ptr;
|
|
|
|
host->max_tags[i] = ORC_MAXTAGS;
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
2007-06-15 21:45:30 +08:00
|
|
|
|
|
|
|
if (nvramp->SCSI0Config & NCC_BUSRESET)
|
|
|
|
host->flags |= HCF_SCSI_RESET;
|
|
|
|
outb(0xFB, host->base + ORC_GIMSK); /* enable RP FIFO interrupt */
|
|
|
|
return 0;
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
/**
|
|
|
|
* orc_reset_scsi_bus - perform bus reset
|
|
|
|
* @host: host being reset
|
|
|
|
*
|
|
|
|
* Perform a full bus reset on the adapter.
|
|
|
|
*/
|
|
|
|
|
|
|
|
static int orc_reset_scsi_bus(struct orc_host * host)
|
2005-04-17 06:20:36 +08:00
|
|
|
{ /* I need Host Control Block Information */
|
2007-06-15 21:45:30 +08:00
|
|
|
unsigned long flags;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
spin_lock_irqsave(&host->allocation_lock, flags);
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
init_alloc_map(host);
|
2005-04-17 06:20:36 +08:00
|
|
|
/* reset scsi bus */
|
2007-06-15 21:45:30 +08:00
|
|
|
outb(SCSIRST, host->base + ORC_HCTRL);
|
|
|
|
/* FIXME: We can spend up to a second with the lock held and
|
|
|
|
interrupts off here */
|
|
|
|
if (wait_scsi_reset_done(host) == 0) {
|
|
|
|
spin_unlock_irqrestore(&host->allocation_lock, flags);
|
2005-04-17 06:20:36 +08:00
|
|
|
return FAILED;
|
|
|
|
} else {
|
2007-06-15 21:45:30 +08:00
|
|
|
spin_unlock_irqrestore(&host->allocation_lock, flags);
|
2005-04-17 06:20:36 +08:00
|
|
|
return SUCCESS;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
/**
|
|
|
|
* orc_device_reset - device reset handler
|
|
|
|
* @host: host to reset
|
|
|
|
* @cmd: command causing the reset
|
2021-03-17 17:12:05 +08:00
|
|
|
* @target: target device
|
2007-06-15 21:45:30 +08:00
|
|
|
*
|
|
|
|
* Reset registers, reset a hanging bus and kill active and disconnected
|
|
|
|
* commands for target w/o soft reset
|
|
|
|
*/
|
|
|
|
|
|
|
|
static int orc_device_reset(struct orc_host * host, struct scsi_cmnd *cmd, unsigned int target)
|
2005-04-17 06:20:36 +08:00
|
|
|
{ /* I need Host Control Block Information */
|
2007-06-15 21:45:30 +08:00
|
|
|
struct orc_scb *scb;
|
|
|
|
struct orc_extended_scb *escb;
|
|
|
|
struct orc_scb *host_scb;
|
|
|
|
u8 i;
|
|
|
|
unsigned long flags;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
spin_lock_irqsave(&(host->allocation_lock), flags);
|
|
|
|
scb = (struct orc_scb *) NULL;
|
|
|
|
escb = (struct orc_extended_scb *) NULL;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
/* setup scatter list address with one buffer */
|
2007-06-15 21:45:30 +08:00
|
|
|
host_scb = host->scb_virt;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
/* FIXME: is this safe if we then fail to issue the reset or race
|
|
|
|
a completion ? */
|
|
|
|
init_alloc_map(host);
|
|
|
|
|
|
|
|
/* Find the scb corresponding to the command */
|
2005-04-17 06:20:36 +08:00
|
|
|
for (i = 0; i < ORC_MAXQUEUE; i++) {
|
2007-06-15 21:45:30 +08:00
|
|
|
escb = host_scb->escb;
|
|
|
|
if (host_scb->status && escb->srb == cmd)
|
2005-04-17 06:20:36 +08:00
|
|
|
break;
|
2007-06-15 21:45:30 +08:00
|
|
|
host_scb++;
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
if (i == ORC_MAXQUEUE) {
|
2007-06-15 21:45:30 +08:00
|
|
|
printk(KERN_ERR "Unable to Reset - No SCB Found\n");
|
|
|
|
spin_unlock_irqrestore(&(host->allocation_lock), flags);
|
2005-04-17 06:20:36 +08:00
|
|
|
return FAILED;
|
|
|
|
}
|
2007-06-15 21:45:30 +08:00
|
|
|
|
|
|
|
/* Allocate a new SCB for the reset command to the firmware */
|
|
|
|
if ((scb = __orc_alloc_scb(host)) == NULL) {
|
|
|
|
/* Can't happen.. */
|
|
|
|
spin_unlock_irqrestore(&(host->allocation_lock), flags);
|
2005-04-17 06:20:36 +08:00
|
|
|
return FAILED;
|
|
|
|
}
|
2007-06-15 21:45:30 +08:00
|
|
|
|
2009-01-03 15:56:38 +08:00
|
|
|
/* Reset device is handled by the firmware, we fill in an SCB and
|
2007-06-15 21:45:30 +08:00
|
|
|
fire it at the controller, it does the rest */
|
|
|
|
scb->opcode = ORC_BUSDEVRST;
|
|
|
|
scb->target = target;
|
|
|
|
scb->hastat = 0;
|
|
|
|
scb->tastat = 0;
|
|
|
|
scb->status = 0x0;
|
|
|
|
scb->link = 0xFF;
|
|
|
|
scb->reserved0 = 0;
|
|
|
|
scb->reserved1 = 0;
|
2008-07-16 05:15:41 +08:00
|
|
|
scb->xferlen = cpu_to_le32(0);
|
|
|
|
scb->sg_len = cpu_to_le32(0);
|
2007-06-15 21:45:30 +08:00
|
|
|
|
|
|
|
escb->srb = NULL;
|
|
|
|
escb->srb = cmd;
|
|
|
|
orc_exec_scb(host, scb); /* Start execute SCB */
|
|
|
|
spin_unlock_irqrestore(&host->allocation_lock, flags);
|
2005-04-17 06:20:36 +08:00
|
|
|
return SUCCESS;
|
|
|
|
}
|
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
/**
|
|
|
|
* __orc_alloc_scb - allocate an SCB
|
|
|
|
* @host: host to allocate from
|
|
|
|
*
|
|
|
|
* Allocate an SCB and return a pointer to the SCB object. NULL
|
|
|
|
* is returned if no SCB is free. The caller must already hold
|
|
|
|
* the allocator lock at this point.
|
|
|
|
*/
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
|
|
|
|
static struct orc_scb *__orc_alloc_scb(struct orc_host * host)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
2007-06-15 21:45:30 +08:00
|
|
|
u8 channel;
|
|
|
|
unsigned long idx;
|
|
|
|
u8 index;
|
|
|
|
u8 i;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
channel = host->index;
|
2005-04-17 06:20:36 +08:00
|
|
|
for (i = 0; i < 8; i++) {
|
|
|
|
for (index = 0; index < 32; index++) {
|
2007-06-15 21:45:30 +08:00
|
|
|
if ((host->allocation_map[channel][i] >> index) & 0x01) {
|
|
|
|
host->allocation_map[channel][i] &= ~(1 << index);
|
2008-03-17 20:32:02 +08:00
|
|
|
idx = index + 32 * i;
|
|
|
|
/*
|
|
|
|
* Translate the index to a structure instance
|
|
|
|
*/
|
|
|
|
return host->scb_virt + idx;
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
2007-06-15 21:45:30 +08:00
|
|
|
return NULL;
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
/**
|
|
|
|
* orc_alloc_scb - allocate an SCB
|
|
|
|
* @host: host to allocate from
|
|
|
|
*
|
|
|
|
* Allocate an SCB and return a pointer to the SCB object. NULL
|
|
|
|
* is returned if no SCB is free.
|
|
|
|
*/
|
|
|
|
|
|
|
|
static struct orc_scb *orc_alloc_scb(struct orc_host * host)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
2007-06-15 21:45:30 +08:00
|
|
|
struct orc_scb *scb;
|
|
|
|
unsigned long flags;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
spin_lock_irqsave(&host->allocation_lock, flags);
|
|
|
|
scb = __orc_alloc_scb(host);
|
|
|
|
spin_unlock_irqrestore(&host->allocation_lock, flags);
|
|
|
|
return scb;
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
/**
|
|
|
|
* orc_release_scb - release an SCB
|
|
|
|
* @host: host owning the SCB
|
|
|
|
* @scb: SCB that is now free
|
|
|
|
*
|
|
|
|
* Called to return a completed SCB to the allocation pool. Before
|
|
|
|
* calling the SCB must be out of use on both the host and the HA.
|
|
|
|
*/
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
static void orc_release_scb(struct orc_host *host, struct orc_scb *scb)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
2007-06-15 21:45:30 +08:00
|
|
|
unsigned long flags;
|
|
|
|
u8 index, i, channel;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&(host->allocation_lock), flags);
|
|
|
|
channel = host->index; /* Channel */
|
|
|
|
index = scb->scbidx;
|
|
|
|
i = index / 32;
|
|
|
|
index %= 32;
|
|
|
|
host->allocation_map[channel][i] |= (1 << index);
|
|
|
|
spin_unlock_irqrestore(&(host->allocation_lock), flags);
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
|
2021-03-17 17:12:05 +08:00
|
|
|
/*
|
2007-06-15 21:45:30 +08:00
|
|
|
* orchid_abort_scb - abort a command
|
|
|
|
*
|
|
|
|
* Abort a queued command that has been passed to the firmware layer
|
|
|
|
* if possible. This is all handled by the firmware. We aks the firmware
|
|
|
|
* and it either aborts the command or fails
|
|
|
|
*/
|
|
|
|
|
|
|
|
static int orchid_abort_scb(struct orc_host * host, struct orc_scb * scb)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
2007-06-15 21:45:30 +08:00
|
|
|
unsigned char data, status;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
outb(ORC_CMD_ABORT_SCB, host->base + ORC_HDATA); /* Write command */
|
|
|
|
outb(HDO, host->base + ORC_HCTRL);
|
|
|
|
if (wait_HDO_off(host) == 0) /* Wait HDO off */
|
2005-04-17 06:20:36 +08:00
|
|
|
return 0;
|
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
outb(scb->scbidx, host->base + ORC_HDATA); /* Write address */
|
|
|
|
outb(HDO, host->base + ORC_HCTRL);
|
|
|
|
if (wait_HDO_off(host) == 0) /* Wait HDO off */
|
2005-04-17 06:20:36 +08:00
|
|
|
return 0;
|
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
if (wait_hdi_set(host, &data) == 0) /* Wait HDI set */
|
2005-04-17 06:20:36 +08:00
|
|
|
return 0;
|
2007-06-15 21:45:30 +08:00
|
|
|
status = inb(host->base + ORC_HDATA);
|
|
|
|
outb(data, host->base + ORC_HSTUS); /* Clear HDI */
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
if (status == 1) /* 0 - Successfully */
|
2005-04-17 06:20:36 +08:00
|
|
|
return 0; /* 1 - Fail */
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
static int inia100_abort_cmd(struct orc_host * host, struct scsi_cmnd *cmd)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
2007-06-15 21:45:30 +08:00
|
|
|
struct orc_extended_scb *escb;
|
|
|
|
struct orc_scb *scb;
|
|
|
|
u8 i;
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&(host->allocation_lock), flags);
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
scb = host->scb_virt;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
/* Walk the queue until we find the SCB that belongs to the command
|
|
|
|
block. This isn't a performance critical path so a walk in the park
|
|
|
|
here does no harm */
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
for (i = 0; i < ORC_MAXQUEUE; i++, scb++) {
|
|
|
|
escb = scb->escb;
|
|
|
|
if (scb->status && escb->srb == cmd) {
|
|
|
|
if (scb->tag_msg == 0) {
|
|
|
|
goto out;
|
2005-04-17 06:20:36 +08:00
|
|
|
} else {
|
2007-06-15 21:45:30 +08:00
|
|
|
/* Issue an ABORT to the firmware */
|
|
|
|
if (orchid_abort_scb(host, scb)) {
|
|
|
|
escb->srb = NULL;
|
|
|
|
spin_unlock_irqrestore(&host->allocation_lock, flags);
|
2005-04-17 06:20:36 +08:00
|
|
|
return SUCCESS;
|
2007-06-15 21:45:30 +08:00
|
|
|
} else
|
|
|
|
goto out;
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
2007-06-15 21:45:30 +08:00
|
|
|
out:
|
|
|
|
spin_unlock_irqrestore(&host->allocation_lock, flags);
|
2005-04-17 06:20:36 +08:00
|
|
|
return FAILED;
|
|
|
|
}
|
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
/**
|
|
|
|
* orc_interrupt - IRQ processing
|
|
|
|
* @host: Host causing the interrupt
|
|
|
|
*
|
|
|
|
* This function is called from the IRQ handler and protected
|
|
|
|
* by the host lock. While the controller reports that there are
|
|
|
|
* scb's for processing we pull them off the controller, turn the
|
|
|
|
* index into a host address pointer to the scb and call the scb
|
|
|
|
* handler.
|
|
|
|
*
|
|
|
|
* Returns IRQ_HANDLED if any SCBs were processed, IRQ_NONE otherwise
|
|
|
|
*/
|
|
|
|
|
|
|
|
static irqreturn_t orc_interrupt(struct orc_host * host)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
2007-06-15 21:45:30 +08:00
|
|
|
u8 scb_index;
|
|
|
|
struct orc_scb *scb;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
/* Check if we have an SCB queued for servicing */
|
|
|
|
if (inb(host->base + ORC_RQUEUECNT) == 0)
|
|
|
|
return IRQ_NONE;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
do {
|
2007-06-15 21:45:30 +08:00
|
|
|
/* Get the SCB index of the SCB to service */
|
|
|
|
scb_index = inb(host->base + ORC_RQUEUE);
|
|
|
|
|
|
|
|
/* Translate it back to a host pointer */
|
|
|
|
scb = (struct orc_scb *) ((unsigned long) host->scb_virt + (unsigned long) (sizeof(struct orc_scb) * scb_index));
|
|
|
|
scb->status = 0x0;
|
|
|
|
/* Process the SCB */
|
|
|
|
inia100_scb_handler(host, scb);
|
|
|
|
} while (inb(host->base + ORC_RQUEUECNT));
|
|
|
|
return IRQ_HANDLED;
|
2005-04-17 06:20:36 +08:00
|
|
|
} /* End of I1060Interrupt() */
|
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
/**
|
|
|
|
* inia100_build_scb - build SCB
|
|
|
|
* @host: host owing the control block
|
|
|
|
* @scb: control block to use
|
|
|
|
* @cmd: Mid layer command
|
|
|
|
*
|
|
|
|
* Build a host adapter control block from the SCSI mid layer command
|
|
|
|
*/
|
|
|
|
|
2008-07-16 05:19:55 +08:00
|
|
|
static int inia100_build_scb(struct orc_host * host, struct orc_scb * scb, struct scsi_cmnd * cmd)
|
2005-04-17 06:20:36 +08:00
|
|
|
{ /* Create corresponding SCB */
|
2007-05-14 19:26:37 +08:00
|
|
|
struct scatterlist *sg;
|
2007-06-15 21:45:30 +08:00
|
|
|
struct orc_sgent *sgent; /* Pointer to SG list */
|
2005-04-17 06:20:36 +08:00
|
|
|
int i, count_sg;
|
2007-06-15 21:45:30 +08:00
|
|
|
struct orc_extended_scb *escb;
|
|
|
|
|
|
|
|
/* Links between the escb, scb and Linux scsi midlayer cmd */
|
|
|
|
escb = scb->escb;
|
|
|
|
escb->srb = cmd;
|
|
|
|
sgent = NULL;
|
|
|
|
|
|
|
|
/* Set up the SCB to do a SCSI command block */
|
|
|
|
scb->opcode = ORC_EXECSCSI;
|
|
|
|
scb->flags = SCF_NO_DCHK; /* Clear done bit */
|
|
|
|
scb->target = cmd->device->id;
|
|
|
|
scb->lun = cmd->device->lun;
|
|
|
|
scb->reserved0 = 0;
|
|
|
|
scb->reserved1 = 0;
|
2008-07-16 05:15:41 +08:00
|
|
|
scb->sg_len = cpu_to_le32(0);
|
2007-06-15 21:45:30 +08:00
|
|
|
|
2008-07-16 05:15:41 +08:00
|
|
|
scb->xferlen = cpu_to_le32((u32) scsi_bufflen(cmd));
|
2007-06-15 21:45:30 +08:00
|
|
|
sgent = (struct orc_sgent *) & escb->sglist[0];
|
|
|
|
|
|
|
|
count_sg = scsi_dma_map(cmd);
|
2008-07-16 05:19:55 +08:00
|
|
|
if (count_sg < 0)
|
|
|
|
return count_sg;
|
2008-07-16 05:18:38 +08:00
|
|
|
BUG_ON(count_sg > TOTAL_SG_ENTRY);
|
2007-06-15 21:45:30 +08:00
|
|
|
|
|
|
|
/* Build the scatter gather lists */
|
2007-05-14 19:26:37 +08:00
|
|
|
if (count_sg) {
|
2008-07-16 05:15:41 +08:00
|
|
|
scb->sg_len = cpu_to_le32((u32) (count_sg * 8));
|
2007-06-15 21:45:30 +08:00
|
|
|
scsi_for_each_sg(cmd, sg, count_sg, i) {
|
2008-07-16 05:15:41 +08:00
|
|
|
sgent->base = cpu_to_le32((u32) sg_dma_address(sg));
|
|
|
|
sgent->length = cpu_to_le32((u32) sg_dma_len(sg));
|
2007-06-15 21:45:30 +08:00
|
|
|
sgent++;
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
2007-05-14 19:26:37 +08:00
|
|
|
} else {
|
2008-07-16 05:15:41 +08:00
|
|
|
scb->sg_len = cpu_to_le32(0);
|
|
|
|
sgent->base = cpu_to_le32(0);
|
|
|
|
sgent->length = cpu_to_le32(0);
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
2008-07-16 05:15:41 +08:00
|
|
|
scb->sg_addr = (u32) scb->sense_addr; /* sense_addr is already little endian */
|
2007-06-15 21:45:30 +08:00
|
|
|
scb->hastat = 0;
|
|
|
|
scb->tastat = 0;
|
|
|
|
scb->link = 0xFF;
|
|
|
|
scb->sense_len = SENSE_SIZE;
|
|
|
|
scb->cdb_len = cmd->cmd_len;
|
|
|
|
if (scb->cdb_len >= IMAX_CDB) {
|
2015-07-30 02:19:45 +08:00
|
|
|
printk("max cdb length= %x\n", cmd->cmd_len);
|
2007-06-15 21:45:30 +08:00
|
|
|
scb->cdb_len = IMAX_CDB;
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
2014-06-25 21:27:36 +08:00
|
|
|
scb->ident = (u8)(cmd->device->lun & 0xff) | DISC_ALLOW;
|
2007-06-15 21:45:30 +08:00
|
|
|
if (cmd->device->tagged_supported) { /* Tag Support */
|
|
|
|
scb->tag_msg = SIMPLE_QUEUE_TAG; /* Do simple tag only */
|
2005-04-17 06:20:36 +08:00
|
|
|
} else {
|
2007-06-15 21:45:30 +08:00
|
|
|
scb->tag_msg = 0; /* No tag support */
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
2008-04-30 16:19:47 +08:00
|
|
|
memcpy(scb->cdb, cmd->cmnd, scb->cdb_len);
|
2008-07-16 05:19:55 +08:00
|
|
|
return 0;
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
/**
|
2021-03-17 17:12:05 +08:00
|
|
|
* inia100_queue_lck - queue command with host
|
2007-06-15 21:45:30 +08:00
|
|
|
* @cmd: Command block
|
|
|
|
* @done: Completion function
|
|
|
|
*
|
|
|
|
* Called by the mid layer to queue a command. Process the command
|
|
|
|
* block, build the host specific scb structures and if there is room
|
|
|
|
* queue the command down to the controller
|
|
|
|
*/
|
|
|
|
|
2010-11-16 15:10:29 +08:00
|
|
|
static int inia100_queue_lck(struct scsi_cmnd * cmd, void (*done) (struct scsi_cmnd *))
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
2007-06-15 21:45:30 +08:00
|
|
|
struct orc_scb *scb;
|
|
|
|
struct orc_host *host; /* Point to Host adapter control block */
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
host = (struct orc_host *) cmd->device->host->hostdata;
|
2005-04-17 06:20:36 +08:00
|
|
|
/* Get free SCSI control block */
|
2007-06-15 21:45:30 +08:00
|
|
|
if ((scb = orc_alloc_scb(host)) == NULL)
|
2005-04-17 06:20:36 +08:00
|
|
|
return SCSI_MLQUEUE_HOST_BUSY;
|
|
|
|
|
2008-07-16 05:19:55 +08:00
|
|
|
if (inia100_build_scb(host, scb, cmd)) {
|
|
|
|
orc_release_scb(host, scb);
|
|
|
|
return SCSI_MLQUEUE_HOST_BUSY;
|
|
|
|
}
|
2007-06-15 21:45:30 +08:00
|
|
|
orc_exec_scb(host, scb); /* Start execute SCB */
|
|
|
|
return 0;
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
|
2010-11-16 15:10:29 +08:00
|
|
|
static DEF_SCSI_QCMD(inia100_queue)
|
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
/*****************************************************************************
|
|
|
|
Function name : inia100_abort
|
|
|
|
Description : Abort a queued command.
|
|
|
|
(commands that are on the bus can't be aborted easily)
|
2007-06-15 21:45:30 +08:00
|
|
|
Input : host - Pointer to host adapter structure
|
2005-04-17 06:20:36 +08:00
|
|
|
Output : None.
|
|
|
|
Return : pSRB - Pointer to SCSI request block.
|
|
|
|
*****************************************************************************/
|
2007-06-15 21:45:30 +08:00
|
|
|
static int inia100_abort(struct scsi_cmnd * cmd)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
2007-06-15 21:45:30 +08:00
|
|
|
struct orc_host *host;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
host = (struct orc_host *) cmd->device->host->hostdata;
|
|
|
|
return inia100_abort_cmd(host, cmd);
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/*****************************************************************************
|
|
|
|
Function name : inia100_reset
|
|
|
|
Description : Reset registers, reset a hanging bus and
|
|
|
|
kill active and disconnected commands for target w/o soft reset
|
2007-06-15 21:45:30 +08:00
|
|
|
Input : host - Pointer to host adapter structure
|
2005-04-17 06:20:36 +08:00
|
|
|
Output : None.
|
|
|
|
Return : pSRB - Pointer to SCSI request block.
|
|
|
|
*****************************************************************************/
|
2007-06-15 21:45:30 +08:00
|
|
|
static int inia100_bus_reset(struct scsi_cmnd * cmd)
|
2005-04-17 06:20:36 +08:00
|
|
|
{ /* I need Host Control Block Information */
|
2007-06-15 21:45:30 +08:00
|
|
|
struct orc_host *host;
|
|
|
|
host = (struct orc_host *) cmd->device->host->hostdata;
|
|
|
|
return orc_reset_scsi_bus(host);
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/*****************************************************************************
|
|
|
|
Function name : inia100_device_reset
|
|
|
|
Description : Reset the device
|
2007-06-15 21:45:30 +08:00
|
|
|
Input : host - Pointer to host adapter structure
|
2005-04-17 06:20:36 +08:00
|
|
|
Output : None.
|
|
|
|
Return : pSRB - Pointer to SCSI request block.
|
|
|
|
*****************************************************************************/
|
2007-06-15 21:45:30 +08:00
|
|
|
static int inia100_device_reset(struct scsi_cmnd * cmd)
|
2005-04-17 06:20:36 +08:00
|
|
|
{ /* I need Host Control Block Information */
|
2007-06-15 21:45:30 +08:00
|
|
|
struct orc_host *host;
|
|
|
|
host = (struct orc_host *) cmd->device->host->hostdata;
|
|
|
|
return orc_device_reset(host, cmd, scmd_id(cmd));
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
}
|
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
/**
|
|
|
|
* inia100_scb_handler - interrupt callback
|
|
|
|
* @host: Host causing the interrupt
|
|
|
|
* @scb: SCB the controller returned as needing processing
|
|
|
|
*
|
|
|
|
* Perform completion processing on a control block. Do the conversions
|
|
|
|
* from host to SCSI midlayer error coding, save any sense data and
|
|
|
|
* the complete with the midlayer and recycle the scb.
|
|
|
|
*/
|
|
|
|
|
|
|
|
static void inia100_scb_handler(struct orc_host *host, struct orc_scb *scb)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
2007-06-15 21:45:30 +08:00
|
|
|
struct scsi_cmnd *cmd; /* Pointer to SCSI request block */
|
|
|
|
struct orc_extended_scb *escb;
|
|
|
|
|
|
|
|
escb = scb->escb;
|
|
|
|
if ((cmd = (struct scsi_cmnd *) escb->srb) == NULL) {
|
|
|
|
printk(KERN_ERR "inia100_scb_handler: SRB pointer is empty\n");
|
|
|
|
orc_release_scb(host, scb); /* Release SCB for current channel */
|
2005-04-17 06:20:36 +08:00
|
|
|
return;
|
|
|
|
}
|
2007-06-15 21:45:30 +08:00
|
|
|
escb->srb = NULL;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
switch (scb->hastat) {
|
2005-04-17 06:20:36 +08:00
|
|
|
case 0x0:
|
|
|
|
case 0xa: /* Linked command complete without error and linked normally */
|
|
|
|
case 0xb: /* Linked command complete without error interrupt generated */
|
2007-06-15 21:45:30 +08:00
|
|
|
scb->hastat = 0;
|
2005-04-17 06:20:36 +08:00
|
|
|
break;
|
|
|
|
|
|
|
|
case 0x11: /* Selection time out-The initiator selection or target
|
|
|
|
reselection was not complete within the SCSI Time out period */
|
2007-06-15 21:45:30 +08:00
|
|
|
scb->hastat = DID_TIME_OUT;
|
2005-04-17 06:20:36 +08:00
|
|
|
break;
|
|
|
|
|
|
|
|
case 0x14: /* Target bus phase sequence failure-An invalid bus phase or bus
|
|
|
|
phase sequence was requested by the target. The host adapter
|
|
|
|
will generate a SCSI Reset Condition, notifying the host with
|
|
|
|
a SCRD interrupt */
|
2007-06-15 21:45:30 +08:00
|
|
|
scb->hastat = DID_RESET;
|
2005-04-17 06:20:36 +08:00
|
|
|
break;
|
|
|
|
|
|
|
|
case 0x1a: /* SCB Aborted. 07/21/98 */
|
2007-06-15 21:45:30 +08:00
|
|
|
scb->hastat = DID_ABORT;
|
2005-04-17 06:20:36 +08:00
|
|
|
break;
|
|
|
|
|
|
|
|
case 0x12: /* Data overrun/underrun-The target attempted to transfer more data
|
|
|
|
than was allocated by the Data Length field or the sum of the
|
|
|
|
Scatter / Gather Data Length fields. */
|
|
|
|
case 0x13: /* Unexpected bus free-The target dropped the SCSI BSY at an unexpected time. */
|
|
|
|
case 0x16: /* Invalid CCB Operation Code-The first byte of the CCB was invalid. */
|
|
|
|
|
|
|
|
default:
|
2007-06-15 21:45:30 +08:00
|
|
|
printk(KERN_DEBUG "inia100: %x %x\n", scb->hastat, scb->tastat);
|
|
|
|
scb->hastat = DID_ERROR; /* Couldn't find any better */
|
2005-04-17 06:20:36 +08:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
if (scb->tastat == 2) { /* Check condition */
|
|
|
|
memcpy((unsigned char *) &cmd->sense_buffer[0],
|
|
|
|
(unsigned char *) &escb->sglist[0], SENSE_SIZE);
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
2007-06-15 21:45:30 +08:00
|
|
|
cmd->result = scb->tastat | (scb->hastat << 16);
|
|
|
|
scsi_dma_unmap(cmd);
|
2021-10-08 04:28:09 +08:00
|
|
|
scsi_done(cmd); /* Notify system DONE */
|
2007-06-15 21:45:30 +08:00
|
|
|
orc_release_scb(host, scb); /* Release SCB for current channel */
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
/**
|
|
|
|
* inia100_intr - interrupt handler
|
|
|
|
* @irqno: Interrupt value
|
|
|
|
* @devid: Host adapter
|
|
|
|
*
|
|
|
|
* Entry point for IRQ handling. All the real work is performed
|
|
|
|
* by orc_interrupt.
|
2005-04-17 06:20:36 +08:00
|
|
|
*/
|
IRQ: Maintain regs pointer globally rather than passing to IRQ handlers
Maintain a per-CPU global "struct pt_regs *" variable which can be used instead
of passing regs around manually through all ~1800 interrupt handlers in the
Linux kernel.
The regs pointer is used in few places, but it potentially costs both stack
space and code to pass it around. On the FRV arch, removing the regs parameter
from all the genirq function results in a 20% speed up of the IRQ exit path
(ie: from leaving timer_interrupt() to leaving do_IRQ()).
Where appropriate, an arch may override the generic storage facility and do
something different with the variable. On FRV, for instance, the address is
maintained in GR28 at all times inside the kernel as part of general exception
handling.
Having looked over the code, it appears that the parameter may be handed down
through up to twenty or so layers of functions. Consider a USB character
device attached to a USB hub, attached to a USB controller that posts its
interrupts through a cascaded auxiliary interrupt controller. A character
device driver may want to pass regs to the sysrq handler through the input
layer which adds another few layers of parameter passing.
I've build this code with allyesconfig for x86_64 and i386. I've runtested the
main part of the code on FRV and i386, though I can't test most of the drivers.
I've also done partial conversion for powerpc and MIPS - these at least compile
with minimal configurations.
This will affect all archs. Mostly the changes should be relatively easy.
Take do_IRQ(), store the regs pointer at the beginning, saving the old one:
struct pt_regs *old_regs = set_irq_regs(regs);
And put the old one back at the end:
set_irq_regs(old_regs);
Don't pass regs through to generic_handle_irq() or __do_IRQ().
In timer_interrupt(), this sort of change will be necessary:
- update_process_times(user_mode(regs));
- profile_tick(CPU_PROFILING, regs);
+ update_process_times(user_mode(get_irq_regs()));
+ profile_tick(CPU_PROFILING);
I'd like to move update_process_times()'s use of get_irq_regs() into itself,
except that i386, alone of the archs, uses something other than user_mode().
Some notes on the interrupt handling in the drivers:
(*) input_dev() is now gone entirely. The regs pointer is no longer stored in
the input_dev struct.
(*) finish_unlinks() in drivers/usb/host/ohci-q.c needs checking. It does
something different depending on whether it's been supplied with a regs
pointer or not.
(*) Various IRQ handler function pointers have been moved to type
irq_handler_t.
Signed-Off-By: David Howells <dhowells@redhat.com>
(cherry picked from 1b16e7ac850969f38b375e511e3fa2f474a33867 commit)
2006-10-05 21:55:46 +08:00
|
|
|
static irqreturn_t inia100_intr(int irqno, void *devid)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
2007-06-15 21:45:30 +08:00
|
|
|
struct Scsi_Host *shost = (struct Scsi_Host *)devid;
|
|
|
|
struct orc_host *host = (struct orc_host *)shost->hostdata;
|
2005-04-17 06:20:36 +08:00
|
|
|
unsigned long flags;
|
2007-06-15 21:45:30 +08:00
|
|
|
irqreturn_t res;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
spin_lock_irqsave(shost->host_lock, flags);
|
|
|
|
res = orc_interrupt(host);
|
|
|
|
spin_unlock_irqrestore(shost->host_lock, flags);
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
return res;
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static struct scsi_host_template inia100_template = {
|
|
|
|
.proc_name = "inia100",
|
|
|
|
.name = inia100_REVID,
|
|
|
|
.queuecommand = inia100_queue,
|
|
|
|
.eh_abort_handler = inia100_abort,
|
|
|
|
.eh_bus_reset_handler = inia100_bus_reset,
|
|
|
|
.eh_device_reset_handler = inia100_device_reset,
|
|
|
|
.can_queue = 1,
|
|
|
|
.this_id = 1,
|
|
|
|
.sg_tablesize = SG_ALL,
|
|
|
|
};
|
|
|
|
|
2012-12-22 05:08:55 +08:00
|
|
|
static int inia100_probe_one(struct pci_dev *pdev,
|
|
|
|
const struct pci_device_id *id)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
|
|
|
struct Scsi_Host *shost;
|
2007-06-15 21:45:30 +08:00
|
|
|
struct orc_host *host;
|
2005-04-17 06:20:36 +08:00
|
|
|
unsigned long port, bios;
|
|
|
|
int error = -ENODEV;
|
|
|
|
u32 sz;
|
|
|
|
|
|
|
|
if (pci_enable_device(pdev))
|
|
|
|
goto out;
|
2018-10-11 00:09:42 +08:00
|
|
|
if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(32))) {
|
2005-04-17 06:20:36 +08:00
|
|
|
printk(KERN_WARNING "Unable to set 32bit DMA "
|
|
|
|
"on inia100 adapter, ignoring.\n");
|
|
|
|
goto out_disable_device;
|
|
|
|
}
|
|
|
|
|
|
|
|
pci_set_master(pdev);
|
|
|
|
|
|
|
|
port = pci_resource_start(pdev, 0);
|
|
|
|
if (!request_region(port, 256, "inia100")) {
|
|
|
|
printk(KERN_WARNING "inia100: io port 0x%lx, is busy.\n", port);
|
|
|
|
goto out_disable_device;
|
|
|
|
}
|
|
|
|
|
2007-02-18 02:18:52 +08:00
|
|
|
/* <02> read from base address + 0x50 offset to get the bios value. */
|
2007-06-15 21:45:30 +08:00
|
|
|
bios = inw(port + 0x50);
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
shost = scsi_host_alloc(&inia100_template, sizeof(struct orc_host));
|
2005-04-17 06:20:36 +08:00
|
|
|
if (!shost)
|
|
|
|
goto out_release_region;
|
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
host = (struct orc_host *)shost->hostdata;
|
|
|
|
host->pdev = pdev;
|
|
|
|
host->base = port;
|
|
|
|
host->BIOScfg = bios;
|
|
|
|
spin_lock_init(&host->allocation_lock);
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
/* Get total memory needed for SCB */
|
2007-06-15 21:45:30 +08:00
|
|
|
sz = ORC_MAXQUEUE * sizeof(struct orc_scb);
|
cross-tree: phase out dma_zalloc_coherent()
We already need to zero out memory for dma_alloc_coherent(), as such
using dma_zalloc_coherent() is superflous. Phase it out.
This change was generated with the following Coccinelle SmPL patch:
@ replace_dma_zalloc_coherent @
expression dev, size, data, handle, flags;
@@
-dma_zalloc_coherent(dev, size, handle, flags)
+dma_alloc_coherent(dev, size, handle, flags)
Suggested-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Luis Chamberlain <mcgrof@kernel.org>
[hch: re-ran the script on the latest tree]
Signed-off-by: Christoph Hellwig <hch@lst.de>
2019-01-04 16:23:09 +08:00
|
|
|
host->scb_virt = dma_alloc_coherent(&pdev->dev, sz, &host->scb_phys,
|
|
|
|
GFP_KERNEL);
|
2007-06-15 21:45:30 +08:00
|
|
|
if (!host->scb_virt) {
|
2005-04-17 06:20:36 +08:00
|
|
|
printk("inia100: SCB memory allocation error\n");
|
|
|
|
goto out_host_put;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Get total memory needed for ESCB */
|
2007-06-15 21:45:30 +08:00
|
|
|
sz = ORC_MAXQUEUE * sizeof(struct orc_extended_scb);
|
cross-tree: phase out dma_zalloc_coherent()
We already need to zero out memory for dma_alloc_coherent(), as such
using dma_zalloc_coherent() is superflous. Phase it out.
This change was generated with the following Coccinelle SmPL patch:
@ replace_dma_zalloc_coherent @
expression dev, size, data, handle, flags;
@@
-dma_zalloc_coherent(dev, size, handle, flags)
+dma_alloc_coherent(dev, size, handle, flags)
Suggested-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Luis Chamberlain <mcgrof@kernel.org>
[hch: re-ran the script on the latest tree]
Signed-off-by: Christoph Hellwig <hch@lst.de>
2019-01-04 16:23:09 +08:00
|
|
|
host->escb_virt = dma_alloc_coherent(&pdev->dev, sz, &host->escb_phys,
|
|
|
|
GFP_KERNEL);
|
2007-06-15 21:45:30 +08:00
|
|
|
if (!host->escb_virt) {
|
2005-04-17 06:20:36 +08:00
|
|
|
printk("inia100: ESCB memory allocation error\n");
|
|
|
|
goto out_free_scb_array;
|
|
|
|
}
|
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
if (init_orchid(host)) { /* Initialize orchid chip */
|
2005-04-17 06:20:36 +08:00
|
|
|
printk("inia100: initial orchid fail!!\n");
|
|
|
|
goto out_free_escb_array;
|
|
|
|
}
|
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
shost->io_port = host->base;
|
2005-04-17 06:20:36 +08:00
|
|
|
shost->n_io_port = 0xff;
|
|
|
|
shost->can_queue = ORC_MAXQUEUE;
|
|
|
|
shost->unique_id = shost->io_port;
|
2007-06-15 21:45:30 +08:00
|
|
|
shost->max_id = host->max_targets;
|
2005-04-17 06:20:36 +08:00
|
|
|
shost->max_lun = 16;
|
2007-06-15 21:45:30 +08:00
|
|
|
shost->irq = pdev->irq;
|
|
|
|
shost->this_id = host->scsi_id; /* Assign HCS index */
|
2005-04-17 06:20:36 +08:00
|
|
|
shost->sg_tablesize = TOTAL_SG_ENTRY;
|
|
|
|
|
|
|
|
/* Initial orc chip */
|
2006-07-02 10:29:42 +08:00
|
|
|
error = request_irq(pdev->irq, inia100_intr, IRQF_SHARED,
|
2005-04-17 06:20:36 +08:00
|
|
|
"inia100", shost);
|
|
|
|
if (error < 0) {
|
|
|
|
printk(KERN_WARNING "inia100: unable to get irq %d\n",
|
|
|
|
pdev->irq);
|
|
|
|
goto out_free_escb_array;
|
|
|
|
}
|
|
|
|
|
|
|
|
pci_set_drvdata(pdev, shost);
|
|
|
|
|
|
|
|
error = scsi_add_host(shost, &pdev->dev);
|
|
|
|
if (error)
|
|
|
|
goto out_free_irq;
|
|
|
|
|
|
|
|
scsi_scan_host(shost);
|
|
|
|
return 0;
|
|
|
|
|
2007-06-15 21:45:30 +08:00
|
|
|
out_free_irq:
|
2005-04-17 06:20:36 +08:00
|
|
|
free_irq(shost->irq, shost);
|
2007-06-15 21:45:30 +08:00
|
|
|
out_free_escb_array:
|
2018-10-11 00:09:42 +08:00
|
|
|
dma_free_coherent(&pdev->dev,
|
|
|
|
ORC_MAXQUEUE * sizeof(struct orc_extended_scb),
|
2007-06-15 21:45:30 +08:00
|
|
|
host->escb_virt, host->escb_phys);
|
|
|
|
out_free_scb_array:
|
2018-10-11 00:09:42 +08:00
|
|
|
dma_free_coherent(&pdev->dev,
|
|
|
|
ORC_MAXQUEUE * sizeof(struct orc_scb),
|
2007-06-15 21:45:30 +08:00
|
|
|
host->scb_virt, host->scb_phys);
|
|
|
|
out_host_put:
|
2005-04-17 06:20:36 +08:00
|
|
|
scsi_host_put(shost);
|
2007-06-15 21:45:30 +08:00
|
|
|
out_release_region:
|
2005-04-17 06:20:36 +08:00
|
|
|
release_region(port, 256);
|
2007-06-15 21:45:30 +08:00
|
|
|
out_disable_device:
|
2005-04-17 06:20:36 +08:00
|
|
|
pci_disable_device(pdev);
|
2007-06-15 21:45:30 +08:00
|
|
|
out:
|
2005-04-17 06:20:36 +08:00
|
|
|
return error;
|
|
|
|
}
|
|
|
|
|
2012-12-22 05:08:55 +08:00
|
|
|
static void inia100_remove_one(struct pci_dev *pdev)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
|
|
|
struct Scsi_Host *shost = pci_get_drvdata(pdev);
|
2007-06-15 21:45:30 +08:00
|
|
|
struct orc_host *host = (struct orc_host *)shost->hostdata;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
scsi_remove_host(shost);
|
|
|
|
|
|
|
|
free_irq(shost->irq, shost);
|
2018-10-11 00:09:42 +08:00
|
|
|
dma_free_coherent(&pdev->dev,
|
|
|
|
ORC_MAXQUEUE * sizeof(struct orc_extended_scb),
|
2007-06-15 21:45:30 +08:00
|
|
|
host->escb_virt, host->escb_phys);
|
2018-10-11 00:09:42 +08:00
|
|
|
dma_free_coherent(&pdev->dev,
|
|
|
|
ORC_MAXQUEUE * sizeof(struct orc_scb),
|
2007-06-15 21:45:30 +08:00
|
|
|
host->scb_virt, host->scb_phys);
|
2005-04-17 06:20:36 +08:00
|
|
|
release_region(shost->io_port, 256);
|
|
|
|
|
|
|
|
scsi_host_put(shost);
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct pci_device_id inia100_pci_tbl[] = {
|
|
|
|
{PCI_VENDOR_ID_INIT, 0x1060, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
|
|
|
|
{0,}
|
|
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(pci, inia100_pci_tbl);
|
|
|
|
|
|
|
|
static struct pci_driver inia100_pci_driver = {
|
|
|
|
.name = "inia100",
|
|
|
|
.id_table = inia100_pci_tbl,
|
|
|
|
.probe = inia100_probe_one,
|
2012-12-22 05:08:55 +08:00
|
|
|
.remove = inia100_remove_one,
|
2005-04-17 06:20:36 +08:00
|
|
|
};
|
|
|
|
|
2018-04-21 18:58:35 +08:00
|
|
|
module_pci_driver(inia100_pci_driver);
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
MODULE_DESCRIPTION("Initio A100U2W SCSI driver");
|
|
|
|
MODULE_AUTHOR("Initio Corporation");
|
|
|
|
MODULE_LICENSE("Dual BSD/GPL");
|