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OpenCloudOS-Kernel/arch/arm/boot/dts/omap4.dtsi

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arm/dts: Add initial device tree support for OMAP4 SoC Add initial device-tree support for OMAP4 SoC. This is based on the original panda board patch done by Manju: http://permalink.gmane.org/gmane.linux.ports.arm.omap/60393 Add the generic GIC interrupt-controller from ARM. Add an empty "soc" node to contain non memory mapped IPs (DSP, MPU, IPU...). Note: Since reg, irq and dma are provided by hwmod for the moment, these attributes will not be present at all in DTS to highlight the gap. They will be added as soon as dma bindings will be there and drivers will be adapted. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: G, Manjunath Kondaiah <manjugk@ti.com>
2011-08-09 23:15:17 +08:00
/*
* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
ARM: dts: OMAP2+: Use existing constants for GPIOs Use standard GPIO constants to enhance the readability of DT GPIOs. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:56 +08:00
#include <dt-bindings/gpio/gpio.h>
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
#include <dt-bindings/interrupt-controller/arm-gic.h>
ARM: dts: OMAP2+: Use pinctrl constants Using constants for pinctrl allows a better readability, and removes redundancy with comments. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:59 +08:00
#include <dt-bindings/pinctrl/omap.h>
arm/dts: Add initial device tree support for OMAP4 SoC Add initial device-tree support for OMAP4 SoC. This is based on the original panda board patch done by Manju: http://permalink.gmane.org/gmane.linux.ports.arm.omap/60393 Add the generic GIC interrupt-controller from ARM. Add an empty "soc" node to contain non memory mapped IPs (DSP, MPU, IPU...). Note: Since reg, irq and dma are provided by hwmod for the moment, these attributes will not be present at all in DTS to highlight the gap. They will be added as soon as dma bindings will be there and drivers will be adapted. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: G, Manjunath Kondaiah <manjugk@ti.com>
2011-08-09 23:15:17 +08:00
ARM: dts: OMAP2+: Use #include for all device trees Replace /include/ by #include for OMAP2+ DT, in order to use the C pre-processor, making use of #define features possible. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:55 +08:00
#include "skeleton.dtsi"
arm/dts: Add initial device tree support for OMAP4 SoC Add initial device-tree support for OMAP4 SoC. This is based on the original panda board patch done by Manju: http://permalink.gmane.org/gmane.linux.ports.arm.omap/60393 Add the generic GIC interrupt-controller from ARM. Add an empty "soc" node to contain non memory mapped IPs (DSP, MPU, IPU...). Note: Since reg, irq and dma are provided by hwmod for the moment, these attributes will not be present at all in DTS to highlight the gap. They will be added as soon as dma bindings will be there and drivers will be adapted. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: G, Manjunath Kondaiah <manjugk@ti.com>
2011-08-09 23:15:17 +08:00
/ {
compatible = "ti,omap4430", "ti,omap4";
ARM: omap: convert wakeupgen to stacked domains OMAP4/5 has been (ab)using the gic_arch_extn to provide wakeup from suspend, and it makes a lot of sense to convert this code to use stacked domains instead. This patch does just this, updating the DT files to actually reflect what the HW provides. BIG FAT WARNING: because the DTs were so far lying by not exposing the WUGEN HW block, kernels with this patch applied won't have any suspend-resume facility when booted with old DTs, and old kernels with updated DTs won't even boot. On a platform with this patch applied, the system looks like this: root@bacon-fat:~# cat /proc/interrupts CPU0 CPU1 16: 0 0 WUGEN 37 gp_timer 19: 233799 155916 GIC 27 arch_timer 23: 0 0 WUGEN 9 l3-dbg-irq 24: 1 0 WUGEN 10 l3-app-irq 27: 282 0 WUGEN 13 omap-dma-engine 44: 0 0 4ae10000.gpio 13 DMA 294: 0 0 WUGEN 20 gpmc 297: 506 0 WUGEN 56 48070000.i2c 298: 0 0 WUGEN 57 48072000.i2c 299: 0 0 WUGEN 61 48060000.i2c 300: 0 0 WUGEN 62 4807a000.i2c 301: 8 0 WUGEN 60 4807c000.i2c 308: 2439 0 WUGEN 74 OMAP UART2 312: 362 0 WUGEN 83 mmc2 313: 502 0 WUGEN 86 mmc0 314: 13 0 WUGEN 94 mmc1 350: 0 0 PRCM pinctrl, pinctrl 406: 35155709 0 GIC 109 ehci_hcd:usb1 407: 0 0 WUGEN 7 palmas 409: 0 0 WUGEN 119 twl6040 410: 0 0 twl6040 5 twl6040_irq_ready 411: 0 0 twl6040 0 twl6040_irq_th IPI0: 0 1 CPU wakeup interrupts IPI1: 0 0 Timer broadcast interrupts IPI2: 95334 902334 Rescheduling interrupts IPI3: 0 0 Function call interrupts IPI4: 479 648 Single function call interrupts IPI5: 0 0 CPU stop interrupts IPI6: 0 0 IRQ work interrupts IPI7: 0 0 completion interrupts Err: 0 Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Link: https://lkml.kernel.org/r/1426088629-15377-8-git-send-email-marc.zyngier@arm.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2015-03-11 23:43:49 +08:00
interrupt-parent = <&wakeupgen>;
arm/dts: Add initial device tree support for OMAP4 SoC Add initial device-tree support for OMAP4 SoC. This is based on the original panda board patch done by Manju: http://permalink.gmane.org/gmane.linux.ports.arm.omap/60393 Add the generic GIC interrupt-controller from ARM. Add an empty "soc" node to contain non memory mapped IPs (DSP, MPU, IPU...). Note: Since reg, irq and dma are provided by hwmod for the moment, these attributes will not be present at all in DTS to highlight the gap. They will be added as soon as dma bindings will be there and drivers will be adapted. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: G, Manjunath Kondaiah <manjugk@ti.com>
2011-08-09 23:15:17 +08:00
aliases {
ARM: dts: OMAP3+: Add i2c aliases Currently, on OMAP5, i2c1 and i2c5 defer probe due to pinctrl dependencies. This changes the i2c ID each bus is registered with in i2c-dev interface. As a result of this, many userspace tools break and there is no consistent manner to fix the same if the i2c dev interface have no consistent numbering. Since this could happen for other OMAP derivatives, provide i2c alias for all OMAP3+ SoCs to allow ordering the i2c devices correctly. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-10-17 04:21:03 +08:00
i2c0 = &i2c1;
i2c1 = &i2c2;
i2c2 = &i2c3;
i2c3 = &i2c4;
ARM: omap: pass minimal SoC/board data for UART from dt Pass minimal data needed for console boot, from dt, for OMAP4 panda/sdp and OMAP3 beagle boards, and get rid of the static initialization from generic board file. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Reviewed-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-12-14 19:55:46 +08:00
serial0 = &uart1;
serial1 = &uart2;
serial2 = &uart3;
serial3 = &uart4;
arm/dts: Add initial device tree support for OMAP4 SoC Add initial device-tree support for OMAP4 SoC. This is based on the original panda board patch done by Manju: http://permalink.gmane.org/gmane.linux.ports.arm.omap/60393 Add the generic GIC interrupt-controller from ARM. Add an empty "soc" node to contain non memory mapped IPs (DSP, MPU, IPU...). Note: Since reg, irq and dma are provided by hwmod for the moment, these attributes will not be present at all in DTS to highlight the gap. They will be added as soon as dma bindings will be there and drivers will be adapted. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: G, Manjunath Kondaiah <manjugk@ti.com>
2011-08-09 23:15:17 +08:00
};
arm/dts: OMAP3+: Add mpu, dsp and iva nodes Add nodes for devices used by PM code (mpu, dsp, iva). Add a cpus node as well as recommended in the DT spec. Remove mpu, dsp, iva devices init if is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: Kevin Hilman <khilman@ti.com>
2011-08-16 17:49:08 +08:00
cpus {
ARM: dts: omap: cpus/cpu nodes dts updates This patch updates the in-kernel dts files according to the latest cpus and cpu bindings updates for ARM. Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2013-04-19 01:35:59 +08:00
#address-cells = <1>;
#size-cells = <0>;
arm/dts: OMAP3+: Add mpu, dsp and iva nodes Add nodes for devices used by PM code (mpu, dsp, iva). Add a cpus node as well as recommended in the DT spec. Remove mpu, dsp, iva devices init if is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: Kevin Hilman <khilman@ti.com>
2011-08-16 17:49:08 +08:00
cpu@0 {
compatible = "arm,cortex-a9";
ARM: dts: omap: cpus/cpu nodes dts updates This patch updates the in-kernel dts files according to the latest cpus and cpu bindings updates for ARM. Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2013-04-19 01:35:59 +08:00
device_type = "cpu";
ARM: OMAP4: Add L2 Cache Controller in Device Tree Provide PL310 Level 2 Cache Controller Device Tree support for OMAP4 based devices. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-07-04 20:27:34 +08:00
next-level-cache = <&L2>;
ARM: dts: omap: cpus/cpu nodes dts updates This patch updates the in-kernel dts files according to the latest cpus and cpu bindings updates for ARM. Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2013-04-19 01:35:59 +08:00
reg = <0x0>;
ARM: dts: OMAP3+: add clock nodes for CPU OMAP34xx, AM3517 and OMAP36xx platforms use dpll1 clock. OMAP443x, OMAP446x, OMAP447x, OMAP5, DRA7, AM43xx platforms use dpll_mpu clock. Latency used is the generic latency defined in omap-cpufreq driver. Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Acked-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-01-30 02:19:17 +08:00
clocks = <&dpll_mpu_ck>;
clock-names = "cpu";
clock-latency = <300000>; /* From omap-cpufreq driver */
arm/dts: OMAP3+: Add mpu, dsp and iva nodes Add nodes for devices used by PM code (mpu, dsp, iva). Add a cpus node as well as recommended in the DT spec. Remove mpu, dsp, iva devices init if is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: Kevin Hilman <khilman@ti.com>
2011-08-16 17:49:08 +08:00
};
cpu@1 {
compatible = "arm,cortex-a9";
ARM: dts: omap: cpus/cpu nodes dts updates This patch updates the in-kernel dts files according to the latest cpus and cpu bindings updates for ARM. Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2013-04-19 01:35:59 +08:00
device_type = "cpu";
ARM: OMAP4: Add L2 Cache Controller in Device Tree Provide PL310 Level 2 Cache Controller Device Tree support for OMAP4 based devices. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-07-04 20:27:34 +08:00
next-level-cache = <&L2>;
ARM: dts: omap: cpus/cpu nodes dts updates This patch updates the in-kernel dts files according to the latest cpus and cpu bindings updates for ARM. Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2013-04-19 01:35:59 +08:00
reg = <0x1>;
arm/dts: OMAP3+: Add mpu, dsp and iva nodes Add nodes for devices used by PM code (mpu, dsp, iva). Add a cpus node as well as recommended in the DT spec. Remove mpu, dsp, iva devices init if is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: Kevin Hilman <khilman@ti.com>
2011-08-16 17:49:08 +08:00
};
};
ARM: dts: OMAP4: Cleanup and move GIC outside of the OCP Remove some useless comment and move GIC controller outside of the OCP node since it does use the MPU internal bus and not the OCP. This will not change the functionality but will reflect the reality more accurately. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2012-09-03 23:56:32 +08:00
gic: interrupt-controller@48241000 {
compatible = "arm,cortex-a9-gic";
interrupt-controller;
#interrupt-cells = <3>;
reg = <0x48241000 0x1000>,
<0x48240100 0x0100>;
ARM: omap: convert wakeupgen to stacked domains OMAP4/5 has been (ab)using the gic_arch_extn to provide wakeup from suspend, and it makes a lot of sense to convert this code to use stacked domains instead. This patch does just this, updating the DT files to actually reflect what the HW provides. BIG FAT WARNING: because the DTs were so far lying by not exposing the WUGEN HW block, kernels with this patch applied won't have any suspend-resume facility when booted with old DTs, and old kernels with updated DTs won't even boot. On a platform with this patch applied, the system looks like this: root@bacon-fat:~# cat /proc/interrupts CPU0 CPU1 16: 0 0 WUGEN 37 gp_timer 19: 233799 155916 GIC 27 arch_timer 23: 0 0 WUGEN 9 l3-dbg-irq 24: 1 0 WUGEN 10 l3-app-irq 27: 282 0 WUGEN 13 omap-dma-engine 44: 0 0 4ae10000.gpio 13 DMA 294: 0 0 WUGEN 20 gpmc 297: 506 0 WUGEN 56 48070000.i2c 298: 0 0 WUGEN 57 48072000.i2c 299: 0 0 WUGEN 61 48060000.i2c 300: 0 0 WUGEN 62 4807a000.i2c 301: 8 0 WUGEN 60 4807c000.i2c 308: 2439 0 WUGEN 74 OMAP UART2 312: 362 0 WUGEN 83 mmc2 313: 502 0 WUGEN 86 mmc0 314: 13 0 WUGEN 94 mmc1 350: 0 0 PRCM pinctrl, pinctrl 406: 35155709 0 GIC 109 ehci_hcd:usb1 407: 0 0 WUGEN 7 palmas 409: 0 0 WUGEN 119 twl6040 410: 0 0 twl6040 5 twl6040_irq_ready 411: 0 0 twl6040 0 twl6040_irq_th IPI0: 0 1 CPU wakeup interrupts IPI1: 0 0 Timer broadcast interrupts IPI2: 95334 902334 Rescheduling interrupts IPI3: 0 0 Function call interrupts IPI4: 479 648 Single function call interrupts IPI5: 0 0 CPU stop interrupts IPI6: 0 0 IRQ work interrupts IPI7: 0 0 completion interrupts Err: 0 Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Link: https://lkml.kernel.org/r/1426088629-15377-8-git-send-email-marc.zyngier@arm.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2015-03-11 23:43:49 +08:00
interrupt-parent = <&gic>;
ARM: dts: OMAP4: Cleanup and move GIC outside of the OCP Remove some useless comment and move GIC controller outside of the OCP node since it does use the MPU internal bus and not the OCP. This will not change the functionality but will reflect the reality more accurately. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2012-09-03 23:56:32 +08:00
};
ARM: OMAP4: Add L2 Cache Controller in Device Tree Provide PL310 Level 2 Cache Controller Device Tree support for OMAP4 based devices. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-07-04 20:27:34 +08:00
L2: l2-cache-controller@48242000 {
compatible = "arm,pl310-cache";
reg = <0x48242000 0x1000>;
cache-unified;
cache-level = <2>;
};
ARM: dts: Remove '0x's from OMAP4 DTS file Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-07-22 18:52:36 +08:00
local-timer@48240600 {
ARM: OMAP4: Add local timer support for Device Tree Add cortex-a9 local timer support for all OMAP4 based SOCs using DT. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-07-04 21:02:32 +08:00
compatible = "arm,cortex-a9-twd-timer";
ARM: dts: omap4: add twd clock to DT Booting Linux 3.14 on Pandaboard currently gets the following message displayed: smp_twd: clock not found -2 Define "mpu_periphclk" as the twd clock in omap4 dts to avoid this. Signed-off-by: Gilles Chanteperdrix <gilles.chanteperdrix@xenomai.org> Acked-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
2014-04-08 04:05:39 +08:00
clocks = <&mpu_periphclk>;
ARM: OMAP4: Add local timer support for Device Tree Add cortex-a9 local timer support for all OMAP4 based SOCs using DT. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-07-04 21:02:32 +08:00
reg = <0x48240600 0x20>;
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_HIGH)>;
ARM: omap: convert wakeupgen to stacked domains OMAP4/5 has been (ab)using the gic_arch_extn to provide wakeup from suspend, and it makes a lot of sense to convert this code to use stacked domains instead. This patch does just this, updating the DT files to actually reflect what the HW provides. BIG FAT WARNING: because the DTs were so far lying by not exposing the WUGEN HW block, kernels with this patch applied won't have any suspend-resume facility when booted with old DTs, and old kernels with updated DTs won't even boot. On a platform with this patch applied, the system looks like this: root@bacon-fat:~# cat /proc/interrupts CPU0 CPU1 16: 0 0 WUGEN 37 gp_timer 19: 233799 155916 GIC 27 arch_timer 23: 0 0 WUGEN 9 l3-dbg-irq 24: 1 0 WUGEN 10 l3-app-irq 27: 282 0 WUGEN 13 omap-dma-engine 44: 0 0 4ae10000.gpio 13 DMA 294: 0 0 WUGEN 20 gpmc 297: 506 0 WUGEN 56 48070000.i2c 298: 0 0 WUGEN 57 48072000.i2c 299: 0 0 WUGEN 61 48060000.i2c 300: 0 0 WUGEN 62 4807a000.i2c 301: 8 0 WUGEN 60 4807c000.i2c 308: 2439 0 WUGEN 74 OMAP UART2 312: 362 0 WUGEN 83 mmc2 313: 502 0 WUGEN 86 mmc0 314: 13 0 WUGEN 94 mmc1 350: 0 0 PRCM pinctrl, pinctrl 406: 35155709 0 GIC 109 ehci_hcd:usb1 407: 0 0 WUGEN 7 palmas 409: 0 0 WUGEN 119 twl6040 410: 0 0 twl6040 5 twl6040_irq_ready 411: 0 0 twl6040 0 twl6040_irq_th IPI0: 0 1 CPU wakeup interrupts IPI1: 0 0 Timer broadcast interrupts IPI2: 95334 902334 Rescheduling interrupts IPI3: 0 0 Function call interrupts IPI4: 479 648 Single function call interrupts IPI5: 0 0 CPU stop interrupts IPI6: 0 0 IRQ work interrupts IPI7: 0 0 completion interrupts Err: 0 Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Link: https://lkml.kernel.org/r/1426088629-15377-8-git-send-email-marc.zyngier@arm.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2015-03-11 23:43:49 +08:00
interrupt-parent = <&gic>;
};
wakeupgen: interrupt-controller@48281000 {
compatible = "ti,omap4-wugen-mpu";
interrupt-controller;
#interrupt-cells = <3>;
reg = <0x48281000 0x1000>;
interrupt-parent = <&gic>;
ARM: OMAP4: Add local timer support for Device Tree Add cortex-a9 local timer support for all OMAP4 based SOCs using DT. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-07-04 21:02:32 +08:00
};
arm/dts: Add initial device tree support for OMAP4 SoC Add initial device-tree support for OMAP4 SoC. This is based on the original panda board patch done by Manju: http://permalink.gmane.org/gmane.linux.ports.arm.omap/60393 Add the generic GIC interrupt-controller from ARM. Add an empty "soc" node to contain non memory mapped IPs (DSP, MPU, IPU...). Note: Since reg, irq and dma are provided by hwmod for the moment, these attributes will not be present at all in DTS to highlight the gap. They will be added as soon as dma bindings will be there and drivers will be adapted. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: G, Manjunath Kondaiah <manjugk@ti.com>
2011-08-09 23:15:17 +08:00
/*
ARM: dts: Grammar /is uses/ is used/ Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: linux-omap@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-03-28 18:11:37 +08:00
* The soc node represents the soc top level view. It is used for IPs
arm/dts: Add initial device tree support for OMAP4 SoC Add initial device-tree support for OMAP4 SoC. This is based on the original panda board patch done by Manju: http://permalink.gmane.org/gmane.linux.ports.arm.omap/60393 Add the generic GIC interrupt-controller from ARM. Add an empty "soc" node to contain non memory mapped IPs (DSP, MPU, IPU...). Note: Since reg, irq and dma are provided by hwmod for the moment, these attributes will not be present at all in DTS to highlight the gap. They will be added as soon as dma bindings will be there and drivers will be adapted. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: G, Manjunath Kondaiah <manjugk@ti.com>
2011-08-09 23:15:17 +08:00
* that are not memory mapped in the MPU view or for the MPU itself.
*/
soc {
compatible = "ti,omap-infra";
arm/dts: OMAP3+: Add mpu, dsp and iva nodes Add nodes for devices used by PM code (mpu, dsp, iva). Add a cpus node as well as recommended in the DT spec. Remove mpu, dsp, iva devices init if is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: Kevin Hilman <khilman@ti.com>
2011-08-16 17:49:08 +08:00
mpu {
compatible = "ti,omap4-mpu";
ti,hwmods = "mpu";
ARM: OMAP4+: Remove static iotable mappings for SRAM In order to handle errata I688, a page of sram was reserved by doing a static iotable map. Now that we use gen_pool to manage sram, we can completely remove all of these static mappings and use gen_pool_alloc() to get the one page of sram space needed to implement errata I688. omap_bus_sync will be NOP until SRAM initialization happens. Suggested-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-09-11 00:04:04 +08:00
sram = <&ocmcram>;
arm/dts: OMAP3+: Add mpu, dsp and iva nodes Add nodes for devices used by PM code (mpu, dsp, iva). Add a cpus node as well as recommended in the DT spec. Remove mpu, dsp, iva devices init if is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: Kevin Hilman <khilman@ti.com>
2011-08-16 17:49:08 +08:00
};
dsp {
compatible = "ti,omap3-c64";
ti,hwmods = "dsp";
};
iva {
compatible = "ti,ivahd";
ti,hwmods = "iva";
};
arm/dts: Add initial device tree support for OMAP4 SoC Add initial device-tree support for OMAP4 SoC. This is based on the original panda board patch done by Manju: http://permalink.gmane.org/gmane.linux.ports.arm.omap/60393 Add the generic GIC interrupt-controller from ARM. Add an empty "soc" node to contain non memory mapped IPs (DSP, MPU, IPU...). Note: Since reg, irq and dma are provided by hwmod for the moment, these attributes will not be present at all in DTS to highlight the gap. They will be added as soon as dma bindings will be there and drivers will be adapted. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: G, Manjunath Kondaiah <manjugk@ti.com>
2011-08-09 23:15:17 +08:00
};
/*
* XXX: Use a flat representation of the OMAP4 interconnect.
* The real OMAP interconnect network is quite complex.
ARM: dts: Grammar /that will/it will/ Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: linux-omap@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-03-28 18:11:39 +08:00
* Since it will not bring real advantage to represent that in DT for
arm/dts: Add initial device tree support for OMAP4 SoC Add initial device-tree support for OMAP4 SoC. This is based on the original panda board patch done by Manju: http://permalink.gmane.org/gmane.linux.ports.arm.omap/60393 Add the generic GIC interrupt-controller from ARM. Add an empty "soc" node to contain non memory mapped IPs (DSP, MPU, IPU...). Note: Since reg, irq and dma are provided by hwmod for the moment, these attributes will not be present at all in DTS to highlight the gap. They will be added as soon as dma bindings will be there and drivers will be adapted. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: G, Manjunath Kondaiah <manjugk@ti.com>
2011-08-09 23:15:17 +08:00
* the moment, just use a fake OCP bus entry to represent the whole bus
* hierarchy.
*/
ocp {
arm/dts: OMAP4: Add a main ocp entry bound to l3-noc driver Used the main OCP node to add bindings with the l3_noc driver. Remove l3_noc static device creation if DT is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: Tony Lindgren <tony@atomide.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
2011-08-12 19:48:47 +08:00
compatible = "ti,omap4-l3-noc", "simple-bus";
arm/dts: Add initial device tree support for OMAP4 SoC Add initial device-tree support for OMAP4 SoC. This is based on the original panda board patch done by Manju: http://permalink.gmane.org/gmane.linux.ports.arm.omap/60393 Add the generic GIC interrupt-controller from ARM. Add an empty "soc" node to contain non memory mapped IPs (DSP, MPU, IPU...). Note: Since reg, irq and dma are provided by hwmod for the moment, these attributes will not be present at all in DTS to highlight the gap. They will be added as soon as dma bindings will be there and drivers will be adapted. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: G, Manjunath Kondaiah <manjugk@ti.com>
2011-08-09 23:15:17 +08:00
#address-cells = <1>;
#size-cells = <1>;
ranges;
arm/dts: OMAP4: Add a main ocp entry bound to l3-noc driver Used the main OCP node to add bindings with the l3_noc driver. Remove l3_noc static device creation if DT is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: Tony Lindgren <tony@atomide.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
2011-08-12 19:48:47 +08:00
ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
ARM: dts: OMAP4/5: Update l3-noc DT nodes Add l3-noc node for OMAP4 and OMAP5 devices. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> [jon-hunter@ti.com: Fix the problem caused by adding 32 to the interrupt number for the L3 interrupts to account for per processor interrupts (PPI) and software generated interrupts (SGI) which typically are mapped to the first 32 interrupts in the ARM GIC. This is not necessary because the first parameter of the ARM GIC interrupt property specifies the GIC interrupt type (ie. SGI, PPI, etc). Hence, fix the interrupt number for the L3 interrupts by substracting 32] Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-02-26 20:06:14 +08:00
reg = <0x44000000 0x1000>,
<0x44800000 0x2000>,
<0x45000000 0x1000>;
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
arm/dts: Add initial device tree support for OMAP4 SoC Add initial device-tree support for OMAP4 SoC. This is based on the original panda board patch done by Manju: http://permalink.gmane.org/gmane.linux.ports.arm.omap/60393 Add the generic GIC interrupt-controller from ARM. Add an empty "soc" node to contain non memory mapped IPs (DSP, MPU, IPU...). Note: Since reg, irq and dma are provided by hwmod for the moment, these attributes will not be present at all in DTS to highlight the gap. They will be added as soon as dma bindings will be there and drivers will be adapted. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: G, Manjunath Kondaiah <manjugk@ti.com>
2011-08-09 23:15:17 +08:00
ARM: dts: omap4: add minimal l4 bus layout with control module support This patch creates the l4_cfg and l4_wkup interconnects for OMAP4, and moves some of the generic peripherals under it. System control module support is added to the device tree also, and the existing SCM related functionality is moved under it. Signed-off-by: Tero Kristo <t-kristo@ti.com> Reported-by: Tony Lindgren <tony@atomide.com>
2015-02-12 17:32:14 +08:00
l4_cfg: l4@4a000000 {
compatible = "ti,omap4-l4-cfg", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x4a000000 0x1000000>;
ARM: dts: omap4 clock data This patch creates a unique node for each clock in the OMAP4 power, reset and clock manager (PRCM). OMAP443x and OMAP446x have slightly different clock tree which is taken into account in the data. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-07-18 17:42:02 +08:00
ARM: dts: omap4: add minimal l4 bus layout with control module support This patch creates the l4_cfg and l4_wkup interconnects for OMAP4, and moves some of the generic peripherals under it. System control module support is added to the device tree also, and the existing SCM related functionality is moved under it. Signed-off-by: Tero Kristo <t-kristo@ti.com> Reported-by: Tony Lindgren <tony@atomide.com>
2015-02-12 17:32:14 +08:00
cm1: cm1@4000 {
compatible = "ti,omap4-cm1";
reg = <0x4000 0x2000>;
ARM: dts: omap4 clock data This patch creates a unique node for each clock in the OMAP4 power, reset and clock manager (PRCM). OMAP443x and OMAP446x have slightly different clock tree which is taken into account in the data. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-07-18 17:42:02 +08:00
ARM: dts: omap4: add minimal l4 bus layout with control module support This patch creates the l4_cfg and l4_wkup interconnects for OMAP4, and moves some of the generic peripherals under it. System control module support is added to the device tree also, and the existing SCM related functionality is moved under it. Signed-off-by: Tero Kristo <t-kristo@ti.com> Reported-by: Tony Lindgren <tony@atomide.com>
2015-02-12 17:32:14 +08:00
cm1_clocks: clocks {
#address-cells = <1>;
#size-cells = <0>;
};
ARM: dts: omap4 clock data This patch creates a unique node for each clock in the OMAP4 power, reset and clock manager (PRCM). OMAP443x and OMAP446x have slightly different clock tree which is taken into account in the data. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-07-18 17:42:02 +08:00
ARM: dts: omap4: add minimal l4 bus layout with control module support This patch creates the l4_cfg and l4_wkup interconnects for OMAP4, and moves some of the generic peripherals under it. System control module support is added to the device tree also, and the existing SCM related functionality is moved under it. Signed-off-by: Tero Kristo <t-kristo@ti.com> Reported-by: Tony Lindgren <tony@atomide.com>
2015-02-12 17:32:14 +08:00
cm1_clockdomains: clockdomains {
};
ARM: dts: omap4 clock data This patch creates a unique node for each clock in the OMAP4 power, reset and clock manager (PRCM). OMAP443x and OMAP446x have slightly different clock tree which is taken into account in the data. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-07-18 17:42:02 +08:00
};
ARM: dts: omap4: add minimal l4 bus layout with control module support This patch creates the l4_cfg and l4_wkup interconnects for OMAP4, and moves some of the generic peripherals under it. System control module support is added to the device tree also, and the existing SCM related functionality is moved under it. Signed-off-by: Tero Kristo <t-kristo@ti.com> Reported-by: Tony Lindgren <tony@atomide.com>
2015-02-12 17:32:14 +08:00
cm2: cm2@8000 {
compatible = "ti,omap4-cm2";
reg = <0x8000 0x3000>;
ARM: dts: omap4 clock data This patch creates a unique node for each clock in the OMAP4 power, reset and clock manager (PRCM). OMAP443x and OMAP446x have slightly different clock tree which is taken into account in the data. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-07-18 17:42:02 +08:00
ARM: dts: omap4: add minimal l4 bus layout with control module support This patch creates the l4_cfg and l4_wkup interconnects for OMAP4, and moves some of the generic peripherals under it. System control module support is added to the device tree also, and the existing SCM related functionality is moved under it. Signed-off-by: Tero Kristo <t-kristo@ti.com> Reported-by: Tony Lindgren <tony@atomide.com>
2015-02-12 17:32:14 +08:00
cm2_clocks: clocks {
#address-cells = <1>;
#size-cells = <0>;
};
ARM: dts: omap4 clock data This patch creates a unique node for each clock in the OMAP4 power, reset and clock manager (PRCM). OMAP443x and OMAP446x have slightly different clock tree which is taken into account in the data. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-07-18 17:42:02 +08:00
ARM: dts: omap4: add minimal l4 bus layout with control module support This patch creates the l4_cfg and l4_wkup interconnects for OMAP4, and moves some of the generic peripherals under it. System control module support is added to the device tree also, and the existing SCM related functionality is moved under it. Signed-off-by: Tero Kristo <t-kristo@ti.com> Reported-by: Tony Lindgren <tony@atomide.com>
2015-02-12 17:32:14 +08:00
cm2_clockdomains: clockdomains {
};
ARM: dts: omap4 clock data This patch creates a unique node for each clock in the OMAP4 power, reset and clock manager (PRCM). OMAP443x and OMAP446x have slightly different clock tree which is taken into account in the data. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-07-18 17:42:02 +08:00
};
ARM: dts: omap4: add minimal l4 bus layout with control module support This patch creates the l4_cfg and l4_wkup interconnects for OMAP4, and moves some of the generic peripherals under it. System control module support is added to the device tree also, and the existing SCM related functionality is moved under it. Signed-off-by: Tero Kristo <t-kristo@ti.com> Reported-by: Tony Lindgren <tony@atomide.com>
2015-02-12 17:32:14 +08:00
omap4_scm_core: scm@2000 {
compatible = "ti,omap4-scm-core", "simple-bus";
reg = <0x2000 0x1000>;
ARM: dts: omap4 clock data This patch creates a unique node for each clock in the OMAP4 power, reset and clock manager (PRCM). OMAP443x and OMAP446x have slightly different clock tree which is taken into account in the data. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-07-18 17:42:02 +08:00
#address-cells = <1>;
ARM: dts: omap4: add minimal l4 bus layout with control module support This patch creates the l4_cfg and l4_wkup interconnects for OMAP4, and moves some of the generic peripherals under it. System control module support is added to the device tree also, and the existing SCM related functionality is moved under it. Signed-off-by: Tero Kristo <t-kristo@ti.com> Reported-by: Tony Lindgren <tony@atomide.com>
2015-02-12 17:32:14 +08:00
#size-cells = <1>;
ranges = <0 0x2000 0x1000>;
scm_conf: scm_conf@0 {
compatible = "syscon";
reg = <0x0 0x800>;
#address-cells = <1>;
#size-cells = <1>;
};
ARM: dts: omap4 clock data This patch creates a unique node for each clock in the OMAP4 power, reset and clock manager (PRCM). OMAP443x and OMAP446x have slightly different clock tree which is taken into account in the data. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-07-18 17:42:02 +08:00
};
ARM: dts: omap4: add minimal l4 bus layout with control module support This patch creates the l4_cfg and l4_wkup interconnects for OMAP4, and moves some of the generic peripherals under it. System control module support is added to the device tree also, and the existing SCM related functionality is moved under it. Signed-off-by: Tero Kristo <t-kristo@ti.com> Reported-by: Tony Lindgren <tony@atomide.com>
2015-02-12 17:32:14 +08:00
omap4_padconf_core: scm@100000 {
compatible = "ti,omap4-scm-padconf-core",
"simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x100000 0x1000>;
omap4_pmx_core: pinmux@40 {
compatible = "ti,omap4-padconf",
"pinctrl-single";
reg = <0x40 0x0196>;
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
interrupt-controller;
pinctrl-single,register-width = <16>;
pinctrl-single,function-mask = <0x7fff>;
};
omap4_padconf_global: omap4_padconf_global@5a0 {
ARM: dts: OMAP4: Fix broken pbias device creation commit <7415b0b4c645> ("ARM: dts: omap4: add minimal l4 bus layout with control module support") moved pbias_regulator dt node from being a child node of ocp to be the child node of omap4_padconf_global. After this device for pbias_regulator is not created. Fix it by adding "simple-bus" compatible property to omap4_padconf_global dt node. Fixes: 7415b0b4c645 ("ARM: dts: omap4: add minimal l4 bus layout with control module support") Cc: <stable@vger.kernel.org> # v4.1 Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-07-27 20:16:39 +08:00
compatible = "syscon",
"simple-bus";
ARM: dts: omap4: add minimal l4 bus layout with control module support This patch creates the l4_cfg and l4_wkup interconnects for OMAP4, and moves some of the generic peripherals under it. System control module support is added to the device tree also, and the existing SCM related functionality is moved under it. Signed-off-by: Tero Kristo <t-kristo@ti.com> Reported-by: Tony Lindgren <tony@atomide.com>
2015-02-12 17:32:14 +08:00
reg = <0x5a0 0x170>;
#address-cells = <1>;
#size-cells = <1>;
ARM: dts: fix omap2+ address translation for pbias "ARM: dts: <omap2/omap4/omap5/dra7>: add minimal l4 bus layout with control module support" moved pbias_regulator dt node from being a child node of ocp to be the child node of 'syscon'. Since 'syscon' doesn't have the 'ranges' property, address translation fails while trying to convert the address to resource. Fix it here by populating 'ranges' property in syscon dt node. Fixes: 72b10ac00eb1 ("ARM: dts: omap24xx: add minimal l4 bus layout with control module support") Fixes: 7415b0b4c645 ("ARM: dts: omap4: add minimal l4 bus layout with control module support") Fixes: ed8509edddeb ("ARM: dts: omap5: add minimal l4 bus layout with control module support") Fixes: d919501feffa ("ARM: dts: dra7: add minimal l4 bus layout with control module support") Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> [tony@atomide.com: fixed omap3 pbias to work] Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-09-04 20:08:24 +08:00
ranges = <0 0x5a0 0x170>;
ARM: dts: omap4: add minimal l4 bus layout with control module support This patch creates the l4_cfg and l4_wkup interconnects for OMAP4, and moves some of the generic peripherals under it. System control module support is added to the device tree also, and the existing SCM related functionality is moved under it. Signed-off-by: Tero Kristo <t-kristo@ti.com> Reported-by: Tony Lindgren <tony@atomide.com>
2015-02-12 17:32:14 +08:00
pbias_regulator: pbias_regulator {
ARM: dts: Use ti,pbias compatible string for pbias Use platform specific compatible strings instead of the common "ti,pbias-omap" compatible string. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-09-04 20:00:25 +08:00
compatible = "ti,pbias-omap4", "ti,pbias-omap";
ARM: dts: omap4: add minimal l4 bus layout with control module support This patch creates the l4_cfg and l4_wkup interconnects for OMAP4, and moves some of the generic peripherals under it. System control module support is added to the device tree also, and the existing SCM related functionality is moved under it. Signed-off-by: Tero Kristo <t-kristo@ti.com> Reported-by: Tony Lindgren <tony@atomide.com>
2015-02-12 17:32:14 +08:00
reg = <0x60 0x4>;
syscon = <&omap4_padconf_global>;
pbias_mmc_reg: pbias_mmc_omap4 {
regulator-name = "pbias_mmc_omap4";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3000000>;
};
};
};
ARM: dts: omap4 clock data This patch creates a unique node for each clock in the OMAP4 power, reset and clock manager (PRCM). OMAP443x and OMAP446x have slightly different clock tree which is taken into account in the data. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-07-18 17:42:02 +08:00
};
ARM: dts: omap4: add minimal l4 bus layout with control module support This patch creates the l4_cfg and l4_wkup interconnects for OMAP4, and moves some of the generic peripherals under it. System control module support is added to the device tree also, and the existing SCM related functionality is moved under it. Signed-off-by: Tero Kristo <t-kristo@ti.com> Reported-by: Tony Lindgren <tony@atomide.com>
2015-02-12 17:32:14 +08:00
l4_wkup: l4@300000 {
compatible = "ti,omap4-l4-wkup", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x300000 0x40000>;
counter32k: counter@4000 {
compatible = "ti,omap-counter32k";
reg = <0x4000 0x20>;
ti,hwmods = "counter_32k";
};
prm: prm@6000 {
compatible = "ti,omap4-prm";
reg = <0x6000 0x3000>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
prm_clocks: clocks {
#address-cells = <1>;
#size-cells = <0>;
};
prm_clockdomains: clockdomains {
};
};
scrm: scrm@a000 {
compatible = "ti,omap4-scrm";
reg = <0xa000 0x2000>;
scrm_clocks: clocks {
#address-cells = <1>;
#size-cells = <0>;
};
scrm_clockdomains: clockdomains {
};
};
omap4_pmx_wkup: pinmux@1e040 {
compatible = "ti,omap4-padconf",
"pinctrl-single";
reg = <0x1e040 0x0038>;
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
interrupt-controller;
pinctrl-single,register-width = <16>;
pinctrl-single,function-mask = <0x7fff>;
};
ARM: dts: add pbias dt node Add pbias regulator node as a child of system control module - syscon. Signed-off-by: Balaji T K <balajitk@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Tested-by: Florian Vaussard <florian.vaussard@epfl.ch> Tested-by: Stefan Roese <sr@denx.de> Signed-off-by: Chris Ball <chris@printf.net>
2014-02-19 22:56:40 +08:00
};
};
ARM: OMAP4+: Move SRAM data to DT Use drivers/misc/sram.c driver to manage SRAM on all DT only OMAP platforms (am33xx, am43xx, omap4 and omap5) instead of the existing private plat-omap/sram.c Address and size related data is removed from mach-omap2/sram.c and now passed to drivers/misc/sram.c from DT. Users can hence use general purpose allocator apis instead of OMAP private ones to manage and use SRAM. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-09-11 00:04:03 +08:00
ocmcram: ocmcram@40304000 {
compatible = "mmio-sram";
reg = <0x40304000 0xa000>; /* 40k */
};
ARM: dts: OMAP2+: Add SDMA controller bindings and nodes Add SDMA controller binding for OMAP2+ devices and populate DMA client information for SPI and MMC peripheral on OMAP3+ devices. Please note that OMAP24xx devices do not have SPI and MMC bindings available yet and so DMA client information is not populated. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2012-04-27 02:47:59 +08:00
sdma: dma-controller@4a056000 {
compatible = "ti,omap4430-sdma";
reg = <0x4a056000 0x1000>;
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
ARM: dts: OMAP2+: Add SDMA controller bindings and nodes Add SDMA controller binding for OMAP2+ devices and populate DMA client information for SPI and MMC peripheral on OMAP3+ devices. Please note that OMAP24xx devices do not have SPI and MMC bindings available yet and so DMA client information is not populated. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2012-04-27 02:47:59 +08:00
#dma-cells = <1>;
ARM: dts: omap4: Correct the dma controller's property names According to the Documentation/devicetree/bindings/dma/dma.txt the dma-channels and dma-requests property should not have '#'. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-02-20 21:42:04 +08:00
dma-channels = <32>;
dma-requests = <127>;
ARM: dts: OMAP2+: Add SDMA controller bindings and nodes Add SDMA controller binding for OMAP2+ devices and populate DMA client information for SPI and MMC peripheral on OMAP3+ devices. Please note that OMAP24xx devices do not have SPI and MMC bindings available yet and so DMA client information is not populated. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2012-04-27 02:47:59 +08:00
};
arm/dts: OMAP4: Add gpio nodes Add the 6 GPIOs controller nodes present in OMAP4. Remove gpio static device initialisation if DT is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca>
2011-08-16 17:51:54 +08:00
gpio1: gpio@4a310000 {
compatible = "ti,omap4-gpio";
ARM: dts: OMAP4: Add reg and interrupts for every nodes Thanks to Vaibhav <hvaibhav@ti.com> omap_device fix (ARM: OMAP: omap_device: Fix up resource names when booted with devicetre), we can now specify reg and interrupts using standard device tree attributes. Update the OMAP4 dtsi file with missing reg and interrupts attributes. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-09-05 17:38:23 +08:00
reg = <0x4a310000 0x200>;
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
arm/dts: OMAP4: Add gpio nodes Add the 6 GPIOs controller nodes present in OMAP4. Remove gpio static device initialisation if DT is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca>
2011-08-16 17:51:54 +08:00
ti,hwmods = "gpio1";
ARM: dts: OMAP2+: Identify GPIO banks that are always powered Add the "ti,gpio-always-on" property to the appropriate GPIO banks to indicate which banks are always powered and will never lose logic state. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-04-05 04:16:16 +08:00
ti,gpio-always-on;
arm/dts: OMAP4: Add gpio nodes Add the 6 GPIOs controller nodes present in OMAP4. Remove gpio static device initialisation if DT is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca>
2011-08-16 17:51:54 +08:00
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
ARM: dts: OMAP3+: Correct gpio #interrupts-cells property The OMAP gpio binding documention [1] states that the #interrupts-cells property for gpio controllers should be 2. Currently, for OMAP3+ devices the #interrupt-cells is set to 1. By setting this property to 2, it allows clients to pass a 2nd parameter indicating the sensitivity (level or edge) and polarity (high or low) of the interrupt. The OMAP gpio controllers support these options and so update the #interrupt-cells property for OMAP3+ devices to 2. [1] Documentation/devicetree/bindings/gpio/gpio-omap.txt Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-08 05:44:39 +08:00
#interrupt-cells = <2>;
arm/dts: OMAP4: Add gpio nodes Add the 6 GPIOs controller nodes present in OMAP4. Remove gpio static device initialisation if DT is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca>
2011-08-16 17:51:54 +08:00
};
gpio2: gpio@48055000 {
compatible = "ti,omap4-gpio";
ARM: dts: OMAP4: Add reg and interrupts for every nodes Thanks to Vaibhav <hvaibhav@ti.com> omap_device fix (ARM: OMAP: omap_device: Fix up resource names when booted with devicetre), we can now specify reg and interrupts using standard device tree attributes. Update the OMAP4 dtsi file with missing reg and interrupts attributes. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-09-05 17:38:23 +08:00
reg = <0x48055000 0x200>;
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
arm/dts: OMAP4: Add gpio nodes Add the 6 GPIOs controller nodes present in OMAP4. Remove gpio static device initialisation if DT is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca>
2011-08-16 17:51:54 +08:00
ti,hwmods = "gpio2";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
ARM: dts: OMAP3+: Correct gpio #interrupts-cells property The OMAP gpio binding documention [1] states that the #interrupts-cells property for gpio controllers should be 2. Currently, for OMAP3+ devices the #interrupt-cells is set to 1. By setting this property to 2, it allows clients to pass a 2nd parameter indicating the sensitivity (level or edge) and polarity (high or low) of the interrupt. The OMAP gpio controllers support these options and so update the #interrupt-cells property for OMAP3+ devices to 2. [1] Documentation/devicetree/bindings/gpio/gpio-omap.txt Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-08 05:44:39 +08:00
#interrupt-cells = <2>;
arm/dts: OMAP4: Add gpio nodes Add the 6 GPIOs controller nodes present in OMAP4. Remove gpio static device initialisation if DT is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca>
2011-08-16 17:51:54 +08:00
};
gpio3: gpio@48057000 {
compatible = "ti,omap4-gpio";
ARM: dts: OMAP4: Add reg and interrupts for every nodes Thanks to Vaibhav <hvaibhav@ti.com> omap_device fix (ARM: OMAP: omap_device: Fix up resource names when booted with devicetre), we can now specify reg and interrupts using standard device tree attributes. Update the OMAP4 dtsi file with missing reg and interrupts attributes. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-09-05 17:38:23 +08:00
reg = <0x48057000 0x200>;
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
arm/dts: OMAP4: Add gpio nodes Add the 6 GPIOs controller nodes present in OMAP4. Remove gpio static device initialisation if DT is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca>
2011-08-16 17:51:54 +08:00
ti,hwmods = "gpio3";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
ARM: dts: OMAP3+: Correct gpio #interrupts-cells property The OMAP gpio binding documention [1] states that the #interrupts-cells property for gpio controllers should be 2. Currently, for OMAP3+ devices the #interrupt-cells is set to 1. By setting this property to 2, it allows clients to pass a 2nd parameter indicating the sensitivity (level or edge) and polarity (high or low) of the interrupt. The OMAP gpio controllers support these options and so update the #interrupt-cells property for OMAP3+ devices to 2. [1] Documentation/devicetree/bindings/gpio/gpio-omap.txt Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-08 05:44:39 +08:00
#interrupt-cells = <2>;
arm/dts: OMAP4: Add gpio nodes Add the 6 GPIOs controller nodes present in OMAP4. Remove gpio static device initialisation if DT is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca>
2011-08-16 17:51:54 +08:00
};
gpio4: gpio@48059000 {
compatible = "ti,omap4-gpio";
ARM: dts: OMAP4: Add reg and interrupts for every nodes Thanks to Vaibhav <hvaibhav@ti.com> omap_device fix (ARM: OMAP: omap_device: Fix up resource names when booted with devicetre), we can now specify reg and interrupts using standard device tree attributes. Update the OMAP4 dtsi file with missing reg and interrupts attributes. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-09-05 17:38:23 +08:00
reg = <0x48059000 0x200>;
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
arm/dts: OMAP4: Add gpio nodes Add the 6 GPIOs controller nodes present in OMAP4. Remove gpio static device initialisation if DT is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca>
2011-08-16 17:51:54 +08:00
ti,hwmods = "gpio4";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
ARM: dts: OMAP3+: Correct gpio #interrupts-cells property The OMAP gpio binding documention [1] states that the #interrupts-cells property for gpio controllers should be 2. Currently, for OMAP3+ devices the #interrupt-cells is set to 1. By setting this property to 2, it allows clients to pass a 2nd parameter indicating the sensitivity (level or edge) and polarity (high or low) of the interrupt. The OMAP gpio controllers support these options and so update the #interrupt-cells property for OMAP3+ devices to 2. [1] Documentation/devicetree/bindings/gpio/gpio-omap.txt Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-08 05:44:39 +08:00
#interrupt-cells = <2>;
arm/dts: OMAP4: Add gpio nodes Add the 6 GPIOs controller nodes present in OMAP4. Remove gpio static device initialisation if DT is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca>
2011-08-16 17:51:54 +08:00
};
gpio5: gpio@4805b000 {
compatible = "ti,omap4-gpio";
ARM: dts: OMAP4: Add reg and interrupts for every nodes Thanks to Vaibhav <hvaibhav@ti.com> omap_device fix (ARM: OMAP: omap_device: Fix up resource names when booted with devicetre), we can now specify reg and interrupts using standard device tree attributes. Update the OMAP4 dtsi file with missing reg and interrupts attributes. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-09-05 17:38:23 +08:00
reg = <0x4805b000 0x200>;
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
arm/dts: OMAP4: Add gpio nodes Add the 6 GPIOs controller nodes present in OMAP4. Remove gpio static device initialisation if DT is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca>
2011-08-16 17:51:54 +08:00
ti,hwmods = "gpio5";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
ARM: dts: OMAP3+: Correct gpio #interrupts-cells property The OMAP gpio binding documention [1] states that the #interrupts-cells property for gpio controllers should be 2. Currently, for OMAP3+ devices the #interrupt-cells is set to 1. By setting this property to 2, it allows clients to pass a 2nd parameter indicating the sensitivity (level or edge) and polarity (high or low) of the interrupt. The OMAP gpio controllers support these options and so update the #interrupt-cells property for OMAP3+ devices to 2. [1] Documentation/devicetree/bindings/gpio/gpio-omap.txt Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-08 05:44:39 +08:00
#interrupt-cells = <2>;
arm/dts: OMAP4: Add gpio nodes Add the 6 GPIOs controller nodes present in OMAP4. Remove gpio static device initialisation if DT is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca>
2011-08-16 17:51:54 +08:00
};
gpio6: gpio@4805d000 {
compatible = "ti,omap4-gpio";
ARM: dts: OMAP4: Add reg and interrupts for every nodes Thanks to Vaibhav <hvaibhav@ti.com> omap_device fix (ARM: OMAP: omap_device: Fix up resource names when booted with devicetre), we can now specify reg and interrupts using standard device tree attributes. Update the OMAP4 dtsi file with missing reg and interrupts attributes. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-09-05 17:38:23 +08:00
reg = <0x4805d000 0x200>;
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
arm/dts: OMAP4: Add gpio nodes Add the 6 GPIOs controller nodes present in OMAP4. Remove gpio static device initialisation if DT is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca>
2011-08-16 17:51:54 +08:00
ti,hwmods = "gpio6";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
ARM: dts: OMAP3+: Correct gpio #interrupts-cells property The OMAP gpio binding documention [1] states that the #interrupts-cells property for gpio controllers should be 2. Currently, for OMAP3+ devices the #interrupt-cells is set to 1. By setting this property to 2, it allows clients to pass a 2nd parameter indicating the sensitivity (level or edge) and polarity (high or low) of the interrupt. The OMAP gpio controllers support these options and so update the #interrupt-cells property for OMAP3+ devices to 2. [1] Documentation/devicetree/bindings/gpio/gpio-omap.txt Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-08 05:44:39 +08:00
#interrupt-cells = <2>;
arm/dts: OMAP4: Add gpio nodes Add the 6 GPIOs controller nodes present in OMAP4. Remove gpio static device initialisation if DT is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca>
2011-08-16 17:51:54 +08:00
};
ARM: omap: pass minimal SoC/board data for UART from dt Pass minimal data needed for console boot, from dt, for OMAP4 panda/sdp and OMAP3 beagle boards, and get rid of the static initialization from generic board file. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Reviewed-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-12-14 19:55:46 +08:00
ARM: dts: Add GPMC node for OMAP2, OMAP4 and OMAP5 Add the device-tree node for GPMC on OMAP2, OMAP4 and OMAP5 devices. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-02-23 05:33:31 +08:00
gpmc: gpmc@50000000 {
compatible = "ti,omap4430-gpmc";
reg = <0x50000000 0x1000>;
#address-cells = <2>;
#size-cells = <1>;
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
ARM: dts: Add GPMC node for OMAP2, OMAP4 and OMAP5 Add the device-tree node for GPMC on OMAP2, OMAP4 and OMAP5 devices. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-02-23 05:33:31 +08:00
gpmc,num-cs = <8>;
gpmc,num-waitpins = <4>;
ti,hwmods = "gpmc";
ARM: dts: omap: Add reset/idle on init bindings for OMAP On OMAP we have co-processor IPs, memory controllers, GPIOs which control regulators and power switches to PMIC, and SoC internal Bus IPs, some or most of which should either not be reset or idled or both at init. (In some cases there are erratas which prevent an IP from being reset) Have a way to pass this information from DT. Update the am33xx/omap4 and omap5 dtsi files with the new bindings for modules which either should not be idled. reset or both. A later patch would cleanup the same information that exists today as part of the hwmod data files. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-10-15 15:07:50 +08:00
ti,no-idle-on-init;
ARM: dts: omap4/5: Use l3_ick for the gpmc node The GPMC clock is derived from l3_ick. The simplest solution is to reference directly l3_ick to provide the GPMC fck in order to get correct timings. The real management of the clock is left to hwmod. Cc: stable@vger.kernel.org # v3.14+ Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-02-26 18:38:09 +08:00
clocks = <&l3_div_ck>;
clock-names = "fck";
ARM: dts: Add GPMC node for OMAP2, OMAP4 and OMAP5 Add the device-tree node for GPMC on OMAP2, OMAP4 and OMAP5 devices. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-02-23 05:33:31 +08:00
};
arm/dts: OMAP3&4: Remove the '0x' prefix for serial nodes Follow the DTS convention and thus name the nodes <name>@<address> without any '0x' prefix in the physical address. Suggested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-02-16 18:55:27 +08:00
uart1: serial@4806a000 {
ARM: omap: pass minimal SoC/board data for UART from dt Pass minimal data needed for console boot, from dt, for OMAP4 panda/sdp and OMAP3 beagle boards, and get rid of the static initialization from generic board file. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Reviewed-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-12-14 19:55:46 +08:00
compatible = "ti,omap4-uart";
ARM: dts: OMAP4: Add reg and interrupts for every nodes Thanks to Vaibhav <hvaibhav@ti.com> omap_device fix (ARM: OMAP: omap_device: Fix up resource names when booted with devicetre), we can now specify reg and interrupts using standard device tree attributes. Update the OMAP4 dtsi file with missing reg and interrupts attributes. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-09-05 17:38:23 +08:00
reg = <0x4806a000 0x100>;
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
ARM: omap: pass minimal SoC/board data for UART from dt Pass minimal data needed for console boot, from dt, for OMAP4 panda/sdp and OMAP3 beagle boards, and get rid of the static initialization from generic board file. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Reviewed-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-12-14 19:55:46 +08:00
ti,hwmods = "uart1";
clock-frequency = <48000000>;
};
arm/dts: OMAP3&4: Remove the '0x' prefix for serial nodes Follow the DTS convention and thus name the nodes <name>@<address> without any '0x' prefix in the physical address. Suggested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-02-16 18:55:27 +08:00
uart2: serial@4806c000 {
ARM: omap: pass minimal SoC/board data for UART from dt Pass minimal data needed for console boot, from dt, for OMAP4 panda/sdp and OMAP3 beagle boards, and get rid of the static initialization from generic board file. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Reviewed-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-12-14 19:55:46 +08:00
compatible = "ti,omap4-uart";
ARM: dts: OMAP4: Add reg and interrupts for every nodes Thanks to Vaibhav <hvaibhav@ti.com> omap_device fix (ARM: OMAP: omap_device: Fix up resource names when booted with devicetre), we can now specify reg and interrupts using standard device tree attributes. Update the OMAP4 dtsi file with missing reg and interrupts attributes. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-09-05 17:38:23 +08:00
reg = <0x4806c000 0x100>;
ARM: omap: convert wakeupgen to stacked domains OMAP4/5 has been (ab)using the gic_arch_extn to provide wakeup from suspend, and it makes a lot of sense to convert this code to use stacked domains instead. This patch does just this, updating the DT files to actually reflect what the HW provides. BIG FAT WARNING: because the DTs were so far lying by not exposing the WUGEN HW block, kernels with this patch applied won't have any suspend-resume facility when booted with old DTs, and old kernels with updated DTs won't even boot. On a platform with this patch applied, the system looks like this: root@bacon-fat:~# cat /proc/interrupts CPU0 CPU1 16: 0 0 WUGEN 37 gp_timer 19: 233799 155916 GIC 27 arch_timer 23: 0 0 WUGEN 9 l3-dbg-irq 24: 1 0 WUGEN 10 l3-app-irq 27: 282 0 WUGEN 13 omap-dma-engine 44: 0 0 4ae10000.gpio 13 DMA 294: 0 0 WUGEN 20 gpmc 297: 506 0 WUGEN 56 48070000.i2c 298: 0 0 WUGEN 57 48072000.i2c 299: 0 0 WUGEN 61 48060000.i2c 300: 0 0 WUGEN 62 4807a000.i2c 301: 8 0 WUGEN 60 4807c000.i2c 308: 2439 0 WUGEN 74 OMAP UART2 312: 362 0 WUGEN 83 mmc2 313: 502 0 WUGEN 86 mmc0 314: 13 0 WUGEN 94 mmc1 350: 0 0 PRCM pinctrl, pinctrl 406: 35155709 0 GIC 109 ehci_hcd:usb1 407: 0 0 WUGEN 7 palmas 409: 0 0 WUGEN 119 twl6040 410: 0 0 twl6040 5 twl6040_irq_ready 411: 0 0 twl6040 0 twl6040_irq_th IPI0: 0 1 CPU wakeup interrupts IPI1: 0 0 Timer broadcast interrupts IPI2: 95334 902334 Rescheduling interrupts IPI3: 0 0 Function call interrupts IPI4: 479 648 Single function call interrupts IPI5: 0 0 CPU stop interrupts IPI6: 0 0 IRQ work interrupts IPI7: 0 0 completion interrupts Err: 0 Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Link: https://lkml.kernel.org/r/1426088629-15377-8-git-send-email-marc.zyngier@arm.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2015-03-11 23:43:49 +08:00
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
ARM: omap: pass minimal SoC/board data for UART from dt Pass minimal data needed for console boot, from dt, for OMAP4 panda/sdp and OMAP3 beagle boards, and get rid of the static initialization from generic board file. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Reviewed-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-12-14 19:55:46 +08:00
ti,hwmods = "uart2";
clock-frequency = <48000000>;
};
arm/dts: OMAP3&4: Remove the '0x' prefix for serial nodes Follow the DTS convention and thus name the nodes <name>@<address> without any '0x' prefix in the physical address. Suggested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-02-16 18:55:27 +08:00
uart3: serial@48020000 {
ARM: omap: pass minimal SoC/board data for UART from dt Pass minimal data needed for console boot, from dt, for OMAP4 panda/sdp and OMAP3 beagle boards, and get rid of the static initialization from generic board file. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Reviewed-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-12-14 19:55:46 +08:00
compatible = "ti,omap4-uart";
ARM: dts: OMAP4: Add reg and interrupts for every nodes Thanks to Vaibhav <hvaibhav@ti.com> omap_device fix (ARM: OMAP: omap_device: Fix up resource names when booted with devicetre), we can now specify reg and interrupts using standard device tree attributes. Update the OMAP4 dtsi file with missing reg and interrupts attributes. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-09-05 17:38:23 +08:00
reg = <0x48020000 0x100>;
ARM: omap: convert wakeupgen to stacked domains OMAP4/5 has been (ab)using the gic_arch_extn to provide wakeup from suspend, and it makes a lot of sense to convert this code to use stacked domains instead. This patch does just this, updating the DT files to actually reflect what the HW provides. BIG FAT WARNING: because the DTs were so far lying by not exposing the WUGEN HW block, kernels with this patch applied won't have any suspend-resume facility when booted with old DTs, and old kernels with updated DTs won't even boot. On a platform with this patch applied, the system looks like this: root@bacon-fat:~# cat /proc/interrupts CPU0 CPU1 16: 0 0 WUGEN 37 gp_timer 19: 233799 155916 GIC 27 arch_timer 23: 0 0 WUGEN 9 l3-dbg-irq 24: 1 0 WUGEN 10 l3-app-irq 27: 282 0 WUGEN 13 omap-dma-engine 44: 0 0 4ae10000.gpio 13 DMA 294: 0 0 WUGEN 20 gpmc 297: 506 0 WUGEN 56 48070000.i2c 298: 0 0 WUGEN 57 48072000.i2c 299: 0 0 WUGEN 61 48060000.i2c 300: 0 0 WUGEN 62 4807a000.i2c 301: 8 0 WUGEN 60 4807c000.i2c 308: 2439 0 WUGEN 74 OMAP UART2 312: 362 0 WUGEN 83 mmc2 313: 502 0 WUGEN 86 mmc0 314: 13 0 WUGEN 94 mmc1 350: 0 0 PRCM pinctrl, pinctrl 406: 35155709 0 GIC 109 ehci_hcd:usb1 407: 0 0 WUGEN 7 palmas 409: 0 0 WUGEN 119 twl6040 410: 0 0 twl6040 5 twl6040_irq_ready 411: 0 0 twl6040 0 twl6040_irq_th IPI0: 0 1 CPU wakeup interrupts IPI1: 0 0 Timer broadcast interrupts IPI2: 95334 902334 Rescheduling interrupts IPI3: 0 0 Function call interrupts IPI4: 479 648 Single function call interrupts IPI5: 0 0 CPU stop interrupts IPI6: 0 0 IRQ work interrupts IPI7: 0 0 completion interrupts Err: 0 Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Link: https://lkml.kernel.org/r/1426088629-15377-8-git-send-email-marc.zyngier@arm.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2015-03-11 23:43:49 +08:00
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
ARM: omap: pass minimal SoC/board data for UART from dt Pass minimal data needed for console boot, from dt, for OMAP4 panda/sdp and OMAP3 beagle boards, and get rid of the static initialization from generic board file. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Reviewed-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-12-14 19:55:46 +08:00
ti,hwmods = "uart3";
clock-frequency = <48000000>;
};
arm/dts: OMAP3&4: Remove the '0x' prefix for serial nodes Follow the DTS convention and thus name the nodes <name>@<address> without any '0x' prefix in the physical address. Suggested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-02-16 18:55:27 +08:00
uart4: serial@4806e000 {
ARM: omap: pass minimal SoC/board data for UART from dt Pass minimal data needed for console boot, from dt, for OMAP4 panda/sdp and OMAP3 beagle boards, and get rid of the static initialization from generic board file. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Reviewed-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-12-14 19:55:46 +08:00
compatible = "ti,omap4-uart";
ARM: dts: OMAP4: Add reg and interrupts for every nodes Thanks to Vaibhav <hvaibhav@ti.com> omap_device fix (ARM: OMAP: omap_device: Fix up resource names when booted with devicetre), we can now specify reg and interrupts using standard device tree attributes. Update the OMAP4 dtsi file with missing reg and interrupts attributes. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-09-05 17:38:23 +08:00
reg = <0x4806e000 0x100>;
ARM: omap: convert wakeupgen to stacked domains OMAP4/5 has been (ab)using the gic_arch_extn to provide wakeup from suspend, and it makes a lot of sense to convert this code to use stacked domains instead. This patch does just this, updating the DT files to actually reflect what the HW provides. BIG FAT WARNING: because the DTs were so far lying by not exposing the WUGEN HW block, kernels with this patch applied won't have any suspend-resume facility when booted with old DTs, and old kernels with updated DTs won't even boot. On a platform with this patch applied, the system looks like this: root@bacon-fat:~# cat /proc/interrupts CPU0 CPU1 16: 0 0 WUGEN 37 gp_timer 19: 233799 155916 GIC 27 arch_timer 23: 0 0 WUGEN 9 l3-dbg-irq 24: 1 0 WUGEN 10 l3-app-irq 27: 282 0 WUGEN 13 omap-dma-engine 44: 0 0 4ae10000.gpio 13 DMA 294: 0 0 WUGEN 20 gpmc 297: 506 0 WUGEN 56 48070000.i2c 298: 0 0 WUGEN 57 48072000.i2c 299: 0 0 WUGEN 61 48060000.i2c 300: 0 0 WUGEN 62 4807a000.i2c 301: 8 0 WUGEN 60 4807c000.i2c 308: 2439 0 WUGEN 74 OMAP UART2 312: 362 0 WUGEN 83 mmc2 313: 502 0 WUGEN 86 mmc0 314: 13 0 WUGEN 94 mmc1 350: 0 0 PRCM pinctrl, pinctrl 406: 35155709 0 GIC 109 ehci_hcd:usb1 407: 0 0 WUGEN 7 palmas 409: 0 0 WUGEN 119 twl6040 410: 0 0 twl6040 5 twl6040_irq_ready 411: 0 0 twl6040 0 twl6040_irq_th IPI0: 0 1 CPU wakeup interrupts IPI1: 0 0 Timer broadcast interrupts IPI2: 95334 902334 Rescheduling interrupts IPI3: 0 0 Function call interrupts IPI4: 479 648 Single function call interrupts IPI5: 0 0 CPU stop interrupts IPI6: 0 0 IRQ work interrupts IPI7: 0 0 completion interrupts Err: 0 Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Link: https://lkml.kernel.org/r/1426088629-15377-8-git-send-email-marc.zyngier@arm.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2015-03-11 23:43:49 +08:00
interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
ARM: omap: pass minimal SoC/board data for UART from dt Pass minimal data needed for console boot, from dt, for OMAP4 panda/sdp and OMAP3 beagle boards, and get rid of the static initialization from generic board file. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Reviewed-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-12-14 19:55:46 +08:00
ti,hwmods = "uart4";
clock-frequency = <48000000>;
};
arm/dts: OMAP4: Add i2c controller nodes Add i2c controllers nodes into the main ocp bus. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Grant Likely <grant.likely@secretlab.ca>
2011-08-17 21:30:03 +08:00
ARM: dts: OMAP4: Add hwspinlock node Add the hwspinlock device tree node for OMAP4 family of SoCs. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-10-11 05:15:33 +08:00
hwspinlock: spinlock@4a0f6000 {
compatible = "ti,omap4-hwspinlock";
reg = <0x4a0f6000 0x1000>;
ti,hwmods = "spinlock";
ARM: dts: OMAP: Add #hwlock-cells property to hwspinlock nodes Add a new generic property "#hwlock-cells" to the hwspinlock DT nodes on OMAP4, OMAP5 and AM33xx. This common property allows different platform implementations to define the args specifier length. OMAP implementations will always use a value of 1. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-01-14 08:26:45 +08:00
#hwlock-cells = <1>;
ARM: dts: OMAP4: Add hwspinlock node Add the hwspinlock device tree node for OMAP4 family of SoCs. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-10-11 05:15:33 +08:00
};
arm/dts: OMAP4: Add i2c controller nodes Add i2c controllers nodes into the main ocp bus. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Grant Likely <grant.likely@secretlab.ca>
2011-08-17 21:30:03 +08:00
i2c1: i2c@48070000 {
compatible = "ti,omap4-i2c";
ARM: dts: OMAP4: Add reg and interrupts for every nodes Thanks to Vaibhav <hvaibhav@ti.com> omap_device fix (ARM: OMAP: omap_device: Fix up resource names when booted with devicetre), we can now specify reg and interrupts using standard device tree attributes. Update the OMAP4 dtsi file with missing reg and interrupts attributes. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-09-05 17:38:23 +08:00
reg = <0x48070000 0x100>;
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
arm/dts: OMAP4: Add i2c controller nodes Add i2c controllers nodes into the main ocp bus. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Grant Likely <grant.likely@secretlab.ca>
2011-08-17 21:30:03 +08:00
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "i2c1";
};
i2c2: i2c@48072000 {
compatible = "ti,omap4-i2c";
ARM: dts: OMAP4: Add reg and interrupts for every nodes Thanks to Vaibhav <hvaibhav@ti.com> omap_device fix (ARM: OMAP: omap_device: Fix up resource names when booted with devicetre), we can now specify reg and interrupts using standard device tree attributes. Update the OMAP4 dtsi file with missing reg and interrupts attributes. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-09-05 17:38:23 +08:00
reg = <0x48072000 0x100>;
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
arm/dts: OMAP4: Add i2c controller nodes Add i2c controllers nodes into the main ocp bus. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Grant Likely <grant.likely@secretlab.ca>
2011-08-17 21:30:03 +08:00
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "i2c2";
};
i2c3: i2c@48060000 {
compatible = "ti,omap4-i2c";
ARM: dts: OMAP4: Add reg and interrupts for every nodes Thanks to Vaibhav <hvaibhav@ti.com> omap_device fix (ARM: OMAP: omap_device: Fix up resource names when booted with devicetre), we can now specify reg and interrupts using standard device tree attributes. Update the OMAP4 dtsi file with missing reg and interrupts attributes. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-09-05 17:38:23 +08:00
reg = <0x48060000 0x100>;
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
arm/dts: OMAP4: Add i2c controller nodes Add i2c controllers nodes into the main ocp bus. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Grant Likely <grant.likely@secretlab.ca>
2011-08-17 21:30:03 +08:00
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "i2c3";
};
i2c4: i2c@48350000 {
compatible = "ti,omap4-i2c";
ARM: dts: OMAP4: Add reg and interrupts for every nodes Thanks to Vaibhav <hvaibhav@ti.com> omap_device fix (ARM: OMAP: omap_device: Fix up resource names when booted with devicetre), we can now specify reg and interrupts using standard device tree attributes. Update the OMAP4 dtsi file with missing reg and interrupts attributes. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-09-05 17:38:23 +08:00
reg = <0x48350000 0x100>;
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
arm/dts: OMAP4: Add i2c controller nodes Add i2c controllers nodes into the main ocp bus. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Grant Likely <grant.likely@secretlab.ca>
2011-08-17 21:30:03 +08:00
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "i2c4";
};
arm/dts: OMAP4: Add SPI controller nodes Add the 4 McSPI controller nodes present in an OMAP4 device. Remove SPI static device initialisation if DT is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Acked-by: Rob Herring <rob.herring@calxeda.com>
2012-01-20 21:15:58 +08:00
mcspi1: spi@48098000 {
compatible = "ti,omap4-mcspi";
ARM: dts: OMAP4: Add reg and interrupts for every nodes Thanks to Vaibhav <hvaibhav@ti.com> omap_device fix (ARM: OMAP: omap_device: Fix up resource names when booted with devicetre), we can now specify reg and interrupts using standard device tree attributes. Update the OMAP4 dtsi file with missing reg and interrupts attributes. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-09-05 17:38:23 +08:00
reg = <0x48098000 0x200>;
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
arm/dts: OMAP4: Add SPI controller nodes Add the 4 McSPI controller nodes present in an OMAP4 device. Remove SPI static device initialisation if DT is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Acked-by: Rob Herring <rob.herring@calxeda.com>
2012-01-20 21:15:58 +08:00
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "mcspi1";
ti,spi-num-cs = <4>;
ARM: dts: OMAP2+: Add SDMA controller bindings and nodes Add SDMA controller binding for OMAP2+ devices and populate DMA client information for SPI and MMC peripheral on OMAP3+ devices. Please note that OMAP24xx devices do not have SPI and MMC bindings available yet and so DMA client information is not populated. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2012-04-27 02:47:59 +08:00
dmas = <&sdma 35>,
<&sdma 36>,
<&sdma 37>,
<&sdma 38>,
<&sdma 39>,
<&sdma 40>,
<&sdma 41>,
<&sdma 42>;
dma-names = "tx0", "rx0", "tx1", "rx1",
"tx2", "rx2", "tx3", "rx3";
arm/dts: OMAP4: Add SPI controller nodes Add the 4 McSPI controller nodes present in an OMAP4 device. Remove SPI static device initialisation if DT is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Acked-by: Rob Herring <rob.herring@calxeda.com>
2012-01-20 21:15:58 +08:00
};
mcspi2: spi@4809a000 {
compatible = "ti,omap4-mcspi";
ARM: dts: OMAP4: Add reg and interrupts for every nodes Thanks to Vaibhav <hvaibhav@ti.com> omap_device fix (ARM: OMAP: omap_device: Fix up resource names when booted with devicetre), we can now specify reg and interrupts using standard device tree attributes. Update the OMAP4 dtsi file with missing reg and interrupts attributes. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-09-05 17:38:23 +08:00
reg = <0x4809a000 0x200>;
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
arm/dts: OMAP4: Add SPI controller nodes Add the 4 McSPI controller nodes present in an OMAP4 device. Remove SPI static device initialisation if DT is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Acked-by: Rob Herring <rob.herring@calxeda.com>
2012-01-20 21:15:58 +08:00
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "mcspi2";
ti,spi-num-cs = <2>;
ARM: dts: OMAP2+: Add SDMA controller bindings and nodes Add SDMA controller binding for OMAP2+ devices and populate DMA client information for SPI and MMC peripheral on OMAP3+ devices. Please note that OMAP24xx devices do not have SPI and MMC bindings available yet and so DMA client information is not populated. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2012-04-27 02:47:59 +08:00
dmas = <&sdma 43>,
<&sdma 44>,
<&sdma 45>,
<&sdma 46>;
dma-names = "tx0", "rx0", "tx1", "rx1";
arm/dts: OMAP4: Add SPI controller nodes Add the 4 McSPI controller nodes present in an OMAP4 device. Remove SPI static device initialisation if DT is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Acked-by: Rob Herring <rob.herring@calxeda.com>
2012-01-20 21:15:58 +08:00
};
mcspi3: spi@480b8000 {
compatible = "ti,omap4-mcspi";
ARM: dts: OMAP4: Add reg and interrupts for every nodes Thanks to Vaibhav <hvaibhav@ti.com> omap_device fix (ARM: OMAP: omap_device: Fix up resource names when booted with devicetre), we can now specify reg and interrupts using standard device tree attributes. Update the OMAP4 dtsi file with missing reg and interrupts attributes. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-09-05 17:38:23 +08:00
reg = <0x480b8000 0x200>;
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
arm/dts: OMAP4: Add SPI controller nodes Add the 4 McSPI controller nodes present in an OMAP4 device. Remove SPI static device initialisation if DT is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Acked-by: Rob Herring <rob.herring@calxeda.com>
2012-01-20 21:15:58 +08:00
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "mcspi3";
ti,spi-num-cs = <2>;
ARM: dts: OMAP2+: Add SDMA controller bindings and nodes Add SDMA controller binding for OMAP2+ devices and populate DMA client information for SPI and MMC peripheral on OMAP3+ devices. Please note that OMAP24xx devices do not have SPI and MMC bindings available yet and so DMA client information is not populated. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2012-04-27 02:47:59 +08:00
dmas = <&sdma 15>, <&sdma 16>;
dma-names = "tx0", "rx0";
arm/dts: OMAP4: Add SPI controller nodes Add the 4 McSPI controller nodes present in an OMAP4 device. Remove SPI static device initialisation if DT is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Acked-by: Rob Herring <rob.herring@calxeda.com>
2012-01-20 21:15:58 +08:00
};
mcspi4: spi@480ba000 {
compatible = "ti,omap4-mcspi";
ARM: dts: OMAP4: Add reg and interrupts for every nodes Thanks to Vaibhav <hvaibhav@ti.com> omap_device fix (ARM: OMAP: omap_device: Fix up resource names when booted with devicetre), we can now specify reg and interrupts using standard device tree attributes. Update the OMAP4 dtsi file with missing reg and interrupts attributes. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-09-05 17:38:23 +08:00
reg = <0x480ba000 0x200>;
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
arm/dts: OMAP4: Add SPI controller nodes Add the 4 McSPI controller nodes present in an OMAP4 device. Remove SPI static device initialisation if DT is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Acked-by: Rob Herring <rob.herring@calxeda.com>
2012-01-20 21:15:58 +08:00
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "mcspi4";
ti,spi-num-cs = <1>;
ARM: dts: OMAP2+: Add SDMA controller bindings and nodes Add SDMA controller binding for OMAP2+ devices and populate DMA client information for SPI and MMC peripheral on OMAP3+ devices. Please note that OMAP24xx devices do not have SPI and MMC bindings available yet and so DMA client information is not populated. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2012-04-27 02:47:59 +08:00
dmas = <&sdma 70>, <&sdma 71>;
dma-names = "tx0", "rx0";
arm/dts: OMAP4: Add SPI controller nodes Add the 4 McSPI controller nodes present in an OMAP4 device. Remove SPI static device initialisation if DT is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Acked-by: Rob Herring <rob.herring@calxeda.com>
2012-01-20 21:15:58 +08:00
};
arm/dts: OMAP4: Add mmc controller nodes and board data Add OMAP mmc related device tree data for OMAP4. Currenly limited to only omap4-panda and omap4-sdp boards. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2011-10-04 19:40:27 +08:00
mmc1: mmc@4809c000 {
compatible = "ti,omap4-hsmmc";
ARM: dts: OMAP4: Add reg and interrupts for every nodes Thanks to Vaibhav <hvaibhav@ti.com> omap_device fix (ARM: OMAP: omap_device: Fix up resource names when booted with devicetre), we can now specify reg and interrupts using standard device tree attributes. Update the OMAP4 dtsi file with missing reg and interrupts attributes. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-09-05 17:38:23 +08:00
reg = <0x4809c000 0x400>;
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
arm/dts: OMAP4: Add mmc controller nodes and board data Add OMAP mmc related device tree data for OMAP4. Currenly limited to only omap4-panda and omap4-sdp boards. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2011-10-04 19:40:27 +08:00
ti,hwmods = "mmc1";
ti,dual-volt;
ti,needs-special-reset;
ARM: dts: OMAP2+: Add SDMA controller bindings and nodes Add SDMA controller binding for OMAP2+ devices and populate DMA client information for SPI and MMC peripheral on OMAP3+ devices. Please note that OMAP24xx devices do not have SPI and MMC bindings available yet and so DMA client information is not populated. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2012-04-27 02:47:59 +08:00
dmas = <&sdma 61>, <&sdma 62>;
dma-names = "tx", "rx";
ARM: dts: add pbias dt node Add pbias regulator node as a child of system control module - syscon. Signed-off-by: Balaji T K <balajitk@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Tested-by: Florian Vaussard <florian.vaussard@epfl.ch> Tested-by: Stefan Roese <sr@denx.de> Signed-off-by: Chris Ball <chris@printf.net>
2014-02-19 22:56:40 +08:00
pbias-supply = <&pbias_mmc_reg>;
arm/dts: OMAP4: Add mmc controller nodes and board data Add OMAP mmc related device tree data for OMAP4. Currenly limited to only omap4-panda and omap4-sdp boards. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2011-10-04 19:40:27 +08:00
};
mmc2: mmc@480b4000 {
compatible = "ti,omap4-hsmmc";
ARM: dts: OMAP4: Add reg and interrupts for every nodes Thanks to Vaibhav <hvaibhav@ti.com> omap_device fix (ARM: OMAP: omap_device: Fix up resource names when booted with devicetre), we can now specify reg and interrupts using standard device tree attributes. Update the OMAP4 dtsi file with missing reg and interrupts attributes. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-09-05 17:38:23 +08:00
reg = <0x480b4000 0x400>;
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
arm/dts: OMAP4: Add mmc controller nodes and board data Add OMAP mmc related device tree data for OMAP4. Currenly limited to only omap4-panda and omap4-sdp boards. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2011-10-04 19:40:27 +08:00
ti,hwmods = "mmc2";
ti,needs-special-reset;
ARM: dts: OMAP2+: Add SDMA controller bindings and nodes Add SDMA controller binding for OMAP2+ devices and populate DMA client information for SPI and MMC peripheral on OMAP3+ devices. Please note that OMAP24xx devices do not have SPI and MMC bindings available yet and so DMA client information is not populated. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2012-04-27 02:47:59 +08:00
dmas = <&sdma 47>, <&sdma 48>;
dma-names = "tx", "rx";
arm/dts: OMAP4: Add mmc controller nodes and board data Add OMAP mmc related device tree data for OMAP4. Currenly limited to only omap4-panda and omap4-sdp boards. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2011-10-04 19:40:27 +08:00
};
mmc3: mmc@480ad000 {
compatible = "ti,omap4-hsmmc";
ARM: dts: OMAP4: Add reg and interrupts for every nodes Thanks to Vaibhav <hvaibhav@ti.com> omap_device fix (ARM: OMAP: omap_device: Fix up resource names when booted with devicetre), we can now specify reg and interrupts using standard device tree attributes. Update the OMAP4 dtsi file with missing reg and interrupts attributes. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-09-05 17:38:23 +08:00
reg = <0x480ad000 0x400>;
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
arm/dts: OMAP4: Add mmc controller nodes and board data Add OMAP mmc related device tree data for OMAP4. Currenly limited to only omap4-panda and omap4-sdp boards. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2011-10-04 19:40:27 +08:00
ti,hwmods = "mmc3";
ti,needs-special-reset;
ARM: dts: OMAP2+: Add SDMA controller bindings and nodes Add SDMA controller binding for OMAP2+ devices and populate DMA client information for SPI and MMC peripheral on OMAP3+ devices. Please note that OMAP24xx devices do not have SPI and MMC bindings available yet and so DMA client information is not populated. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2012-04-27 02:47:59 +08:00
dmas = <&sdma 77>, <&sdma 78>;
dma-names = "tx", "rx";
arm/dts: OMAP4: Add mmc controller nodes and board data Add OMAP mmc related device tree data for OMAP4. Currenly limited to only omap4-panda and omap4-sdp boards. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2011-10-04 19:40:27 +08:00
};
mmc4: mmc@480d1000 {
compatible = "ti,omap4-hsmmc";
ARM: dts: OMAP4: Add reg and interrupts for every nodes Thanks to Vaibhav <hvaibhav@ti.com> omap_device fix (ARM: OMAP: omap_device: Fix up resource names when booted with devicetre), we can now specify reg and interrupts using standard device tree attributes. Update the OMAP4 dtsi file with missing reg and interrupts attributes. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-09-05 17:38:23 +08:00
reg = <0x480d1000 0x400>;
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
arm/dts: OMAP4: Add mmc controller nodes and board data Add OMAP mmc related device tree data for OMAP4. Currenly limited to only omap4-panda and omap4-sdp boards. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2011-10-04 19:40:27 +08:00
ti,hwmods = "mmc4";
ti,needs-special-reset;
ARM: dts: OMAP2+: Add SDMA controller bindings and nodes Add SDMA controller binding for OMAP2+ devices and populate DMA client information for SPI and MMC peripheral on OMAP3+ devices. Please note that OMAP24xx devices do not have SPI and MMC bindings available yet and so DMA client information is not populated. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2012-04-27 02:47:59 +08:00
dmas = <&sdma 57>, <&sdma 58>;
dma-names = "tx", "rx";
arm/dts: OMAP4: Add mmc controller nodes and board data Add OMAP mmc related device tree data for OMAP4. Currenly limited to only omap4-panda and omap4-sdp boards. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2011-10-04 19:40:27 +08:00
};
mmc5: mmc@480d5000 {
compatible = "ti,omap4-hsmmc";
ARM: dts: OMAP4: Add reg and interrupts for every nodes Thanks to Vaibhav <hvaibhav@ti.com> omap_device fix (ARM: OMAP: omap_device: Fix up resource names when booted with devicetre), we can now specify reg and interrupts using standard device tree attributes. Update the OMAP4 dtsi file with missing reg and interrupts attributes. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-09-05 17:38:23 +08:00
reg = <0x480d5000 0x400>;
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
arm/dts: OMAP4: Add mmc controller nodes and board data Add OMAP mmc related device tree data for OMAP4. Currenly limited to only omap4-panda and omap4-sdp boards. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2011-10-04 19:40:27 +08:00
ti,hwmods = "mmc5";
ti,needs-special-reset;
ARM: dts: OMAP2+: Add SDMA controller bindings and nodes Add SDMA controller binding for OMAP2+ devices and populate DMA client information for SPI and MMC peripheral on OMAP3+ devices. Please note that OMAP24xx devices do not have SPI and MMC bindings available yet and so DMA client information is not populated. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2012-04-27 02:47:59 +08:00
dmas = <&sdma 59>, <&sdma 60>;
dma-names = "tx", "rx";
arm/dts: OMAP4: Add mmc controller nodes and board data Add OMAP mmc related device tree data for OMAP4. Currenly limited to only omap4-panda and omap4-sdp boards. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2011-10-04 19:40:27 +08:00
};
arm/dts: add wdt node for omap3 and omap4 Add wdt node to support dt. Signed-off-by: Xiao Jiang <jgq516@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-01 12:44:14 +08:00
ARM: dts: OMAP4: Add IOMMU nodes Add the IOMMU nodes for the DSP and IPU subsystems. The MMU within the IPU sub-system also supports a bus error back capability, not available on the DSP MMU. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> [s-anna@ti.com: IPU bus error back addition] Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-03-06 08:24:18 +08:00
mmu_dsp: mmu@4a066000 {
compatible = "ti,omap4-iommu";
reg = <0x4a066000 0x100>;
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mmu_dsp";
ARM: dts: OMAP4: Add #iommu-cells property to IOMMUs Add missing #iommu-cells property to the DSP and IPU IOMMU nodes for OMAP4 platforms. This property is required as per the generic iommu binding. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-07-11 01:28:55 +08:00
#iommu-cells = <0>;
ARM: dts: OMAP4: Add IOMMU nodes Add the IOMMU nodes for the DSP and IPU subsystems. The MMU within the IPU sub-system also supports a bus error back capability, not available on the DSP MMU. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> [s-anna@ti.com: IPU bus error back addition] Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-03-06 08:24:18 +08:00
};
mmu_ipu: mmu@55082000 {
compatible = "ti,omap4-iommu";
reg = <0x55082000 0x100>;
interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mmu_ipu";
ARM: dts: OMAP4: Add #iommu-cells property to IOMMUs Add missing #iommu-cells property to the DSP and IPU IOMMU nodes for OMAP4 platforms. This property is required as per the generic iommu binding. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-07-11 01:28:55 +08:00
#iommu-cells = <0>;
ARM: dts: OMAP4: Add IOMMU nodes Add the IOMMU nodes for the DSP and IPU subsystems. The MMU within the IPU sub-system also supports a bus error back capability, not available on the DSP MMU. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> [s-anna@ti.com: IPU bus error back addition] Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-03-06 08:24:18 +08:00
ti,iommu-bus-err-back;
};
arm/dts: add wdt node for omap3 and omap4 Add wdt node to support dt. Signed-off-by: Xiao Jiang <jgq516@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-01 12:44:14 +08:00
wdt2: wdt@4a314000 {
compatible = "ti,omap4-wdt", "ti,omap3-wdt";
ARM: dts: OMAP4: Add reg and interrupts for every nodes Thanks to Vaibhav <hvaibhav@ti.com> omap_device fix (ARM: OMAP: omap_device: Fix up resource names when booted with devicetre), we can now specify reg and interrupts using standard device tree attributes. Update the OMAP4 dtsi file with missing reg and interrupts attributes. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-09-05 17:38:23 +08:00
reg = <0x4a314000 0x80>;
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
arm/dts: add wdt node for omap3 and omap4 Add wdt node to support dt. Signed-off-by: Xiao Jiang <jgq516@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-01 12:44:14 +08:00
ti,hwmods = "wd_timer2";
};
arm/dts: omap4: Add entry for OMAP McPDM IP McPDM is used on OMAP4 based boards to communicate with an external audio codec (twl6040). Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-08 22:01:59 +08:00
mcpdm: mcpdm@40132000 {
compatible = "ti,omap4-mcpdm";
reg = <0x40132000 0x7f>, /* MPU private access */
<0x49032000 0x7f>; /* L3 Interconnect */
ARM: dts: omap4: Add reg-names for McPDM and DMIC In order to get the memory areas by name when booted with DT. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-08-29 21:31:06 +08:00
reg-names = "mpu", "dma";
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
arm/dts: omap4: Add entry for OMAP McPDM IP McPDM is used on OMAP4 based boards to communicate with an external audio codec (twl6040). Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-08 22:01:59 +08:00
ti,hwmods = "mcpdm";
ARM: dts: OMAP2+: Add SDMA Audio IPs bindings Populate DMA client information for McBSP DMIC and McPDM periperhal on OMAP2+ devices. Signed-off-by: Sebastien Guiriec <s-guiriec@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-11 15:50:21 +08:00
dmas = <&sdma 65>,
<&sdma 66>;
dma-names = "up_link", "dn_link";
ARM: dts: omap4: Set all audio related IP's status to disabled as default Board dts files will need to enable the IP nodes which they are using and does not have to care about the not used ones (to disable them). Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-01-24 16:19:01 +08:00
status = "disabled";
arm/dts: omap4: Add entry for OMAP McPDM IP McPDM is used on OMAP4 based boards to communicate with an external audio codec (twl6040). Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-08 22:01:59 +08:00
};
arm/dts: omap4: Add entry for OMAP DMIC IP DMIC IP is used to connect up to 6 digital microphones directly to OMAP. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-08 22:02:00 +08:00
dmic: dmic@4012e000 {
compatible = "ti,omap4-dmic";
reg = <0x4012e000 0x7f>, /* MPU private access */
<0x4902e000 0x7f>; /* L3 Interconnect */
ARM: dts: omap4: Add reg-names for McPDM and DMIC In order to get the memory areas by name when booted with DT. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-08-29 21:31:06 +08:00
reg-names = "mpu", "dma";
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
arm/dts: omap4: Add entry for OMAP DMIC IP DMIC IP is used to connect up to 6 digital microphones directly to OMAP. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-08 22:02:00 +08:00
ti,hwmods = "dmic";
ARM: dts: OMAP2+: Add SDMA Audio IPs bindings Populate DMA client information for McBSP DMIC and McPDM periperhal on OMAP2+ devices. Signed-off-by: Sebastien Guiriec <s-guiriec@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-11 15:50:21 +08:00
dmas = <&sdma 67>;
dma-names = "up_link";
ARM: dts: omap4: Set all audio related IP's status to disabled as default Board dts files will need to enable the IP nodes which they are using and does not have to care about the not used ones (to disable them). Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-01-24 16:19:01 +08:00
status = "disabled";
arm/dts: omap4: Add entry for OMAP DMIC IP DMIC IP is used to connect up to 6 digital microphones directly to OMAP. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-08 22:02:00 +08:00
};
ARM: dts: omap4-sdp: Add keypad data Add keypad data node in omap4 device tree file. Also fill the device tree binding parameters with the required value in "omap4-sdp" dts file. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com> [b-cousson@ti.com: Re-align the entries and the comments]
2012-08-14 19:15:37 +08:00
ARM: dts: omap4: Add McBSP entries Create the sections describing the McBSP ports to be able to use them via DT. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-07-26 22:13:21 +08:00
mcbsp1: mcbsp@40122000 {
compatible = "ti,omap4-mcbsp";
reg = <0x40122000 0xff>, /* MPU private access */
<0x49022000 0xff>; /* L3 Interconnect */
reg-names = "mpu", "dma";
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
ARM: dts: omap4: Add McBSP entries Create the sections describing the McBSP ports to be able to use them via DT. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-07-26 22:13:21 +08:00
interrupt-names = "common";
ti,buffer-size = <128>;
ti,hwmods = "mcbsp1";
ARM: dts: OMAP2+: Add SDMA Audio IPs bindings Populate DMA client information for McBSP DMIC and McPDM periperhal on OMAP2+ devices. Signed-off-by: Sebastien Guiriec <s-guiriec@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-11 15:50:21 +08:00
dmas = <&sdma 33>,
<&sdma 34>;
dma-names = "tx", "rx";
ARM: dts: omap4: Set all audio related IP's status to disabled as default Board dts files will need to enable the IP nodes which they are using and does not have to care about the not used ones (to disable them). Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-01-24 16:19:01 +08:00
status = "disabled";
ARM: dts: omap4: Add McBSP entries Create the sections describing the McBSP ports to be able to use them via DT. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-07-26 22:13:21 +08:00
};
mcbsp2: mcbsp@40124000 {
compatible = "ti,omap4-mcbsp";
reg = <0x40124000 0xff>, /* MPU private access */
<0x49024000 0xff>; /* L3 Interconnect */
reg-names = "mpu", "dma";
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
ARM: dts: omap4: Add McBSP entries Create the sections describing the McBSP ports to be able to use them via DT. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-07-26 22:13:21 +08:00
interrupt-names = "common";
ti,buffer-size = <128>;
ti,hwmods = "mcbsp2";
ARM: dts: OMAP2+: Add SDMA Audio IPs bindings Populate DMA client information for McBSP DMIC and McPDM periperhal on OMAP2+ devices. Signed-off-by: Sebastien Guiriec <s-guiriec@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-11 15:50:21 +08:00
dmas = <&sdma 17>,
<&sdma 18>;
dma-names = "tx", "rx";
ARM: dts: omap4: Set all audio related IP's status to disabled as default Board dts files will need to enable the IP nodes which they are using and does not have to care about the not used ones (to disable them). Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-01-24 16:19:01 +08:00
status = "disabled";
ARM: dts: omap4: Add McBSP entries Create the sections describing the McBSP ports to be able to use them via DT. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-07-26 22:13:21 +08:00
};
mcbsp3: mcbsp@40126000 {
compatible = "ti,omap4-mcbsp";
reg = <0x40126000 0xff>, /* MPU private access */
<0x49026000 0xff>; /* L3 Interconnect */
reg-names = "mpu", "dma";
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
ARM: dts: omap4: Add McBSP entries Create the sections describing the McBSP ports to be able to use them via DT. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-07-26 22:13:21 +08:00
interrupt-names = "common";
ti,buffer-size = <128>;
ti,hwmods = "mcbsp3";
ARM: dts: OMAP2+: Add SDMA Audio IPs bindings Populate DMA client information for McBSP DMIC and McPDM periperhal on OMAP2+ devices. Signed-off-by: Sebastien Guiriec <s-guiriec@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-11 15:50:21 +08:00
dmas = <&sdma 19>,
<&sdma 20>;
dma-names = "tx", "rx";
ARM: dts: omap4: Set all audio related IP's status to disabled as default Board dts files will need to enable the IP nodes which they are using and does not have to care about the not used ones (to disable them). Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-01-24 16:19:01 +08:00
status = "disabled";
ARM: dts: omap4: Add McBSP entries Create the sections describing the McBSP ports to be able to use them via DT. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-07-26 22:13:21 +08:00
};
mcbsp4: mcbsp@48096000 {
compatible = "ti,omap4-mcbsp";
reg = <0x48096000 0xff>; /* L4 Interconnect */
reg-names = "mpu";
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
ARM: dts: omap4: Add McBSP entries Create the sections describing the McBSP ports to be able to use them via DT. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-07-26 22:13:21 +08:00
interrupt-names = "common";
ti,buffer-size = <128>;
ti,hwmods = "mcbsp4";
ARM: dts: OMAP2+: Add SDMA Audio IPs bindings Populate DMA client information for McBSP DMIC and McPDM periperhal on OMAP2+ devices. Signed-off-by: Sebastien Guiriec <s-guiriec@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-11 15:50:21 +08:00
dmas = <&sdma 31>,
<&sdma 32>;
dma-names = "tx", "rx";
ARM: dts: omap4: Set all audio related IP's status to disabled as default Board dts files will need to enable the IP nodes which they are using and does not have to care about the not used ones (to disable them). Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-01-24 16:19:01 +08:00
status = "disabled";
ARM: dts: omap4: Add McBSP entries Create the sections describing the McBSP ports to be able to use them via DT. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-07-26 22:13:21 +08:00
};
ARM: dts: omap4-sdp: Add keypad data Add keypad data node in omap4 device tree file. Also fill the device tree binding parameters with the required value in "omap4-sdp" dts file. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com> [b-cousson@ti.com: Re-align the entries and the comments]
2012-08-14 19:15:37 +08:00
keypad: keypad@4a31c000 {
compatible = "ti,omap4-keypad";
ARM: dts: OMAP4: Add reg and interrupts for every nodes Thanks to Vaibhav <hvaibhav@ti.com> omap_device fix (ARM: OMAP: omap_device: Fix up resource names when booted with devicetre), we can now specify reg and interrupts using standard device tree attributes. Update the OMAP4 dtsi file with missing reg and interrupts attributes. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-09-05 17:38:23 +08:00
reg = <0x4a31c000 0x80>;
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
ARM: dts: OMAP4: Add reg and interrupts for every nodes Thanks to Vaibhav <hvaibhav@ti.com> omap_device fix (ARM: OMAP: omap_device: Fix up resource names when booted with devicetre), we can now specify reg and interrupts using standard device tree attributes. Update the OMAP4 dtsi file with missing reg and interrupts attributes. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-09-05 17:38:23 +08:00
reg-names = "mpu";
ARM: dts: omap4-sdp: Add keypad data Add keypad data node in omap4 device tree file. Also fill the device tree binding parameters with the required value in "omap4-sdp" dts file. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com> [b-cousson@ti.com: Re-align the entries and the comments]
2012-08-14 19:15:37 +08:00
ti,hwmods = "kbd";
};
ARM: dts: EMIF and LPDDR2 device tree data for OMAP4 boards Device tree data for the EMIF sdram controllers in OMAP4 and LPDDR2 memory devices attached to OMAP4 boards. Reviewed-by: Grant Likely <grant.likely@secretlab.ca> Tested-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Aneesh V <aneesh@ti.com> [santosh.shilimkar@ti.com: Rebased against 3.6-rc] Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> [b-cousson@ti.com: Use label in board to access EMIF nodes] Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-01-20 23:05:26 +08:00
ARM: dts: omap4+: Add DMM bindings Add Dynamic Memory Manager (DMM) bindings for OMAP4 and OMAP5 and DRA7x devices. DMM only requires address and irq information. Add documentation for the DMM bindings. Originally worked on by Andy Gross <andygro@gmail.com> Cc: Andy Gross <andygro@gmail.com> Signed-off-by: Archit Taneja <archit@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-12-17 18:02:21 +08:00
dmm@4e000000 {
compatible = "ti,omap4-dmm";
reg = <0x4e000000 0x800>;
interrupts = <0 113 0x4>;
ti,hwmods = "dmm";
};
ARM: dts: EMIF and LPDDR2 device tree data for OMAP4 boards Device tree data for the EMIF sdram controllers in OMAP4 and LPDDR2 memory devices attached to OMAP4 boards. Reviewed-by: Grant Likely <grant.likely@secretlab.ca> Tested-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Aneesh V <aneesh@ti.com> [santosh.shilimkar@ti.com: Rebased against 3.6-rc] Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> [b-cousson@ti.com: Use label in board to access EMIF nodes] Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-01-20 23:05:26 +08:00
emif1: emif@4c000000 {
compatible = "ti,emif-4d";
ARM: dts: OMAP4: Add reg and interrupts for every nodes Thanks to Vaibhav <hvaibhav@ti.com> omap_device fix (ARM: OMAP: omap_device: Fix up resource names when booted with devicetre), we can now specify reg and interrupts using standard device tree attributes. Update the OMAP4 dtsi file with missing reg and interrupts attributes. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-09-05 17:38:23 +08:00
reg = <0x4c000000 0x100>;
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
ARM: dts: EMIF and LPDDR2 device tree data for OMAP4 boards Device tree data for the EMIF sdram controllers in OMAP4 and LPDDR2 memory devices attached to OMAP4 boards. Reviewed-by: Grant Likely <grant.likely@secretlab.ca> Tested-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Aneesh V <aneesh@ti.com> [santosh.shilimkar@ti.com: Rebased against 3.6-rc] Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> [b-cousson@ti.com: Use label in board to access EMIF nodes] Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-01-20 23:05:26 +08:00
ti,hwmods = "emif1";
ARM: dts: omap: Add reset/idle on init bindings for OMAP On OMAP we have co-processor IPs, memory controllers, GPIOs which control regulators and power switches to PMIC, and SoC internal Bus IPs, some or most of which should either not be reset or idled or both at init. (In some cases there are erratas which prevent an IP from being reset) Have a way to pass this information from DT. Update the am33xx/omap4 and omap5 dtsi files with the new bindings for modules which either should not be idled. reset or both. A later patch would cleanup the same information that exists today as part of the hwmod data files. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-10-15 15:07:50 +08:00
ti,no-idle-on-init;
ARM: dts: EMIF and LPDDR2 device tree data for OMAP4 boards Device tree data for the EMIF sdram controllers in OMAP4 and LPDDR2 memory devices attached to OMAP4 boards. Reviewed-by: Grant Likely <grant.likely@secretlab.ca> Tested-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Aneesh V <aneesh@ti.com> [santosh.shilimkar@ti.com: Rebased against 3.6-rc] Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> [b-cousson@ti.com: Use label in board to access EMIF nodes] Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-01-20 23:05:26 +08:00
phy-type = <1>;
hw-caps-read-idle-ctrl;
hw-caps-ll-interface;
hw-caps-temp-alert;
};
emif2: emif@4d000000 {
compatible = "ti,emif-4d";
ARM: dts: OMAP4: Add reg and interrupts for every nodes Thanks to Vaibhav <hvaibhav@ti.com> omap_device fix (ARM: OMAP: omap_device: Fix up resource names when booted with devicetre), we can now specify reg and interrupts using standard device tree attributes. Update the OMAP4 dtsi file with missing reg and interrupts attributes. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-09-05 17:38:23 +08:00
reg = <0x4d000000 0x100>;
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
ARM: dts: EMIF and LPDDR2 device tree data for OMAP4 boards Device tree data for the EMIF sdram controllers in OMAP4 and LPDDR2 memory devices attached to OMAP4 boards. Reviewed-by: Grant Likely <grant.likely@secretlab.ca> Tested-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Aneesh V <aneesh@ti.com> [santosh.shilimkar@ti.com: Rebased against 3.6-rc] Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> [b-cousson@ti.com: Use label in board to access EMIF nodes] Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-01-20 23:05:26 +08:00
ti,hwmods = "emif2";
ARM: dts: omap: Add reset/idle on init bindings for OMAP On OMAP we have co-processor IPs, memory controllers, GPIOs which control regulators and power switches to PMIC, and SoC internal Bus IPs, some or most of which should either not be reset or idled or both at init. (In some cases there are erratas which prevent an IP from being reset) Have a way to pass this information from DT. Update the am33xx/omap4 and omap5 dtsi files with the new bindings for modules which either should not be idled. reset or both. A later patch would cleanup the same information that exists today as part of the hwmod data files. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-10-15 15:07:50 +08:00
ti,no-idle-on-init;
ARM: dts: EMIF and LPDDR2 device tree data for OMAP4 boards Device tree data for the EMIF sdram controllers in OMAP4 and LPDDR2 memory devices attached to OMAP4 boards. Reviewed-by: Grant Likely <grant.likely@secretlab.ca> Tested-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Aneesh V <aneesh@ti.com> [santosh.shilimkar@ti.com: Rebased against 3.6-rc] Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> [b-cousson@ti.com: Use label in board to access EMIF nodes] Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-01-20 23:05:26 +08:00
phy-type = <1>;
hw-caps-read-idle-ctrl;
hw-caps-ll-interface;
hw-caps-temp-alert;
};
ARM: soc: driver specific changes - A long-coming conversion of various platforms to a common LED infrastructure - AT91 is moved over to use the newer MCI driver for MMC - Pincontrol conversions for samsung platforms - DT bindings for gscaler on samsung - i2c driver fixes for tegra, acked by i2c maintainer -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJQaO48AAoJEIwa5zzehBx3excP/ieEkRhvfnWxdYST6ekvGIQr nEyskOh2rVjgYKmSXUJyKSbvG+7bZ8VIxvPvojeAJ/R84pTFMzbR2F0CaPKzAuSW inDt6c0Bnx1NZlfUTAoXcz7feyq9zHYNs9BCLoPU0bYNchCCqcWSKzqnpXk2ph/P LFnmNa0j6a4E3QJYAjM2zFvc3Tgk+MWTq1fWwNFvsWTh2WbQtmB/iGnzT5Xs4XQh u1SSx5tz0lcF5zQRGmJhXgL5+nnIP4sRwRUBAkpe3Gv5cM6WBVEBRDANa5QpbUL2 RXK5YyCTIln2Me4bPk32zEBLjiZ/WXbmiA2uwoqVgy6XToubemDXd0PtKmjj5tZ1 BkTD1DND7BKBEQnJj/GBECEdvx2FbrKfruoPcJHvXPZ7Svn5Dt/MWYJQIkRFkuhL zlVNoDGWlU8nScGrgmTM56UvWmGWC3UFsWSgdVQNfW9yEva+G1FvRUwUH02Ip5Ad 4r28JFIn6zyjtM99ZHipU6C6Rze2ordC7fl5X5LBLkVOobioblxCAhIhcqkhfKsk rFriNsdfYs7SrJA7mK7GzvaMEJgp/5o1noJKXI7ZBcLI8yYagzbQbPu/vGi6G6d3 0xC7NaTEJbtoXoDAtmtilLRxmw0YCXgVBBGua0K2YKpcRwnzCHNbV4gsLMnDuOXS HP4M96LxLHJlLGCxhEme =ck7M -----END PGP SIGNATURE----- Merge tag 'drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM soc driver specific changes from Olof Johansson: - A long-coming conversion of various platforms to a common LED infrastructure - AT91 is moved over to use the newer MCI driver for MMC - Pincontrol conversions for samsung platforms - DT bindings for gscaler on samsung - i2c driver fixes for tegra, acked by i2c maintainer Fix up conflicts as per Olof. * tag 'drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (48 commits) drivers: bus: omap_l3: use resources instead of hardcoded irqs pinctrl: exynos: Fix wakeup IRQ domain registration check pinctrl: samsung: Uninline samsung_pinctrl_get_soc_data pinctrl: exynos: Correct the detection of wakeup-eint node pinctrl: exynos: Mark exynos_irq_demux_eint as inline pinctrl: exynos: Handle only unmasked wakeup interrupts pinctrl: exynos: Fix typos in gpio/wkup _irq_mask pinctrl: exynos: Set pin function to EINT in irq_set_type of GPIO EINTa drivers: bus: Move the OMAP interconnect driver to drivers/bus/ i2c: tegra: dynamically control fast clk i2c: tegra: I2_M_NOSTART functionality not supported in Tegra20 ARM: tegra: clock: remove unused clock entry for i2c ARM: tegra: clock: add connection name in i2c clock entry i2c: tegra: pass proper name for getting clock ARM: tegra: clock: add i2c fast clock entry in clock table ARM: EXYNOS: Adds G-Scaler device from Device Tree ARM: EXYNOS: Add clock support for G-Scaler ARM: EXYNOS: Enable pinctrl driver support for EXYNOS4 device tree enabled platform ARM: dts: Add pinctrl node entries for SAMSUNG EXYNOS4210 SoC ARM: EXYNOS: skip wakeup interrupt setup if pinctrl driver is used ...
2012-10-02 09:46:13 +08:00
ARM: dts: OMAP4: add *reg* property for ocp2scp *reg* property for ocp2scp was previously obtained from ti,hwmods property. But that is now explicitly added to the dt node. Also updated the documentation with *reg* info. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-09-19 18:32:51 +08:00
ocp2scp@4a0ad000 {
arm/dts: omap4: Add ocp2scp data Add ocp2scp data node in omap4 device tree file. Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-08-22 16:40:03 +08:00
compatible = "ti,omap-ocp2scp";
ARM: dts: OMAP4: add *reg* property for ocp2scp *reg* property for ocp2scp was previously obtained from ti,hwmods property. But that is now explicitly added to the dt node. Also updated the documentation with *reg* info. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-09-19 18:32:51 +08:00
reg = <0x4a0ad000 0x1f>;
arm/dts: omap4: Add ocp2scp data Add ocp2scp data node in omap4 device tree file. Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-08-22 16:40:03 +08:00
#address-cells = <1>;
#size-cells = <1>;
ranges;
ti,hwmods = "ocp2scp_usb_phy";
ARM: dts: OMAP4: Add omap-usb2 data Add omap-usb2 data node in omap4 device tree file. Since omap-usb2 is connected to ocp2scp, omap-usb2 dt data is added as a child node of ocp2scp. The information about this data node is availabe @ Documentation/devicetree/bindings/usb/usb-phy.txt Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-07 21:35:15 +08:00
usb2_phy: usb2phy@4a0ad080 {
compatible = "ti,omap-usb2";
reg = <0x4a0ad080 0x58>;
ARM: dts: omap4: update omap-control-usb nodes Split otghs_ctrl and USB2 PHY power-down into separate omap-control-usb nodes. Get rid of "ti,type" property. Also get rid of "ti,has-mailbox" property from usb_otg_hs node and provide the ctrl-module phandle. CC: Benoit Cousson <bcousson@baylibre.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-10-03 23:12:36 +08:00
ctrl-module = <&omap_control_usb2phy>;
ARM: dts: omap4+: Add clocks to USB2 PHY node The USB2 PHY driver expects named clocks for wakeup clock and reference clock. Provide this information for USB2 PHY nodes in OMAP4 and OMAP5 SoC DTS. CC: Benoît Cousson <bcousson@baylibre.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-05-05 17:54:42 +08:00
clocks = <&usb_phy_cm_clk32k>;
clock-names = "wkupclk";
ARM: dts: omap: update usb_otg_hs data Updated the usb_otg_hs dt data to include the *phy* and *phy-names* binding in order for the driver to use the new generic PHY framework. Also updated the Documentation to include the binding information. The PHY binding information can be found at Documentation/devicetree/bindings/phy/phy-bindings.txt Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-09-27 14:23:29 +08:00
#phy-cells = <0>;
ARM: dts: OMAP4: Add omap-usb2 data Add omap-usb2 data node in omap4 device tree file. Since omap-usb2 is connected to ocp2scp, omap-usb2 dt data is added as a child node of ocp2scp. The information about this data node is availabe @ Documentation/devicetree/bindings/usb/usb-phy.txt Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-07 21:35:15 +08:00
};
arm/dts: omap4: Add ocp2scp data Add ocp2scp data node in omap4 device tree file. Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-08-22 16:40:03 +08:00
};
ARM: dts: OMAP: Add timer nodes Add the 12 GP timers nodes present in OMAP2. Add the 12 GP timers nodes present in OMAP3. Add the 11 GP timers nodes present in OMAP4. Add the 7 GP timers nodes present in AM33xx. Add documentation for timer properties specific to OMAP. Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified Vaibhav's original nodes adding information on which timers support a PWM output. V5 changes: - Updated timer register sizes for OMAP2/3/4. - Modified AM335x timer register size to be 1KB instead of 4KB to align with HWMOD. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-19 22:59:00 +08:00
ARM: dts: OMAP4: Add mailbox node The mailbox DT node data has been added for OMAP44xx devices. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-07-12 05:44:35 +08:00
mailbox: mailbox@4a0f4000 {
compatible = "ti,omap4-mailbox";
reg = <0x4a0f4000 0x200>;
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mailbox";
ARM: dts: OMAP2+: Add #mbox-cells property to all mailbox nodes The '#mbox-cells' property is added to all the OMAP mailbox nodes. This property is mandatory with the new mailbox framework. Cc: "Benoît Cousson" <bcousson@baylibre.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-11-04 07:07:35 +08:00
#mbox-cells = <1>;
ARM: dts: OMAP4: Add mailbox node The mailbox DT node data has been added for OMAP44xx devices. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-07-12 05:44:35 +08:00
ti,mbox-num-users = <3>;
ti,mbox-num-fifos = <8>;
ARM: dts: OMAP2+: Add sub mailboxes device node information The sub-mailbox devices are added to the Mailbox DT nodes on OMAP2420, OMAP2430, OMAP3, AM33xx, AM43xx, OMAP4 and OMAP5 family of SoCs. This data represents the same mailboxes that used to be represented in hwmod attribute data previously. The node name is chosen based on the .name field of omap_mbox_dev_info structure used in the hwmod data. Cc: "Benoît Cousson" <bcousson@baylibre.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-09-11 03:27:23 +08:00
mbox_ipu: mbox_ipu {
ti,mbox-tx = <0 0 0>;
ti,mbox-rx = <1 0 0>;
};
mbox_dsp: mbox_dsp {
ti,mbox-tx = <3 0 0>;
ti,mbox-rx = <2 0 0>;
};
ARM: dts: OMAP4: Add mailbox node The mailbox DT node data has been added for OMAP44xx devices. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-07-12 05:44:35 +08:00
};
ARM: dts: OMAP: Add timer nodes Add the 12 GP timers nodes present in OMAP2. Add the 12 GP timers nodes present in OMAP3. Add the 11 GP timers nodes present in OMAP4. Add the 7 GP timers nodes present in AM33xx. Add documentation for timer properties specific to OMAP. Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified Vaibhav's original nodes adding information on which timers support a PWM output. V5 changes: - Updated timer register sizes for OMAP2/3/4. - Modified AM335x timer register size to be 1KB instead of 4KB to align with HWMOD. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-19 22:59:00 +08:00
timer1: timer@4a318000 {
ARM: dts: OMAP2+: Update DMTIMER compatibility property Update the DMTIMER compatibility property to reflect the register level compatibilty between devices and update the various OMAP/AM timer bindings with the appropriate compatibility string. By doing this we can add platform specific data applicable to specific timer versions to the driver. For example, errata flags can be populated for the timer versions that are impacted. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-20 01:38:18 +08:00
compatible = "ti,omap3430-timer";
ARM: dts: OMAP: Add timer nodes Add the 12 GP timers nodes present in OMAP2. Add the 12 GP timers nodes present in OMAP3. Add the 11 GP timers nodes present in OMAP4. Add the 7 GP timers nodes present in AM33xx. Add documentation for timer properties specific to OMAP. Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified Vaibhav's original nodes adding information on which timers support a PWM output. V5 changes: - Updated timer register sizes for OMAP2/3/4. - Modified AM335x timer register size to be 1KB instead of 4KB to align with HWMOD. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-19 22:59:00 +08:00
reg = <0x4a318000 0x80>;
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
ARM: dts: OMAP: Add timer nodes Add the 12 GP timers nodes present in OMAP2. Add the 12 GP timers nodes present in OMAP3. Add the 11 GP timers nodes present in OMAP4. Add the 7 GP timers nodes present in AM33xx. Add documentation for timer properties specific to OMAP. Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified Vaibhav's original nodes adding information on which timers support a PWM output. V5 changes: - Updated timer register sizes for OMAP2/3/4. - Modified AM335x timer register size to be 1KB instead of 4KB to align with HWMOD. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-19 22:59:00 +08:00
ti,hwmods = "timer1";
ti,timer-alwon;
};
timer2: timer@48032000 {
ARM: dts: OMAP2+: Update DMTIMER compatibility property Update the DMTIMER compatibility property to reflect the register level compatibilty between devices and update the various OMAP/AM timer bindings with the appropriate compatibility string. By doing this we can add platform specific data applicable to specific timer versions to the driver. For example, errata flags can be populated for the timer versions that are impacted. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-20 01:38:18 +08:00
compatible = "ti,omap3430-timer";
ARM: dts: OMAP: Add timer nodes Add the 12 GP timers nodes present in OMAP2. Add the 12 GP timers nodes present in OMAP3. Add the 11 GP timers nodes present in OMAP4. Add the 7 GP timers nodes present in AM33xx. Add documentation for timer properties specific to OMAP. Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified Vaibhav's original nodes adding information on which timers support a PWM output. V5 changes: - Updated timer register sizes for OMAP2/3/4. - Modified AM335x timer register size to be 1KB instead of 4KB to align with HWMOD. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-19 22:59:00 +08:00
reg = <0x48032000 0x80>;
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
ARM: dts: OMAP: Add timer nodes Add the 12 GP timers nodes present in OMAP2. Add the 12 GP timers nodes present in OMAP3. Add the 11 GP timers nodes present in OMAP4. Add the 7 GP timers nodes present in AM33xx. Add documentation for timer properties specific to OMAP. Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified Vaibhav's original nodes adding information on which timers support a PWM output. V5 changes: - Updated timer register sizes for OMAP2/3/4. - Modified AM335x timer register size to be 1KB instead of 4KB to align with HWMOD. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-19 22:59:00 +08:00
ti,hwmods = "timer2";
};
timer3: timer@48034000 {
ARM: dts: OMAP2+: Update DMTIMER compatibility property Update the DMTIMER compatibility property to reflect the register level compatibilty between devices and update the various OMAP/AM timer bindings with the appropriate compatibility string. By doing this we can add platform specific data applicable to specific timer versions to the driver. For example, errata flags can be populated for the timer versions that are impacted. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-20 01:38:18 +08:00
compatible = "ti,omap4430-timer";
ARM: dts: OMAP: Add timer nodes Add the 12 GP timers nodes present in OMAP2. Add the 12 GP timers nodes present in OMAP3. Add the 11 GP timers nodes present in OMAP4. Add the 7 GP timers nodes present in AM33xx. Add documentation for timer properties specific to OMAP. Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified Vaibhav's original nodes adding information on which timers support a PWM output. V5 changes: - Updated timer register sizes for OMAP2/3/4. - Modified AM335x timer register size to be 1KB instead of 4KB to align with HWMOD. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-19 22:59:00 +08:00
reg = <0x48034000 0x80>;
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
ARM: dts: OMAP: Add timer nodes Add the 12 GP timers nodes present in OMAP2. Add the 12 GP timers nodes present in OMAP3. Add the 11 GP timers nodes present in OMAP4. Add the 7 GP timers nodes present in AM33xx. Add documentation for timer properties specific to OMAP. Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified Vaibhav's original nodes adding information on which timers support a PWM output. V5 changes: - Updated timer register sizes for OMAP2/3/4. - Modified AM335x timer register size to be 1KB instead of 4KB to align with HWMOD. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-19 22:59:00 +08:00
ti,hwmods = "timer3";
};
timer4: timer@48036000 {
ARM: dts: OMAP2+: Update DMTIMER compatibility property Update the DMTIMER compatibility property to reflect the register level compatibilty between devices and update the various OMAP/AM timer bindings with the appropriate compatibility string. By doing this we can add platform specific data applicable to specific timer versions to the driver. For example, errata flags can be populated for the timer versions that are impacted. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-20 01:38:18 +08:00
compatible = "ti,omap4430-timer";
ARM: dts: OMAP: Add timer nodes Add the 12 GP timers nodes present in OMAP2. Add the 12 GP timers nodes present in OMAP3. Add the 11 GP timers nodes present in OMAP4. Add the 7 GP timers nodes present in AM33xx. Add documentation for timer properties specific to OMAP. Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified Vaibhav's original nodes adding information on which timers support a PWM output. V5 changes: - Updated timer register sizes for OMAP2/3/4. - Modified AM335x timer register size to be 1KB instead of 4KB to align with HWMOD. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-19 22:59:00 +08:00
reg = <0x48036000 0x80>;
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
ARM: dts: OMAP: Add timer nodes Add the 12 GP timers nodes present in OMAP2. Add the 12 GP timers nodes present in OMAP3. Add the 11 GP timers nodes present in OMAP4. Add the 7 GP timers nodes present in AM33xx. Add documentation for timer properties specific to OMAP. Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified Vaibhav's original nodes adding information on which timers support a PWM output. V5 changes: - Updated timer register sizes for OMAP2/3/4. - Modified AM335x timer register size to be 1KB instead of 4KB to align with HWMOD. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-19 22:59:00 +08:00
ti,hwmods = "timer4";
};
ARM: dts: OMAP4: Update timer addresses For OMAP4 devices, timers 5-8 have both a L3 bus address and a Cortex-A9 private bus address. Currently the device-tree source only contains the L3 bus address for these timers. Update these timers to include the Cortex-A9 private address and make the default address the Cortex-A9 private bus address to match the current HWMOD implementation. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-11-01 21:57:08 +08:00
timer5: timer@40138000 {
ARM: dts: OMAP2+: Update DMTIMER compatibility property Update the DMTIMER compatibility property to reflect the register level compatibilty between devices and update the various OMAP/AM timer bindings with the appropriate compatibility string. By doing this we can add platform specific data applicable to specific timer versions to the driver. For example, errata flags can be populated for the timer versions that are impacted. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-20 01:38:18 +08:00
compatible = "ti,omap4430-timer";
ARM: dts: OMAP4: Update timer addresses For OMAP4 devices, timers 5-8 have both a L3 bus address and a Cortex-A9 private bus address. Currently the device-tree source only contains the L3 bus address for these timers. Update these timers to include the Cortex-A9 private address and make the default address the Cortex-A9 private bus address to match the current HWMOD implementation. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-11-01 21:57:08 +08:00
reg = <0x40138000 0x80>,
<0x49038000 0x80>;
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
ARM: dts: OMAP: Add timer nodes Add the 12 GP timers nodes present in OMAP2. Add the 12 GP timers nodes present in OMAP3. Add the 11 GP timers nodes present in OMAP4. Add the 7 GP timers nodes present in AM33xx. Add documentation for timer properties specific to OMAP. Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified Vaibhav's original nodes adding information on which timers support a PWM output. V5 changes: - Updated timer register sizes for OMAP2/3/4. - Modified AM335x timer register size to be 1KB instead of 4KB to align with HWMOD. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-19 22:59:00 +08:00
ti,hwmods = "timer5";
ti,timer-dsp;
};
ARM: dts: OMAP4: Update timer addresses For OMAP4 devices, timers 5-8 have both a L3 bus address and a Cortex-A9 private bus address. Currently the device-tree source only contains the L3 bus address for these timers. Update these timers to include the Cortex-A9 private address and make the default address the Cortex-A9 private bus address to match the current HWMOD implementation. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-11-01 21:57:08 +08:00
timer6: timer@4013a000 {
ARM: dts: OMAP2+: Update DMTIMER compatibility property Update the DMTIMER compatibility property to reflect the register level compatibilty between devices and update the various OMAP/AM timer bindings with the appropriate compatibility string. By doing this we can add platform specific data applicable to specific timer versions to the driver. For example, errata flags can be populated for the timer versions that are impacted. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-20 01:38:18 +08:00
compatible = "ti,omap4430-timer";
ARM: dts: OMAP4: Update timer addresses For OMAP4 devices, timers 5-8 have both a L3 bus address and a Cortex-A9 private bus address. Currently the device-tree source only contains the L3 bus address for these timers. Update these timers to include the Cortex-A9 private address and make the default address the Cortex-A9 private bus address to match the current HWMOD implementation. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-11-01 21:57:08 +08:00
reg = <0x4013a000 0x80>,
<0x4903a000 0x80>;
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
ARM: dts: OMAP: Add timer nodes Add the 12 GP timers nodes present in OMAP2. Add the 12 GP timers nodes present in OMAP3. Add the 11 GP timers nodes present in OMAP4. Add the 7 GP timers nodes present in AM33xx. Add documentation for timer properties specific to OMAP. Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified Vaibhav's original nodes adding information on which timers support a PWM output. V5 changes: - Updated timer register sizes for OMAP2/3/4. - Modified AM335x timer register size to be 1KB instead of 4KB to align with HWMOD. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-19 22:59:00 +08:00
ti,hwmods = "timer6";
ti,timer-dsp;
};
ARM: dts: OMAP4: Update timer addresses For OMAP4 devices, timers 5-8 have both a L3 bus address and a Cortex-A9 private bus address. Currently the device-tree source only contains the L3 bus address for these timers. Update these timers to include the Cortex-A9 private address and make the default address the Cortex-A9 private bus address to match the current HWMOD implementation. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-11-01 21:57:08 +08:00
timer7: timer@4013c000 {
ARM: dts: OMAP2+: Update DMTIMER compatibility property Update the DMTIMER compatibility property to reflect the register level compatibilty between devices and update the various OMAP/AM timer bindings with the appropriate compatibility string. By doing this we can add platform specific data applicable to specific timer versions to the driver. For example, errata flags can be populated for the timer versions that are impacted. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-20 01:38:18 +08:00
compatible = "ti,omap4430-timer";
ARM: dts: OMAP4: Update timer addresses For OMAP4 devices, timers 5-8 have both a L3 bus address and a Cortex-A9 private bus address. Currently the device-tree source only contains the L3 bus address for these timers. Update these timers to include the Cortex-A9 private address and make the default address the Cortex-A9 private bus address to match the current HWMOD implementation. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-11-01 21:57:08 +08:00
reg = <0x4013c000 0x80>,
<0x4903c000 0x80>;
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
ARM: dts: OMAP: Add timer nodes Add the 12 GP timers nodes present in OMAP2. Add the 12 GP timers nodes present in OMAP3. Add the 11 GP timers nodes present in OMAP4. Add the 7 GP timers nodes present in AM33xx. Add documentation for timer properties specific to OMAP. Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified Vaibhav's original nodes adding information on which timers support a PWM output. V5 changes: - Updated timer register sizes for OMAP2/3/4. - Modified AM335x timer register size to be 1KB instead of 4KB to align with HWMOD. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-19 22:59:00 +08:00
ti,hwmods = "timer7";
ti,timer-dsp;
};
ARM: dts: OMAP4: Update timer addresses For OMAP4 devices, timers 5-8 have both a L3 bus address and a Cortex-A9 private bus address. Currently the device-tree source only contains the L3 bus address for these timers. Update these timers to include the Cortex-A9 private address and make the default address the Cortex-A9 private bus address to match the current HWMOD implementation. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-11-01 21:57:08 +08:00
timer8: timer@4013e000 {
ARM: dts: OMAP2+: Update DMTIMER compatibility property Update the DMTIMER compatibility property to reflect the register level compatibilty between devices and update the various OMAP/AM timer bindings with the appropriate compatibility string. By doing this we can add platform specific data applicable to specific timer versions to the driver. For example, errata flags can be populated for the timer versions that are impacted. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-20 01:38:18 +08:00
compatible = "ti,omap4430-timer";
ARM: dts: OMAP4: Update timer addresses For OMAP4 devices, timers 5-8 have both a L3 bus address and a Cortex-A9 private bus address. Currently the device-tree source only contains the L3 bus address for these timers. Update these timers to include the Cortex-A9 private address and make the default address the Cortex-A9 private bus address to match the current HWMOD implementation. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-11-01 21:57:08 +08:00
reg = <0x4013e000 0x80>,
<0x4903e000 0x80>;
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
ARM: dts: OMAP: Add timer nodes Add the 12 GP timers nodes present in OMAP2. Add the 12 GP timers nodes present in OMAP3. Add the 11 GP timers nodes present in OMAP4. Add the 7 GP timers nodes present in AM33xx. Add documentation for timer properties specific to OMAP. Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified Vaibhav's original nodes adding information on which timers support a PWM output. V5 changes: - Updated timer register sizes for OMAP2/3/4. - Modified AM335x timer register size to be 1KB instead of 4KB to align with HWMOD. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-19 22:59:00 +08:00
ti,hwmods = "timer8";
ti,timer-pwm;
ti,timer-dsp;
};
timer9: timer@4803e000 {
ARM: dts: OMAP2+: Update DMTIMER compatibility property Update the DMTIMER compatibility property to reflect the register level compatibilty between devices and update the various OMAP/AM timer bindings with the appropriate compatibility string. By doing this we can add platform specific data applicable to specific timer versions to the driver. For example, errata flags can be populated for the timer versions that are impacted. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-20 01:38:18 +08:00
compatible = "ti,omap4430-timer";
ARM: dts: OMAP: Add timer nodes Add the 12 GP timers nodes present in OMAP2. Add the 12 GP timers nodes present in OMAP3. Add the 11 GP timers nodes present in OMAP4. Add the 7 GP timers nodes present in AM33xx. Add documentation for timer properties specific to OMAP. Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified Vaibhav's original nodes adding information on which timers support a PWM output. V5 changes: - Updated timer register sizes for OMAP2/3/4. - Modified AM335x timer register size to be 1KB instead of 4KB to align with HWMOD. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-19 22:59:00 +08:00
reg = <0x4803e000 0x80>;
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
ARM: dts: OMAP: Add timer nodes Add the 12 GP timers nodes present in OMAP2. Add the 12 GP timers nodes present in OMAP3. Add the 11 GP timers nodes present in OMAP4. Add the 7 GP timers nodes present in AM33xx. Add documentation for timer properties specific to OMAP. Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified Vaibhav's original nodes adding information on which timers support a PWM output. V5 changes: - Updated timer register sizes for OMAP2/3/4. - Modified AM335x timer register size to be 1KB instead of 4KB to align with HWMOD. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-19 22:59:00 +08:00
ti,hwmods = "timer9";
ti,timer-pwm;
};
timer10: timer@48086000 {
ARM: dts: OMAP2+: Update DMTIMER compatibility property Update the DMTIMER compatibility property to reflect the register level compatibilty between devices and update the various OMAP/AM timer bindings with the appropriate compatibility string. By doing this we can add platform specific data applicable to specific timer versions to the driver. For example, errata flags can be populated for the timer versions that are impacted. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-20 01:38:18 +08:00
compatible = "ti,omap3430-timer";
ARM: dts: OMAP: Add timer nodes Add the 12 GP timers nodes present in OMAP2. Add the 12 GP timers nodes present in OMAP3. Add the 11 GP timers nodes present in OMAP4. Add the 7 GP timers nodes present in AM33xx. Add documentation for timer properties specific to OMAP. Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified Vaibhav's original nodes adding information on which timers support a PWM output. V5 changes: - Updated timer register sizes for OMAP2/3/4. - Modified AM335x timer register size to be 1KB instead of 4KB to align with HWMOD. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-19 22:59:00 +08:00
reg = <0x48086000 0x80>;
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
ARM: dts: OMAP: Add timer nodes Add the 12 GP timers nodes present in OMAP2. Add the 12 GP timers nodes present in OMAP3. Add the 11 GP timers nodes present in OMAP4. Add the 7 GP timers nodes present in AM33xx. Add documentation for timer properties specific to OMAP. Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified Vaibhav's original nodes adding information on which timers support a PWM output. V5 changes: - Updated timer register sizes for OMAP2/3/4. - Modified AM335x timer register size to be 1KB instead of 4KB to align with HWMOD. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-19 22:59:00 +08:00
ti,hwmods = "timer10";
ti,timer-pwm;
};
timer11: timer@48088000 {
ARM: dts: OMAP2+: Update DMTIMER compatibility property Update the DMTIMER compatibility property to reflect the register level compatibilty between devices and update the various OMAP/AM timer bindings with the appropriate compatibility string. By doing this we can add platform specific data applicable to specific timer versions to the driver. For example, errata flags can be populated for the timer versions that are impacted. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-20 01:38:18 +08:00
compatible = "ti,omap4430-timer";
ARM: dts: OMAP: Add timer nodes Add the 12 GP timers nodes present in OMAP2. Add the 12 GP timers nodes present in OMAP3. Add the 11 GP timers nodes present in OMAP4. Add the 7 GP timers nodes present in AM33xx. Add documentation for timer properties specific to OMAP. Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified Vaibhav's original nodes adding information on which timers support a PWM output. V5 changes: - Updated timer register sizes for OMAP2/3/4. - Modified AM335x timer register size to be 1KB instead of 4KB to align with HWMOD. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-19 22:59:00 +08:00
reg = <0x48088000 0x80>;
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
ARM: dts: OMAP: Add timer nodes Add the 12 GP timers nodes present in OMAP2. Add the 12 GP timers nodes present in OMAP3. Add the 11 GP timers nodes present in OMAP4. Add the 7 GP timers nodes present in AM33xx. Add documentation for timer properties specific to OMAP. Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified Vaibhav's original nodes adding information on which timers support a PWM output. V5 changes: - Updated timer register sizes for OMAP2/3/4. - Modified AM335x timer register size to be 1KB instead of 4KB to align with HWMOD. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-19 22:59:00 +08:00
ti,hwmods = "timer11";
ti,timer-pwm;
};
ARM: dts: OMAP4: Add HS USB Host IP nodes Adds device nodes for HS USB Host module, TLL module, OHCI and EHCI controllers. CC: Benoît Cousson <b-cousson@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-03-20 23:44:58 +08:00
usbhstll: usbhstll@4a062000 {
compatible = "ti,usbhs-tll";
reg = <0x4a062000 0x1000>;
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
ARM: dts: OMAP4: Add HS USB Host IP nodes Adds device nodes for HS USB Host module, TLL module, OHCI and EHCI controllers. CC: Benoît Cousson <b-cousson@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-03-20 23:44:58 +08:00
ti,hwmods = "usb_tll_hs";
};
usbhshost: usbhshost@4a064000 {
compatible = "ti,usbhs-host";
reg = <0x4a064000 0x800>;
ti,hwmods = "usb_host_hs";
#address-cells = <1>;
#size-cells = <1>;
ranges;
mfd: omap-usb-host: Use clock names as per function for reference clocks Use a meaningful name for the reference clocks so that it indicates the function. Update the OMAP4+ USB Host node as well to be in sync with the changes. Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2014-02-27 22:18:26 +08:00
clocks = <&init_60m_fclk>,
<&xclk60mhsp1_ck>,
<&xclk60mhsp2_ck>;
clock-names = "refclk_60m_int",
"refclk_60m_ext_p1",
"refclk_60m_ext_p2";
ARM: dts: OMAP4: Add HS USB Host IP nodes Adds device nodes for HS USB Host module, TLL module, OHCI and EHCI controllers. CC: Benoît Cousson <b-cousson@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-03-20 23:44:58 +08:00
usbhsohci: ohci@4a064800 {
ARM: dts: Get rid of incompatible ids for hci-omap USB host nodes The OMAP EHCI and OHCI controllers are not compatible with drivers other than "ti,ehci-omap" and "ti,ohci-omap3" respectively, so get rid of the incompatible ids. CC: Alan Stern <stern@rowland.harvard.edu> CC: Nishant Menon <nm@ti.com> CC: Kevin Hilman <khilman@linaro.org> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-02-27 22:18:30 +08:00
compatible = "ti,ohci-omap3";
ARM: dts: OMAP4: Add HS USB Host IP nodes Adds device nodes for HS USB Host module, TLL module, OHCI and EHCI controllers. CC: Benoît Cousson <b-cousson@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-03-20 23:44:58 +08:00
reg = <0x4a064800 0x400>;
interrupt-parent = <&gic>;
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
ARM: dts: OMAP4: Add HS USB Host IP nodes Adds device nodes for HS USB Host module, TLL module, OHCI and EHCI controllers. CC: Benoît Cousson <b-cousson@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-03-20 23:44:58 +08:00
};
usbhsehci: ehci@4a064c00 {
ARM: dts: Get rid of incompatible ids for hci-omap USB host nodes The OMAP EHCI and OHCI controllers are not compatible with drivers other than "ti,ehci-omap" and "ti,ohci-omap3" respectively, so get rid of the incompatible ids. CC: Alan Stern <stern@rowland.harvard.edu> CC: Nishant Menon <nm@ti.com> CC: Kevin Hilman <khilman@linaro.org> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-02-27 22:18:30 +08:00
compatible = "ti,ehci-omap";
ARM: dts: OMAP4: Add HS USB Host IP nodes Adds device nodes for HS USB Host module, TLL module, OHCI and EHCI controllers. CC: Benoît Cousson <b-cousson@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-03-20 23:44:58 +08:00
reg = <0x4a064c00 0x400>;
interrupt-parent = <&gic>;
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
ARM: dts: OMAP4: Add HS USB Host IP nodes Adds device nodes for HS USB Host module, TLL module, OHCI and EHCI controllers. CC: Benoît Cousson <b-cousson@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-03-20 23:44:58 +08:00
};
};
ARM: dts: OMAP4: Add omap control usb data Add omap control usb data in omap4 device tree file. This will have the register address of registers to power on the PHY and to write to mailbox. The information about this data node is available @ Documentation/devicetree/bindings/usb/omap-usb.txt Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-07 21:35:14 +08:00
ARM: dts: omap4: update omap-control-usb nodes Split otghs_ctrl and USB2 PHY power-down into separate omap-control-usb nodes. Get rid of "ti,type" property. Also get rid of "ti,has-mailbox" property from usb_otg_hs node and provide the ctrl-module phandle. CC: Benoit Cousson <bcousson@baylibre.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-10-03 23:12:36 +08:00
omap_control_usb2phy: control-phy@4a002300 {
compatible = "ti,control-phy-usb2";
reg = <0x4a002300 0x4>;
reg-names = "power";
};
omap_control_usbotg: control-phy@4a00233c {
compatible = "ti,control-phy-otghs";
reg = <0x4a00233c 0x4>;
reg-names = "otghs_control";
ARM: dts: OMAP4: Add omap control usb data Add omap control usb data in omap4 device tree file. This will have the register address of registers to power on the PHY and to write to mailbox. The information about this data node is available @ Documentation/devicetree/bindings/usb/omap-usb.txt Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-07 21:35:14 +08:00
};
ARM: dts: OMAP: Add usb_otg and glue data to OMAP3+ boards Add usb otg data node in omap4/omap3 device tree file. Also update the node with board specific setting in omapx-<board>.dts file. The dt data specifies among others the interface type (ULPI or UTMI), mode which is mostly OTG, power that specifies the amount of power this can supply when in host mode. The information about usb otg node is available @ Documentation/devicetree/bindings/usb/omap-usb.txt Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-07 21:35:16 +08:00
usb_otg_hs: usb_otg_hs@4a0ab000 {
compatible = "ti,omap4-musb";
reg = <0x4a0ab000 0x7ff>;
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
ARM: dts: OMAP: Add usb_otg and glue data to OMAP3+ boards Add usb otg data node in omap4/omap3 device tree file. Also update the node with board specific setting in omapx-<board>.dts file. The dt data specifies among others the interface type (ULPI or UTMI), mode which is mostly OTG, power that specifies the amount of power this can supply when in host mode. The information about usb otg node is available @ Documentation/devicetree/bindings/usb/omap-usb.txt Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-07 21:35:16 +08:00
interrupt-names = "mc", "dma";
ti,hwmods = "usb_otg_hs";
usb-phy = <&usb2_phy>;
ARM: dts: omap: update usb_otg_hs data Updated the usb_otg_hs dt data to include the *phy* and *phy-names* binding in order for the driver to use the new generic PHY framework. Also updated the Documentation to include the binding information. The PHY binding information can be found at Documentation/devicetree/bindings/phy/phy-bindings.txt Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-09-27 14:23:29 +08:00
phys = <&usb2_phy>;
phy-names = "usb2-phy";
ARM: dts: OMAP: Add usb_otg and glue data to OMAP3+ boards Add usb otg data node in omap4/omap3 device tree file. Also update the node with board specific setting in omapx-<board>.dts file. The dt data specifies among others the interface type (ULPI or UTMI), mode which is mostly OTG, power that specifies the amount of power this can supply when in host mode. The information about usb otg node is available @ Documentation/devicetree/bindings/usb/omap-usb.txt Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-07 21:35:16 +08:00
multipoint = <1>;
num-eps = <16>;
ram-bits = <12>;
ARM: dts: omap4: update omap-control-usb nodes Split otghs_ctrl and USB2 PHY power-down into separate omap-control-usb nodes. Get rid of "ti,type" property. Also get rid of "ti,has-mailbox" property from usb_otg_hs node and provide the ctrl-module phandle. CC: Benoit Cousson <bcousson@baylibre.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-10-03 23:12:36 +08:00
ctrl-module = <&omap_control_usbotg>;
ARM: dts: OMAP: Add usb_otg and glue data to OMAP3+ boards Add usb otg data node in omap4/omap3 device tree file. Also update the node with board specific setting in omapx-<board>.dts file. The dt data specifies among others the interface type (ULPI or UTMI), mode which is mostly OTG, power that specifies the amount of power this can supply when in host mode. The information about usb otg node is available @ Documentation/devicetree/bindings/usb/omap-usb.txt Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-07 21:35:16 +08:00
};
ARM: dts: OMAP4: Add AES node OMAP4 has an AES module that uses the omap-aes crypto driver. Add DT entries for the same. Signed-off-by: Joel Fernandes <joelf@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-07-12 07:20:05 +08:00
aes: aes@4b501000 {
compatible = "ti,omap4-aes";
ti,hwmods = "aes";
reg = <0x4b501000 0xa0>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&sdma 111>, <&sdma 110>;
dma-names = "tx", "rx";
};
ARM: dts: OMAP4: Add DES3DES node OMAP4 has an DES3DES module that uses the omap-des crypto driver. Add DT entries for the same. Signed-off-by: Joel Fernandes <joelf@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-09-25 04:23:33 +08:00
des: des@480a5000 {
compatible = "ti,omap4-des";
ti,hwmods = "des";
reg = <0x480a5000 0xa0>;
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&sdma 117>, <&sdma 116>;
dma-names = "tx", "rx";
};
ARM: dts: OMAP4: Add device nodes for ABB Add ABB device nodes for OMAP443x family of devices. abb_iva is populated, but disabled as it is not used on current OMAP443x family, but the node is used on OMAP446x family. Data is based on OMAP443x Technical Reference Manual revision AN (April 2013). ABB device nodes for OMAP4460 device Data is based on OMAP4460 Technical Reference Manual revision Z (April 2013) [nm@ti.com: co-developer] Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Andrii.Tseglytskyi <andrii.tseglytskyi@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-03-03 22:50:22 +08:00
abb_mpu: regulator-abb-mpu {
compatible = "ti,abb-v2";
regulator-name = "abb_mpu";
#address-cells = <0>;
#size-cells = <0>;
ti,tranxdone-status-mask = <0x80>;
clocks = <&sys_clkin_ck>;
ti,settling-time = <50>;
ti,clock-cycles = <16>;
status = "disabled";
};
abb_iva: regulator-abb-iva {
compatible = "ti,abb-v2";
regulator-name = "abb_iva";
#address-cells = <0>;
#size-cells = <0>;
ti,tranxdone-status-mask = <0x80000000>;
clocks = <&sys_clkin_ck>;
ti,settling-time = <50>;
ti,clock-cycles = <16>;
status = "disabled";
};
ARM: omap4.dtsi: add omapdss information Add DT data for OMAP4 display subsystem, which contains the following blocks: dss - the wrapper/glue for the display modules dispc - display controller dsi - MIPI DSI encoder (two independent modules) rfbi - MIPI DBI encoder venc - analog TV encoder hdmi - HDMI encoder Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2012-08-21 20:34:50 +08:00
dss: dss@58000000 {
compatible = "ti,omap4-dss";
reg = <0x58000000 0x80>;
status = "disabled";
ti,hwmods = "dss_core";
clocks = <&dss_dss_clk>;
clock-names = "fck";
#address-cells = <1>;
#size-cells = <1>;
ranges;
dispc@58001000 {
compatible = "ti,omap4-dispc";
reg = <0x58001000 0x1000>;
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "dss_dispc";
clocks = <&dss_dss_clk>;
clock-names = "fck";
};
rfbi: encoder@58002000 {
compatible = "ti,omap4-rfbi";
reg = <0x58002000 0x1000>;
status = "disabled";
ti,hwmods = "dss_rfbi";
ARM: OMAP4: fix RFBI iclk RFBI iclk was set to point to hacky "dss_fck", which will be removed. Instead use "l3_div_ck", which is the proper clock for this. "l3_div_ck" is the parent of "dss_fck", so the clock rate is the same as previously. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Reviewed-by: Archit Taneja <archit.taneja@gmail.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2014-10-09 22:03:18 +08:00
clocks = <&dss_dss_clk>, <&l3_div_ck>;
ARM: omap4.dtsi: add omapdss information Add DT data for OMAP4 display subsystem, which contains the following blocks: dss - the wrapper/glue for the display modules dispc - display controller dsi - MIPI DSI encoder (two independent modules) rfbi - MIPI DBI encoder venc - analog TV encoder hdmi - HDMI encoder Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2012-08-21 20:34:50 +08:00
clock-names = "fck", "ick";
};
venc: encoder@58003000 {
compatible = "ti,omap4-venc";
reg = <0x58003000 0x1000>;
status = "disabled";
ti,hwmods = "dss_venc";
clocks = <&dss_tv_clk>;
clock-names = "fck";
};
dsi1: encoder@58004000 {
compatible = "ti,omap4-dsi";
reg = <0x58004000 0x200>,
<0x58004200 0x40>,
<0x58004300 0x20>;
reg-names = "proto", "phy", "pll";
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
ti,hwmods = "dss_dsi1";
clocks = <&dss_dss_clk>, <&dss_sys_clk>;
clock-names = "fck", "sys_clk";
};
dsi2: encoder@58005000 {
compatible = "ti,omap4-dsi";
reg = <0x58005000 0x200>,
<0x58005200 0x40>,
<0x58005300 0x20>;
reg-names = "proto", "phy", "pll";
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
ti,hwmods = "dss_dsi2";
clocks = <&dss_dss_clk>, <&dss_sys_clk>;
clock-names = "fck", "sys_clk";
};
hdmi: encoder@58006000 {
compatible = "ti,omap4-hdmi";
reg = <0x58006000 0x200>,
<0x58006200 0x100>,
<0x58006300 0x100>,
<0x58006400 0x1000>;
reg-names = "wp", "pll", "phy", "core";
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
ti,hwmods = "dss_hdmi";
clocks = <&dss_48mhz_clk>, <&dss_sys_clk>;
clock-names = "fck", "sys_clk";
ARM: omap4.dtsi: Add audio related parametes to hdmi node Adds HDMI audio sDMA properties. Signed-off-by: Jyri Sarha <jsarha@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2014-05-12 17:12:24 +08:00
dmas = <&sdma 76>;
dma-names = "audio_tx";
ARM: omap4.dtsi: add omapdss information Add DT data for OMAP4 display subsystem, which contains the following blocks: dss - the wrapper/glue for the display modules dispc - display controller dsi - MIPI DSI encoder (two independent modules) rfbi - MIPI DBI encoder venc - analog TV encoder hdmi - HDMI encoder Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2012-08-21 20:34:50 +08:00
};
};
arm/dts: Add initial device tree support for OMAP4 SoC Add initial device-tree support for OMAP4 SoC. This is based on the original panda board patch done by Manju: http://permalink.gmane.org/gmane.linux.ports.arm.omap/60393 Add the generic GIC interrupt-controller from ARM. Add an empty "soc" node to contain non memory mapped IPs (DSP, MPU, IPU...). Note: Since reg, irq and dma are provided by hwmod for the moment, these attributes will not be present at all in DTS to highlight the gap. They will be added as soon as dma bindings will be there and drivers will be adapted. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: G, Manjunath Kondaiah <manjugk@ti.com>
2011-08-09 23:15:17 +08:00
};
};
ARM: dts: omap4 clock data This patch creates a unique node for each clock in the OMAP4 power, reset and clock manager (PRCM). OMAP443x and OMAP446x have slightly different clock tree which is taken into account in the data. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-07-18 17:42:02 +08:00
/include/ "omap44xx-clocks.dtsi"