2018-07-26 10:37:32 +08:00
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/* SPDX-License-Identifier: GPL-2.0+ */
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2013-06-19 19:54:11 +08:00
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/*
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* rcar_du_crtc.h -- R-Car Display Unit CRTCs
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*
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2016-11-12 01:07:39 +08:00
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* Copyright (C) 2013-2015 Renesas Electronics Corporation
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2013-06-19 19:54:11 +08:00
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*
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* Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
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*/
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#ifndef __RCAR_DU_CRTC_H__
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#define __RCAR_DU_CRTC_H__
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#include <linux/mutex.h>
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2017-07-29 07:31:33 +08:00
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#include <linux/spinlock.h>
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2015-02-18 19:21:56 +08:00
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#include <linux/wait.h>
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2013-06-19 19:54:11 +08:00
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#include <drm/drmP.h>
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#include <drm/drm_crtc.h>
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2017-12-01 19:59:55 +08:00
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#include <media/vsp1.h>
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2013-06-17 03:01:02 +08:00
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struct rcar_du_group;
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2015-09-07 22:14:58 +08:00
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struct rcar_du_vsp;
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2013-06-19 19:54:11 +08:00
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2015-04-29 06:11:57 +08:00
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/**
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* struct rcar_du_crtc - the CRTC, representing a DU superposition processor
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* @crtc: base DRM CRTC
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* @clock: the CRTC functional clock
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* @extclock: external pixel dot clock (optional)
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* @mmio_offset: offset of the CRTC registers in the DU MMIO block
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* @index: CRTC software and hardware index
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2017-06-27 18:18:38 +08:00
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* @initialized: whether the CRTC has been initialized and clocks enabled
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2017-06-30 20:14:11 +08:00
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* @vblank_enable: whether vblank events are enabled on this CRTC
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2015-04-29 06:11:57 +08:00
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* @event: event to post when the pending page flip completes
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* @flip_wait: wait queue used to signal page flip completion
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2017-07-29 07:31:33 +08:00
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* @vblank_lock: protects vblank_wait and vblank_count
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* @vblank_wait: wait queue used to signal vertical blanking
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* @vblank_count: number of vertical blanking interrupts to wait for
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2015-04-29 06:11:57 +08:00
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* @outputs: bitmask of the outputs (enum rcar_du_output) driven by this CRTC
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* @group: CRTC group this CRTC belongs to
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2017-06-26 18:12:01 +08:00
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* @vsp: VSP feeding video to this CRTC
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* @vsp_pipe: index of the VSP pipeline feeding video to this CRTC
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2015-04-29 06:11:57 +08:00
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*/
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2013-06-19 19:54:11 +08:00
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struct rcar_du_crtc {
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struct drm_crtc crtc;
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2013-06-14 20:15:01 +08:00
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struct clk *clock;
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2014-12-09 06:24:49 +08:00
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struct clk *extclock;
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2013-06-19 19:54:11 +08:00
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unsigned int mmio_offset;
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unsigned int index;
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2017-06-27 18:18:38 +08:00
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bool initialized;
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2013-06-19 19:54:11 +08:00
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2017-06-30 20:14:11 +08:00
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bool vblank_enable;
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2013-06-19 19:54:11 +08:00
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struct drm_pending_vblank_event *event;
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2015-02-18 19:21:56 +08:00
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wait_queue_head_t flip_wait;
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2017-07-29 07:31:33 +08:00
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spinlock_t vblank_lock;
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wait_queue_head_t vblank_wait;
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unsigned int vblank_count;
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2013-06-19 19:54:11 +08:00
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unsigned int outputs;
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2013-06-17 03:01:02 +08:00
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struct rcar_du_group *group;
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2015-09-07 22:14:58 +08:00
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struct rcar_du_vsp *vsp;
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2017-06-26 18:12:01 +08:00
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unsigned int vsp_pipe;
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2018-08-08 23:26:30 +08:00
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const char *const *sources;
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unsigned int sources_count;
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2013-06-19 19:54:11 +08:00
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};
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2013-06-17 19:48:27 +08:00
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#define to_rcar_crtc(c) container_of(c, struct rcar_du_crtc, crtc)
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2017-12-01 19:59:55 +08:00
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/**
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* struct rcar_du_crtc_state - Driver-specific CRTC state
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* @state: base DRM CRTC state
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* @crc: CRC computation configuration
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*/
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struct rcar_du_crtc_state {
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struct drm_crtc_state state;
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struct vsp1_du_crc_config crc;
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};
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#define to_rcar_crtc_state(s) container_of(s, struct rcar_du_crtc_state, state)
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2014-09-17 07:07:52 +08:00
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enum rcar_du_output {
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RCAR_DU_OUTPUT_DPAD0,
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RCAR_DU_OUTPUT_DPAD1,
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RCAR_DU_OUTPUT_LVDS0,
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RCAR_DU_OUTPUT_LVDS1,
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2016-11-12 01:07:39 +08:00
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RCAR_DU_OUTPUT_HDMI0,
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RCAR_DU_OUTPUT_HDMI1,
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2014-09-17 07:07:52 +08:00
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RCAR_DU_OUTPUT_TCON,
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RCAR_DU_OUTPUT_MAX,
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};
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2018-04-28 06:21:52 +08:00
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int rcar_du_crtc_create(struct rcar_du_group *rgrp, unsigned int swindex,
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unsigned int hwindex);
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2013-06-19 19:54:11 +08:00
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void rcar_du_crtc_suspend(struct rcar_du_crtc *rcrtc);
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void rcar_du_crtc_resume(struct rcar_du_crtc *rcrtc);
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2013-06-17 09:13:11 +08:00
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void rcar_du_crtc_route_output(struct drm_crtc *crtc,
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enum rcar_du_output output);
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2017-03-04 10:01:19 +08:00
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void rcar_du_crtc_finish_page_flip(struct rcar_du_crtc *rcrtc);
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2013-06-19 19:54:11 +08:00
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#endif /* __RCAR_DU_CRTC_H__ */
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