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OpenCloudOS-Kernel/arch/arm/mach-tegra/board-trimslice-pinmux.c

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ARM: tegra: add TrimSlice board Add basic support for CompuLab TrimSlice platform Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Colin Cross <ccross@android.com>
2011-02-07 16:10:53 +08:00
/*
* arch/arm/mach-tegra/board-trimslice-pinmux.c
*
* Copyright (C) 2011 CompuLab, Ltd.
ARM: tegra: Switch to new pinctrl driver * Rename old pinmux and new pinctrl platform driver and DT match table entries, so the new driver gets instantiated. * Re-write board-pinmux.c, so that it uses pinctrl APIs to configura the pinmux. * Re-write board-*-pinmux.c so that the pinmux configuration tables are in pinctrl format. Ventana's pin mux table needed some edits on top of the basic format conversion, since some mux options that were previously marked as reserved are now valid in the new pinctrl driver. Attempting to use the old reserved names will result in a failure. Specifically, groups lpw0, lpw2, lsc1, lsck, and lsda were changed from function rsvd4 to displaya, and group pta was changed from function rsvd2 to hdmi. All boards' pin mux tables needed some edits on top of the based format conversion, since function i2c was split into i2c1 (first general I2C controller) and i2cp (power I2C controller) to better align function definitions with HW blocks. Due to the split of mux tables into pure mux and pull/tristate tables, many entries in the separate Seaboard/Ventana tables could be merged into the common table, since the entries differed only in the portion in one of the tables, not both. Most pin groups allow configuration of mux, tri-state, and pull. However, some don't allow pull configuration, which is instead configured by new groups that only allow pull configuration. This is a reflection of the true HW capabilities, which weren't fully represented by the old pinmux driver. This required adding new pull table entries for those new groups, and setting many other entries' pull configuration to TEGRA_PINCONFIG_DONT_SET. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Olof Johansson <olof@lixom.net>
2011-12-14 06:21:01 +08:00
* Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved.
ARM: tegra: add TrimSlice board Add basic support for CompuLab TrimSlice platform Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Colin Cross <ccross@android.com>
2011-02-07 16:10:53 +08:00
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#include <linux/kernel.h>
ARM: tegra: trimslice: enable MMC/SD slots TrimSlice has MicroSD and standard MMC/SD slots. Register sdhci devices and enable GPIOs for MMC/SD slot. Signed-off-by: Mike Rapoport <mike@compulab.co.il>
2011-03-07 22:29:24 +08:00
ARM: tegra: add TrimSlice board Add basic support for CompuLab TrimSlice platform Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Colin Cross <ccross@android.com>
2011-02-07 16:10:53 +08:00
#include "board-trimslice.h"
ARM: tegra: Switch to new pinctrl driver * Rename old pinmux and new pinctrl platform driver and DT match table entries, so the new driver gets instantiated. * Re-write board-pinmux.c, so that it uses pinctrl APIs to configura the pinmux. * Re-write board-*-pinmux.c so that the pinmux configuration tables are in pinctrl format. Ventana's pin mux table needed some edits on top of the basic format conversion, since some mux options that were previously marked as reserved are now valid in the new pinctrl driver. Attempting to use the old reserved names will result in a failure. Specifically, groups lpw0, lpw2, lsc1, lsck, and lsda were changed from function rsvd4 to displaya, and group pta was changed from function rsvd2 to hdmi. All boards' pin mux tables needed some edits on top of the based format conversion, since function i2c was split into i2c1 (first general I2C controller) and i2cp (power I2C controller) to better align function definitions with HW blocks. Due to the split of mux tables into pure mux and pull/tristate tables, many entries in the separate Seaboard/Ventana tables could be merged into the common table, since the entries differed only in the portion in one of the tables, not both. Most pin groups allow configuration of mux, tri-state, and pull. However, some don't allow pull configuration, which is instead configured by new groups that only allow pull configuration. This is a reflection of the true HW capabilities, which weren't fully represented by the old pinmux driver. This required adding new pull table entries for those new groups, and setting many other entries' pull configuration to TEGRA_PINCONFIG_DONT_SET. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Olof Johansson <olof@lixom.net>
2011-12-14 06:21:01 +08:00
#include "board-pinmux.h"
ARM: tegra: add TrimSlice board Add basic support for CompuLab TrimSlice platform Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Colin Cross <ccross@android.com>
2011-02-07 16:10:53 +08:00
ARM: tegra: Switch to new pinctrl driver * Rename old pinmux and new pinctrl platform driver and DT match table entries, so the new driver gets instantiated. * Re-write board-pinmux.c, so that it uses pinctrl APIs to configura the pinmux. * Re-write board-*-pinmux.c so that the pinmux configuration tables are in pinctrl format. Ventana's pin mux table needed some edits on top of the basic format conversion, since some mux options that were previously marked as reserved are now valid in the new pinctrl driver. Attempting to use the old reserved names will result in a failure. Specifically, groups lpw0, lpw2, lsc1, lsck, and lsda were changed from function rsvd4 to displaya, and group pta was changed from function rsvd2 to hdmi. All boards' pin mux tables needed some edits on top of the based format conversion, since function i2c was split into i2c1 (first general I2C controller) and i2cp (power I2C controller) to better align function definitions with HW blocks. Due to the split of mux tables into pure mux and pull/tristate tables, many entries in the separate Seaboard/Ventana tables could be merged into the common table, since the entries differed only in the portion in one of the tables, not both. Most pin groups allow configuration of mux, tri-state, and pull. However, some don't allow pull configuration, which is instead configured by new groups that only allow pull configuration. This is a reflection of the true HW capabilities, which weren't fully represented by the old pinmux driver. This required adding new pull table entries for those new groups, and setting many other entries' pull configuration to TEGRA_PINCONFIG_DONT_SET. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Olof Johansson <olof@lixom.net>
2011-12-14 06:21:01 +08:00
static struct pinctrl_map trimslice_map[] = {
TEGRA_MAP_MUXCONF("ata", "ide", none, tristate),
TEGRA_MAP_MUXCONF("atb", "sdio4", none, driven),
TEGRA_MAP_MUXCONF("atc", "nand", none, tristate),
TEGRA_MAP_MUXCONF("atd", "gmi", none, tristate),
TEGRA_MAP_MUXCONF("ate", "gmi", none, tristate),
TEGRA_MAP_MUXCONF("cdev1", "plla_out", none, driven),
TEGRA_MAP_MUXCONF("cdev2", "pllp_out4", down, tristate),
TEGRA_MAP_MUXCONF("crtp", "crt", none, tristate),
TEGRA_MAP_MUXCONF("csus", "vi_sensor_clk", down, tristate),
TEGRA_MAP_MUXCONF("dap1", "dap1", none, driven),
TEGRA_MAP_MUXCONF("dap2", "dap2", none, tristate),
TEGRA_MAP_MUXCONF("dap3", "dap3", none, tristate),
TEGRA_MAP_MUXCONF("dap4", "dap4", none, tristate),
TEGRA_MAP_MUXCONF("ddc", "i2c2", up, driven),
TEGRA_MAP_MUXCONF("dta", "vi", none, tristate),
TEGRA_MAP_MUXCONF("dtb", "vi", none, tristate),
TEGRA_MAP_MUXCONF("dtc", "vi", none, tristate),
TEGRA_MAP_MUXCONF("dtd", "vi", none, tristate),
TEGRA_MAP_MUXCONF("dte", "vi", none, tristate),
TEGRA_MAP_MUXCONF("dtf", "i2c3", up, driven),
TEGRA_MAP_MUXCONF("gma", "sdio4", none, driven),
TEGRA_MAP_MUXCONF("gmb", "nand", none, tristate),
TEGRA_MAP_MUXCONF("gmc", "sflash", none, driven),
TEGRA_MAP_MUXCONF("gmd", "sflash", none, driven),
TEGRA_MAP_MUXCONF("gme", "gmi", none, tristate),
TEGRA_MAP_MUXCONF("gpu", "uarta", none, driven),
TEGRA_MAP_MUXCONF("gpu7", "rtck", none, driven),
TEGRA_MAP_MUXCONF("gpv", "pcie", none, driven),
TEGRA_MAP_MUXCONF("hdint", "hdmi", na, tristate),
TEGRA_MAP_MUXCONF("i2cp", "i2cp", none, tristate),
TEGRA_MAP_MUXCONF("irrx", "uartb", up, tristate),
TEGRA_MAP_MUXCONF("irtx", "uartb", up, tristate),
TEGRA_MAP_MUXCONF("kbca", "kbc", up, tristate),
TEGRA_MAP_MUXCONF("kbcb", "kbc", up, tristate),
TEGRA_MAP_MUXCONF("kbcc", "kbc", up, tristate),
TEGRA_MAP_MUXCONF("kbcd", "kbc", up, tristate),
TEGRA_MAP_MUXCONF("kbce", "kbc", up, tristate),
TEGRA_MAP_MUXCONF("kbcf", "kbc", up, tristate),
TEGRA_MAP_MUXCONF("lcsn", "displaya", na, tristate),
TEGRA_MAP_MUXCONF("ld0", "displaya", na, driven),
TEGRA_MAP_MUXCONF("ld1", "displaya", na, driven),
TEGRA_MAP_MUXCONF("ld10", "displaya", na, driven),
TEGRA_MAP_MUXCONF("ld11", "displaya", na, driven),
TEGRA_MAP_MUXCONF("ld12", "displaya", na, driven),
TEGRA_MAP_MUXCONF("ld13", "displaya", na, driven),
TEGRA_MAP_MUXCONF("ld14", "displaya", na, driven),
TEGRA_MAP_MUXCONF("ld15", "displaya", na, driven),
TEGRA_MAP_MUXCONF("ld16", "displaya", na, driven),
TEGRA_MAP_MUXCONF("ld17", "displaya", na, driven),
TEGRA_MAP_MUXCONF("ld2", "displaya", na, driven),
TEGRA_MAP_MUXCONF("ld3", "displaya", na, driven),
TEGRA_MAP_MUXCONF("ld4", "displaya", na, driven),
TEGRA_MAP_MUXCONF("ld5", "displaya", na, driven),
TEGRA_MAP_MUXCONF("ld6", "displaya", na, driven),
TEGRA_MAP_MUXCONF("ld7", "displaya", na, driven),
TEGRA_MAP_MUXCONF("ld8", "displaya", na, driven),
TEGRA_MAP_MUXCONF("ld9", "displaya", na, driven),
TEGRA_MAP_MUXCONF("ldc", "displaya", na, tristate),
TEGRA_MAP_MUXCONF("ldi", "displaya", na, driven),
TEGRA_MAP_MUXCONF("lhp0", "displaya", na, driven),
TEGRA_MAP_MUXCONF("lhp1", "displaya", na, driven),
TEGRA_MAP_MUXCONF("lhp2", "displaya", na, driven),
TEGRA_MAP_MUXCONF("lhs", "displaya", na, driven),
TEGRA_MAP_MUXCONF("lm0", "displaya", na, driven),
TEGRA_MAP_MUXCONF("lm1", "displaya", na, tristate),
TEGRA_MAP_MUXCONF("lpp", "displaya", na, driven),
TEGRA_MAP_MUXCONF("lpw0", "displaya", na, driven),
TEGRA_MAP_MUXCONF("lpw1", "displaya", na, tristate),
TEGRA_MAP_MUXCONF("lpw2", "displaya", na, driven),
TEGRA_MAP_MUXCONF("lsc0", "displaya", na, driven),
TEGRA_MAP_MUXCONF("lsc1", "displaya", na, tristate),
TEGRA_MAP_MUXCONF("lsck", "displaya", na, tristate),
TEGRA_MAP_MUXCONF("lsda", "displaya", na, tristate),
TEGRA_MAP_MUXCONF("lsdi", "displaya", na, tristate),
TEGRA_MAP_MUXCONF("lspi", "displaya", na, driven),
TEGRA_MAP_MUXCONF("lvp0", "displaya", na, tristate),
TEGRA_MAP_MUXCONF("lvp1", "displaya", na, driven),
TEGRA_MAP_MUXCONF("lvs", "displaya", na, driven),
TEGRA_MAP_MUXCONF("owc", "rsvd2", up, tristate),
TEGRA_MAP_MUXCONF("pmc", "pwr_on", na, tristate),
TEGRA_MAP_MUXCONF("pta", "gmi", none, tristate),
TEGRA_MAP_MUXCONF("rm", "i2c1", up, driven),
TEGRA_MAP_MUXCONF("sdb", "pwm", na, driven),
TEGRA_MAP_MUXCONF("sdc", "pwm", up, driven),
TEGRA_MAP_MUXCONF("sdd", "pwm", up, driven),
TEGRA_MAP_MUXCONF("sdio1", "sdio1", none, driven),
TEGRA_MAP_MUXCONF("slxa", "pcie", none, driven),
TEGRA_MAP_MUXCONF("slxc", "sdio3", none, tristate),
TEGRA_MAP_MUXCONF("slxd", "sdio3", none, tristate),
TEGRA_MAP_MUXCONF("slxk", "pcie", none, driven),
TEGRA_MAP_MUXCONF("spdi", "spdif", none, tristate),
TEGRA_MAP_MUXCONF("spdo", "spdif", none, tristate),
TEGRA_MAP_MUXCONF("spia", "spi2", down, tristate),
TEGRA_MAP_MUXCONF("spib", "spi2", down, tristate),
TEGRA_MAP_MUXCONF("spic", "spi2", up, tristate),
TEGRA_MAP_MUXCONF("spid", "spi1", down, tristate),
TEGRA_MAP_MUXCONF("spie", "spi1", up, tristate),
TEGRA_MAP_MUXCONF("spif", "spi1", down, tristate),
TEGRA_MAP_MUXCONF("spig", "spi2_alt", up, tristate),
TEGRA_MAP_MUXCONF("spih", "spi2_alt", up, tristate),
TEGRA_MAP_MUXCONF("uaa", "ulpi", up, tristate),
TEGRA_MAP_MUXCONF("uab", "ulpi", up, tristate),
TEGRA_MAP_MUXCONF("uac", "rsvd2", none, driven),
TEGRA_MAP_MUXCONF("uad", "irda", up, tristate),
TEGRA_MAP_MUXCONF("uca", "uartc", up, tristate),
TEGRA_MAP_MUXCONF("ucb", "uartc", up, tristate),
TEGRA_MAP_MUXCONF("uda", "ulpi", none, tristate),
TEGRA_MAP_CONF("ck32", none, na),
TEGRA_MAP_CONF("ddrc", none, na),
TEGRA_MAP_CONF("pmca", none, na),
TEGRA_MAP_CONF("pmcb", none, na),
TEGRA_MAP_CONF("pmcc", none, na),
TEGRA_MAP_CONF("pmcd", none, na),
TEGRA_MAP_CONF("pmce", none, na),
TEGRA_MAP_CONF("xm2c", none, na),
TEGRA_MAP_CONF("xm2d", none, na),
TEGRA_MAP_CONF("ls", up, na),
TEGRA_MAP_CONF("lc", up, na),
TEGRA_MAP_CONF("ld17_0", down, na),
TEGRA_MAP_CONF("ld19_18", down, na),
TEGRA_MAP_CONF("ld21_20", down, na),
TEGRA_MAP_CONF("ld23_22", down, na),
ARM: tegra: add TrimSlice board Add basic support for CompuLab TrimSlice platform Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Colin Cross <ccross@android.com>
2011-02-07 16:10:53 +08:00
};
arm/tegra: Refactor board-*-pinmux.c to share code This moves the implementation of *_pinmux_init() into a single location. The board-specific pinmux data is left in each board's own file. This will allow future changes that set up the pinmux in a more complex fashion to do so without duplicating that code in each board's pinmux file. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2011-12-17 06:12:31 +08:00
static struct tegra_board_pinmux_conf conf = {
ARM: tegra: Switch to new pinctrl driver * Rename old pinmux and new pinctrl platform driver and DT match table entries, so the new driver gets instantiated. * Re-write board-pinmux.c, so that it uses pinctrl APIs to configura the pinmux. * Re-write board-*-pinmux.c so that the pinmux configuration tables are in pinctrl format. Ventana's pin mux table needed some edits on top of the basic format conversion, since some mux options that were previously marked as reserved are now valid in the new pinctrl driver. Attempting to use the old reserved names will result in a failure. Specifically, groups lpw0, lpw2, lsc1, lsck, and lsda were changed from function rsvd4 to displaya, and group pta was changed from function rsvd2 to hdmi. All boards' pin mux tables needed some edits on top of the based format conversion, since function i2c was split into i2c1 (first general I2C controller) and i2cp (power I2C controller) to better align function definitions with HW blocks. Due to the split of mux tables into pure mux and pull/tristate tables, many entries in the separate Seaboard/Ventana tables could be merged into the common table, since the entries differed only in the portion in one of the tables, not both. Most pin groups allow configuration of mux, tri-state, and pull. However, some don't allow pull configuration, which is instead configured by new groups that only allow pull configuration. This is a reflection of the true HW capabilities, which weren't fully represented by the old pinmux driver. This required adding new pull table entries for those new groups, and setting many other entries' pull configuration to TEGRA_PINCONFIG_DONT_SET. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Olof Johansson <olof@lixom.net>
2011-12-14 06:21:01 +08:00
.maps = trimslice_map,
.map_count = ARRAY_SIZE(trimslice_map),
arm/tegra: Refactor board-*-pinmux.c to share code This moves the implementation of *_pinmux_init() into a single location. The board-specific pinmux data is left in each board's own file. This will allow future changes that set up the pinmux in a more complex fashion to do so without duplicating that code in each board's pinmux file. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2011-12-17 06:12:31 +08:00
};
void trimslice_pinmux_init(void)
ARM: tegra: add TrimSlice board Add basic support for CompuLab TrimSlice platform Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Colin Cross <ccross@android.com>
2011-02-07 16:10:53 +08:00
{
arm/tegra: Refactor board-*-pinmux.c to share code This moves the implementation of *_pinmux_init() into a single location. The board-specific pinmux data is left in each board's own file. This will allow future changes that set up the pinmux in a more complex fashion to do so without duplicating that code in each board's pinmux file. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2011-12-17 06:12:31 +08:00
tegra_board_pinmux_init(&conf, NULL);
ARM: tegra: add TrimSlice board Add basic support for CompuLab TrimSlice platform Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Colin Cross <ccross@android.com>
2011-02-07 16:10:53 +08:00
}