2019-05-29 00:57:21 +08:00
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/* SPDX-License-Identifier: GPL-2.0-only */
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2017-07-17 15:40:20 +08:00
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/*
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* Copyright (C) STMicroelectronics SA 2017
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*
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* Authors: Philippe Cornu <philippe.cornu@st.com>
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* Yannick Fertre <yannick.fertre@st.com>
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*/
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#ifndef __DW_MIPI_DSI__
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#define __DW_MIPI_DSI__
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2019-05-20 02:36:35 +08:00
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#include <linux/types.h>
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#include <drm/drm_modes.h>
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struct drm_display_mode;
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struct drm_encoder;
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2017-11-28 09:05:38 +08:00
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struct dw_mipi_dsi;
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2019-05-20 02:36:35 +08:00
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struct mipi_dsi_device;
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struct platform_device;
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2017-11-28 09:05:38 +08:00
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2017-07-17 15:40:20 +08:00
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struct dw_mipi_dsi_phy_ops {
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int (*init)(void *priv_data);
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2019-05-27 18:21:38 +08:00
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void (*power_on)(void *priv_data);
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void (*power_off)(void *priv_data);
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2018-04-06 22:39:01 +08:00
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int (*get_lane_mbps)(void *priv_data,
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const struct drm_display_mode *mode,
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2017-07-17 15:40:20 +08:00
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unsigned long mode_flags, u32 lanes, u32 format,
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unsigned int *lane_mbps);
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};
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2018-10-01 20:38:41 +08:00
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struct dw_mipi_dsi_host_ops {
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int (*attach)(void *priv_data,
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struct mipi_dsi_device *dsi);
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int (*detach)(void *priv_data,
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struct mipi_dsi_device *dsi);
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};
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2017-07-17 15:40:20 +08:00
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struct dw_mipi_dsi_plat_data {
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void __iomem *base;
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unsigned int max_data_lanes;
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enum drm_mode_status (*mode_valid)(void *priv_data,
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const struct drm_display_mode *mode);
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const struct dw_mipi_dsi_phy_ops *phy_ops;
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2018-10-01 20:38:41 +08:00
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const struct dw_mipi_dsi_host_ops *host_ops;
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2017-07-17 15:40:20 +08:00
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void *priv_data;
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};
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2017-11-28 09:05:38 +08:00
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struct dw_mipi_dsi *dw_mipi_dsi_probe(struct platform_device *pdev,
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const struct dw_mipi_dsi_plat_data
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*plat_data);
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void dw_mipi_dsi_remove(struct dw_mipi_dsi *dsi);
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2018-10-01 20:38:40 +08:00
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int dw_mipi_dsi_bind(struct dw_mipi_dsi *dsi, struct drm_encoder *encoder);
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2017-11-28 09:05:38 +08:00
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void dw_mipi_dsi_unbind(struct dw_mipi_dsi *dsi);
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2018-10-01 20:38:44 +08:00
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void dw_mipi_dsi_set_slave(struct dw_mipi_dsi *dsi, struct dw_mipi_dsi *slave);
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2017-07-17 15:40:20 +08:00
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#endif /* __DW_MIPI_DSI__ */
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