2012-09-06 15:09:11 +08:00
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/*
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* Copyright (C) 2012 Freescale Semiconductor, Inc.
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*
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* The OPP code in function cpu0_set_target() is reused from
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* drivers/cpufreq/omap-cpufreq.c
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/clk.h>
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2013-09-11 01:59:46 +08:00
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#include <linux/cpu.h>
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2012-09-06 15:09:11 +08:00
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#include <linux/cpufreq.h>
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#include <linux/err.h>
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#include <linux/module.h>
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#include <linux/of.h>
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2013-09-20 05:03:52 +08:00
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#include <linux/pm_opp.h>
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2013-01-30 22:27:49 +08:00
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#include <linux/platform_device.h>
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2012-09-06 15:09:11 +08:00
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#include <linux/regulator/consumer.h>
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#include <linux/slab.h>
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static unsigned int transition_latency;
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static unsigned int voltage_tolerance; /* in percentage */
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static struct device *cpu_dev;
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static struct clk *cpu_clk;
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static struct regulator *cpu_reg;
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static struct cpufreq_frequency_table *freq_table;
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static unsigned int cpu0_get_speed(unsigned int cpu)
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{
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return clk_get_rate(cpu_clk) / 1000;
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}
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2013-10-25 22:15:48 +08:00
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static int cpu0_set_target(struct cpufreq_policy *policy, unsigned int index)
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2012-09-06 15:09:11 +08:00
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{
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2013-09-20 05:03:51 +08:00
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struct dev_pm_opp *opp;
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2013-03-18 16:09:42 +08:00
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unsigned long volt = 0, volt_old = 0, tol = 0;
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2013-08-14 22:08:24 +08:00
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unsigned int old_freq, new_freq;
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2013-02-26 01:22:37 +08:00
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long freq_Hz, freq_exact;
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2012-09-06 15:09:11 +08:00
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int ret;
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freq_Hz = clk_round_rate(cpu_clk, freq_table[index].frequency * 1000);
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2013-11-26 10:01:18 +08:00
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if (freq_Hz <= 0)
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2012-09-06 15:09:11 +08:00
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freq_Hz = freq_table[index].frequency * 1000;
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2013-08-14 22:08:24 +08:00
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freq_exact = freq_Hz;
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new_freq = freq_Hz / 1000;
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old_freq = clk_get_rate(cpu_clk) / 1000;
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2012-09-06 15:09:11 +08:00
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2013-08-13 20:58:24 +08:00
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if (!IS_ERR(cpu_reg)) {
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2013-01-19 03:52:33 +08:00
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rcu_read_lock();
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2013-09-20 05:03:50 +08:00
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opp = dev_pm_opp_find_freq_ceil(cpu_dev, &freq_Hz);
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2012-09-06 15:09:11 +08:00
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if (IS_ERR(opp)) {
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2013-01-19 03:52:33 +08:00
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rcu_read_unlock();
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2012-09-06 15:09:11 +08:00
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pr_err("failed to find OPP for %ld\n", freq_Hz);
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2013-08-14 22:08:24 +08:00
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return PTR_ERR(opp);
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2012-09-06 15:09:11 +08:00
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}
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2013-09-20 05:03:50 +08:00
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volt = dev_pm_opp_get_voltage(opp);
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2013-01-19 03:52:33 +08:00
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rcu_read_unlock();
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2012-09-06 15:09:11 +08:00
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tol = volt * voltage_tolerance / 100;
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volt_old = regulator_get_voltage(cpu_reg);
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}
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pr_debug("%u MHz, %ld mV --> %u MHz, %ld mV\n",
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2013-08-14 22:08:24 +08:00
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old_freq / 1000, volt_old ? volt_old / 1000 : -1,
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new_freq / 1000, volt ? volt / 1000 : -1);
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2012-09-06 15:09:11 +08:00
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/* scaling up? scale voltage before frequency */
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2013-08-14 22:08:24 +08:00
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if (!IS_ERR(cpu_reg) && new_freq > old_freq) {
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2012-09-06 15:09:11 +08:00
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ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
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if (ret) {
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pr_err("failed to scale voltage up: %d\n", ret);
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2013-08-14 22:08:24 +08:00
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return ret;
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2012-09-06 15:09:11 +08:00
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}
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}
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2013-02-26 01:22:37 +08:00
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ret = clk_set_rate(cpu_clk, freq_exact);
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2012-09-06 15:09:11 +08:00
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if (ret) {
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pr_err("failed to set clock rate: %d\n", ret);
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2013-08-13 20:58:24 +08:00
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if (!IS_ERR(cpu_reg))
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2012-09-06 15:09:11 +08:00
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regulator_set_voltage_tol(cpu_reg, volt_old, tol);
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2013-08-14 22:08:24 +08:00
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return ret;
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2012-09-06 15:09:11 +08:00
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}
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/* scaling down? scale voltage after frequency */
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2013-08-14 22:08:24 +08:00
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if (!IS_ERR(cpu_reg) && new_freq < old_freq) {
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2012-09-06 15:09:11 +08:00
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ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
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if (ret) {
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pr_err("failed to scale voltage down: %d\n", ret);
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2013-08-14 22:08:24 +08:00
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clk_set_rate(cpu_clk, old_freq * 1000);
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2012-09-06 15:09:11 +08:00
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}
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}
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2013-04-01 20:57:44 +08:00
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return ret;
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2012-09-06 15:09:11 +08:00
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}
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static int cpu0_cpufreq_init(struct cpufreq_policy *policy)
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{
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2013-10-03 22:59:09 +08:00
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return cpufreq_generic_init(policy, freq_table, transition_latency);
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2012-09-06 15:09:11 +08:00
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}
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static struct cpufreq_driver cpu0_cpufreq_driver = {
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.flags = CPUFREQ_STICKY,
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2013-10-03 22:58:00 +08:00
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.verify = cpufreq_generic_frequency_table_verify,
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2013-10-25 22:15:48 +08:00
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.target_index = cpu0_set_target,
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2012-09-06 15:09:11 +08:00
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.get = cpu0_get_speed,
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.init = cpu0_cpufreq_init,
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2013-10-03 22:58:00 +08:00
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.exit = cpufreq_generic_exit,
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2012-09-06 15:09:11 +08:00
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.name = "generic_cpu0",
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2013-10-03 22:58:00 +08:00
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.attr = cpufreq_generic_attr,
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2012-09-06 15:09:11 +08:00
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};
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2013-01-30 22:27:49 +08:00
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static int cpu0_cpufreq_probe(struct platform_device *pdev)
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2012-09-06 15:09:11 +08:00
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{
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2013-06-17 22:04:19 +08:00
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struct device_node *np;
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2012-09-06 15:09:11 +08:00
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int ret;
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2013-09-11 01:59:46 +08:00
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cpu_dev = get_cpu_device(0);
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if (!cpu_dev) {
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pr_err("failed to get cpu0 device\n");
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return -ENODEV;
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}
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2013-01-29 00:13:15 +08:00
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2013-06-17 22:04:19 +08:00
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np = of_node_get(cpu_dev->of_node);
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2012-09-06 15:09:11 +08:00
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if (!np) {
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pr_err("failed to find cpu0 node\n");
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2013-06-17 22:04:19 +08:00
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return -ENOENT;
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2012-09-06 15:09:11 +08:00
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}
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2013-08-10 02:07:12 +08:00
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cpu_reg = devm_regulator_get_optional(cpu_dev, "cpu0");
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cpufreq: cpufreq-cpu0: defer probe when regulator is not ready
With commit 1e4b545, regulator_get will now return -EPROBE_DEFER
when the cpu0-supply node is present, but the regulator is not yet
registered.
It is possible for this to occur when the regulator registration
by itself might be defered due to some dependent interface not yet
instantiated. For example: an regulator which uses I2C and GPIO might
need both systems available before proceeding, in this case, the
regulator might defer it's registration.
However, the cpufreq-cpu0 driver assumes that any un-successful
return result is equivalent of failure.
When the regulator_get returns failure other than -EPROBE_DEFER, it
makes sense to assume that supply node is not present and proceed
with the assumption that only clock control is necessary in the
platform.
With this change, we can now handle the following conditions:
a) cpu0-supply binding is not present, regulator_get will return
appropriate error result, resulting in cpufreq-cpu0 driver
controlling just the clock.
b) cpu0-supply binding is present, regulator_get returns
-EPROBE_DEFER, we retry resulting in cpufreq-cpu0 driver
registering later once the regulator is available.
c) cpu0-supply binding is present, regulator_get returns
-EPROBE_DEFER, however, regulator never registers, we retry until
cpufreq-cpu0 driver fails to register pointing at device tree
information bug. However, in this case, the fact that
cpufreq-cpu0 operates with clock only when the DT binding clearly
indicates need of a supply is a bug of it's own.
d) cpu0-supply gets an regulator at probe - cpufreq-cpu0 driver
controls both the clock and regulator
Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2013-05-01 21:38:12 +08:00
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if (IS_ERR(cpu_reg)) {
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/*
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* If cpu0 regulator supply node is present, but regulator is
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* not yet registered, we should try defering probe.
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*/
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if (PTR_ERR(cpu_reg) == -EPROBE_DEFER) {
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dev_err(cpu_dev, "cpu0 regulator not ready, retry\n");
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ret = -EPROBE_DEFER;
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goto out_put_node;
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}
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pr_warn("failed to get cpu0 regulator: %ld\n",
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PTR_ERR(cpu_reg));
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}
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2013-01-30 22:27:49 +08:00
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cpu_clk = devm_clk_get(cpu_dev, NULL);
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2012-09-06 15:09:11 +08:00
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if (IS_ERR(cpu_clk)) {
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ret = PTR_ERR(cpu_clk);
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pr_err("failed to get cpu0 clock: %d\n", ret);
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goto out_put_node;
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}
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ret = of_init_opp_table(cpu_dev);
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if (ret) {
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pr_err("failed to init OPP table: %d\n", ret);
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goto out_put_node;
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}
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2013-09-20 05:03:50 +08:00
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ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table);
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2012-09-06 15:09:11 +08:00
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if (ret) {
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pr_err("failed to init cpufreq table: %d\n", ret);
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goto out_put_node;
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}
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of_property_read_u32(np, "voltage-tolerance", &voltage_tolerance);
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if (of_property_read_u32(np, "clock-latency", &transition_latency))
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transition_latency = CPUFREQ_ETERNAL;
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2013-09-26 17:19:37 +08:00
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if (!IS_ERR(cpu_reg)) {
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2013-09-20 05:03:51 +08:00
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struct dev_pm_opp *opp;
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2012-09-06 15:09:11 +08:00
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unsigned long min_uV, max_uV;
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int i;
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/*
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* OPP is maintained in order of increasing frequency, and
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* freq_table initialised from OPP is therefore sorted in the
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* same order.
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*/
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for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++)
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;
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2013-01-19 03:52:33 +08:00
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rcu_read_lock();
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2013-09-20 05:03:50 +08:00
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opp = dev_pm_opp_find_freq_exact(cpu_dev,
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2012-09-06 15:09:11 +08:00
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freq_table[0].frequency * 1000, true);
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2013-09-20 05:03:50 +08:00
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min_uV = dev_pm_opp_get_voltage(opp);
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opp = dev_pm_opp_find_freq_exact(cpu_dev,
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2012-09-06 15:09:11 +08:00
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freq_table[i-1].frequency * 1000, true);
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2013-09-20 05:03:50 +08:00
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max_uV = dev_pm_opp_get_voltage(opp);
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2013-01-19 03:52:33 +08:00
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rcu_read_unlock();
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2012-09-06 15:09:11 +08:00
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ret = regulator_set_voltage_time(cpu_reg, min_uV, max_uV);
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if (ret > 0)
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transition_latency += ret * 1000;
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}
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ret = cpufreq_register_driver(&cpu0_cpufreq_driver);
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if (ret) {
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pr_err("failed register driver: %d\n", ret);
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goto out_free_table;
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}
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of_node_put(np);
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return 0;
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out_free_table:
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2013-09-20 05:03:50 +08:00
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dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table);
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2012-09-06 15:09:11 +08:00
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out_put_node:
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of_node_put(np);
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return ret;
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}
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2013-01-30 22:27:49 +08:00
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static int cpu0_cpufreq_remove(struct platform_device *pdev)
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{
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cpufreq_unregister_driver(&cpu0_cpufreq_driver);
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2013-09-20 05:03:50 +08:00
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dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table);
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2013-01-30 22:27:49 +08:00
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return 0;
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}
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static struct platform_driver cpu0_cpufreq_platdrv = {
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.driver = {
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.name = "cpufreq-cpu0",
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.owner = THIS_MODULE,
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},
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.probe = cpu0_cpufreq_probe,
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.remove = cpu0_cpufreq_remove,
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};
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module_platform_driver(cpu0_cpufreq_platdrv);
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2012-09-06 15:09:11 +08:00
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MODULE_AUTHOR("Shawn Guo <shawn.guo@linaro.org>");
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MODULE_DESCRIPTION("Generic CPU0 cpufreq driver");
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MODULE_LICENSE("GPL");
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