2022-02-25 21:24:27 +08:00
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2022 MediaTek Corporation. All rights reserved.
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* Author: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
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*/
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/iopoll.h>
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#include <linux/kernel.h>
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#include <linux/mailbox_controller.h>
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#include <linux/module.h>
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#include <linux/of_device.h>
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#include <linux/slab.h>
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struct mtk_adsp_mbox_priv {
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struct device *dev;
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struct mbox_controller mbox;
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void __iomem *va_mboxreg;
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const struct mtk_adsp_mbox_cfg *cfg;
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};
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struct mtk_adsp_mbox_cfg {
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u32 set_in;
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u32 set_out;
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u32 clr_in;
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u32 clr_out;
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};
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static inline struct mtk_adsp_mbox_priv *get_mtk_adsp_mbox_priv(struct mbox_controller *mbox)
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{
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return container_of(mbox, struct mtk_adsp_mbox_priv, mbox);
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}
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static irqreturn_t mtk_adsp_mbox_irq(int irq, void *data)
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{
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struct mbox_chan *chan = data;
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struct mtk_adsp_mbox_priv *priv = get_mtk_adsp_mbox_priv(chan->mbox);
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u32 op = readl(priv->va_mboxreg + priv->cfg->set_out);
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writel(op, priv->va_mboxreg + priv->cfg->clr_out);
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return IRQ_WAKE_THREAD;
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}
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static irqreturn_t mtk_adsp_mbox_isr(int irq, void *data)
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{
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struct mbox_chan *chan = data;
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mbox_chan_received_data(chan, NULL);
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return IRQ_HANDLED;
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}
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static struct mbox_chan *mtk_adsp_mbox_xlate(struct mbox_controller *mbox,
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const struct of_phandle_args *sp)
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{
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return mbox->chans;
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}
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static int mtk_adsp_mbox_startup(struct mbox_chan *chan)
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{
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struct mtk_adsp_mbox_priv *priv = get_mtk_adsp_mbox_priv(chan->mbox);
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/* Clear ADSP mbox command */
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writel(0xFFFFFFFF, priv->va_mboxreg + priv->cfg->clr_in);
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writel(0xFFFFFFFF, priv->va_mboxreg + priv->cfg->clr_out);
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return 0;
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}
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static void mtk_adsp_mbox_shutdown(struct mbox_chan *chan)
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{
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struct mtk_adsp_mbox_priv *priv = get_mtk_adsp_mbox_priv(chan->mbox);
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/* Clear ADSP mbox command */
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writel(0xFFFFFFFF, priv->va_mboxreg + priv->cfg->clr_in);
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writel(0xFFFFFFFF, priv->va_mboxreg + priv->cfg->clr_out);
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}
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static int mtk_adsp_mbox_send_data(struct mbox_chan *chan, void *data)
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{
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struct mtk_adsp_mbox_priv *priv = get_mtk_adsp_mbox_priv(chan->mbox);
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u32 *msg = data;
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writel(*msg, priv->va_mboxreg + priv->cfg->set_in);
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return 0;
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}
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static bool mtk_adsp_mbox_last_tx_done(struct mbox_chan *chan)
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{
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struct mtk_adsp_mbox_priv *priv = get_mtk_adsp_mbox_priv(chan->mbox);
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return readl(priv->va_mboxreg + priv->cfg->set_in) == 0;
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}
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static const struct mbox_chan_ops mtk_adsp_mbox_chan_ops = {
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.send_data = mtk_adsp_mbox_send_data,
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.startup = mtk_adsp_mbox_startup,
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.shutdown = mtk_adsp_mbox_shutdown,
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.last_tx_done = mtk_adsp_mbox_last_tx_done,
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};
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static int mtk_adsp_mbox_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct mtk_adsp_mbox_priv *priv;
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const struct mtk_adsp_mbox_cfg *cfg;
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struct mbox_controller *mbox;
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int ret, irq;
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priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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mbox = &priv->mbox;
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mbox->dev = dev;
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mbox->ops = &mtk_adsp_mbox_chan_ops;
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mbox->txdone_irq = false;
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mbox->txdone_poll = true;
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mbox->of_xlate = mtk_adsp_mbox_xlate;
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mbox->num_chans = 1;
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mbox->chans = devm_kzalloc(dev, sizeof(*mbox->chans), GFP_KERNEL);
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if (!mbox->chans)
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return -ENOMEM;
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priv->va_mboxreg = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(priv->va_mboxreg))
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return PTR_ERR(priv->va_mboxreg);
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cfg = of_device_get_match_data(dev);
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if (!cfg)
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return -EINVAL;
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priv->cfg = cfg;
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irq = platform_get_irq(pdev, 0);
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if (irq < 0)
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return irq;
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ret = devm_request_threaded_irq(dev, irq, mtk_adsp_mbox_irq,
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mtk_adsp_mbox_isr, IRQF_TRIGGER_NONE,
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dev_name(dev), mbox->chans);
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if (ret < 0)
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return ret;
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platform_set_drvdata(pdev, priv);
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return devm_mbox_controller_register(dev, &priv->mbox);
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}
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2022-04-22 10:39:09 +08:00
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static const struct mtk_adsp_mbox_cfg mt8186_adsp_mbox_cfg = {
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.set_in = 0x00,
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.set_out = 0x04,
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.clr_in = 0x08,
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.clr_out = 0x0C,
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};
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2022-02-25 21:24:27 +08:00
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static const struct mtk_adsp_mbox_cfg mt8195_adsp_mbox_cfg = {
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.set_in = 0x00,
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.set_out = 0x1c,
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.clr_in = 0x04,
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.clr_out = 0x20,
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};
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static const struct of_device_id mtk_adsp_mbox_of_match[] = {
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2022-04-22 10:39:09 +08:00
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{ .compatible = "mediatek,mt8186-adsp-mbox", .data = &mt8186_adsp_mbox_cfg },
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2022-02-25 21:24:27 +08:00
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{ .compatible = "mediatek,mt8195-adsp-mbox", .data = &mt8195_adsp_mbox_cfg },
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{},
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};
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MODULE_DEVICE_TABLE(of, mtk_adsp_mbox_of_match);
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static struct platform_driver mtk_adsp_mbox_driver = {
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.probe = mtk_adsp_mbox_probe,
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.driver = {
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.name = "mtk_adsp_mbox",
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.of_match_table = mtk_adsp_mbox_of_match,
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},
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};
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module_platform_driver(mtk_adsp_mbox_driver);
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MODULE_AUTHOR("Allen-KH Cheng <Allen-KH.Cheng@mediatek.com>");
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MODULE_DESCRIPTION("MTK ADSP Mailbox Controller");
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MODULE_LICENSE("GPL v2");
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