License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.
By default all files without license information are under the default
license of the kernel, which is GPL version 2.
Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.
This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.
How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,
Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.
The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.
The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.
Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if <5
lines).
All documentation files were explicitly excluded.
The following heuristics were used to determine which SPDX license
identifiers to apply.
- when both scanners couldn't find any license traces, file was
considered to have no license information in it, and the top level
COPYING file license applied.
For non */uapi/* files that summary was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 11139
and resulted in the first patch in this series.
If that file was a */uapi/* path one, it was "GPL-2.0 WITH
Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 WITH Linux-syscall-note 930
and resulted in the second patch in this series.
- if a file had some form of licensing information in it, and was one
of the */uapi/* ones, it was denoted with the Linux-syscall-note if
any GPL family license was found in the file or had no licensing in
it (per prior point). Results summary:
SPDX license identifier # files
---------------------------------------------------|------
GPL-2.0 WITH Linux-syscall-note 270
GPL-2.0+ WITH Linux-syscall-note 169
((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21
((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17
LGPL-2.1+ WITH Linux-syscall-note 15
GPL-1.0+ WITH Linux-syscall-note 14
((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5
LGPL-2.0+ WITH Linux-syscall-note 4
LGPL-2.1 WITH Linux-syscall-note 3
((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3
((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1
and that resulted in the third patch in this series.
- when the two scanners agreed on the detected license(s), that became
the concluded license(s).
- when there was disagreement between the two scanners (one detected a
license but the other didn't, or they both detected different
licenses) a manual inspection of the file occurred.
- In most cases a manual inspection of the information in the file
resulted in a clear resolution of the license that should apply (and
which scanner probably needed to revisit its heuristics).
- When it was not immediately clear, the license identifier was
confirmed with lawyers working with the Linux Foundation.
- If there was any question as to the appropriate license identifier,
the file was flagged for further research and to be revisited later
in time.
In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.
Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights. The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.
Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.
In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.
Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
- a full scancode scan run, collecting the matched texts, detected
license ids and scores
- reviewing anything where there was a license detected (about 500+
files) to ensure that the applied SPDX license was correct
- reviewing anything where there was no detection but the patch license
was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
SPDX license was correct
This produced a worksheet with 20 files needing minor correction. This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.
These .csv files were then reviewed by Greg. Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected. This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.) Finally Greg ran the script using the .csv files to
generate the patches.
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-01 22:07:57 +08:00
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/* SPDX-License-Identifier: GPL-2.0 */
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2007-12-21 12:39:22 +08:00
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/*
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* Common DCR / SDR / CPR register definitions used on various IBM/AMCC
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* 4xx processors
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*
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* Copyright 2007 Benjamin Herrenschmidt, IBM Corp
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* <benh@kernel.crashing.org>
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*
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* Mostly lifted from asm-ppc/ibm4xx.h by
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*
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* Copyright (c) 1999 Grant Erickson <grant@lcse.umn.edu>
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*
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*/
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#ifndef __DCR_REGS_H__
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#define __DCR_REGS_H__
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/*
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* Most DCRs used for controlling devices such as the MAL, DMA engine,
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* etc... are obtained for the device tree.
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*
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* The definitions in this files are fixed DCRs and indirect DCRs that
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* are commonly used outside of specific drivers or refer to core
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* common registers that may occasionally have to be tweaked outside
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* of the driver main register set
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*/
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/* CPRs (440GX and 440SP/440SPe) */
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#define DCRN_CPR0_CONFIG_ADDR 0xc
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#define DCRN_CPR0_CONFIG_DATA 0xd
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/* SDRs (440GX and 440SP/440SPe) */
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#define DCRN_SDR0_CONFIG_ADDR 0xe
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#define DCRN_SDR0_CONFIG_DATA 0xf
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#define SDR0_PFC0 0x4100
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#define SDR0_PFC1 0x4101
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#define SDR0_PFC1_EPS 0x1c00000
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#define SDR0_PFC1_EPS_SHIFT 22
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#define SDR0_PFC1_RMII 0x02000000
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#define SDR0_MFR 0x4300
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#define SDR0_MFR_TAH0 0x80000000 /* TAHOE0 Enable */
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#define SDR0_MFR_TAH1 0x40000000 /* TAHOE1 Enable */
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#define SDR0_MFR_PCM 0x10000000 /* PPC440GP irq compat mode */
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#define SDR0_MFR_ECS 0x08000000 /* EMAC int clk */
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#define SDR0_MFR_T0TXFL 0x00080000
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#define SDR0_MFR_T0TXFH 0x00040000
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#define SDR0_MFR_T1TXFL 0x00020000
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#define SDR0_MFR_T1TXFH 0x00010000
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#define SDR0_MFR_E0TXFL 0x00008000
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#define SDR0_MFR_E0TXFH 0x00004000
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#define SDR0_MFR_E0RXFL 0x00002000
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#define SDR0_MFR_E0RXFH 0x00001000
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#define SDR0_MFR_E1TXFL 0x00000800
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#define SDR0_MFR_E1TXFH 0x00000400
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#define SDR0_MFR_E1RXFL 0x00000200
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#define SDR0_MFR_E1RXFH 0x00000100
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#define SDR0_MFR_E2TXFL 0x00000080
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#define SDR0_MFR_E2TXFH 0x00000040
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#define SDR0_MFR_E2RXFL 0x00000020
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#define SDR0_MFR_E2RXFH 0x00000010
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#define SDR0_MFR_E3TXFL 0x00000008
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#define SDR0_MFR_E3TXFH 0x00000004
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#define SDR0_MFR_E3RXFL 0x00000002
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#define SDR0_MFR_E3RXFH 0x00000001
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#define SDR0_UART0 0x0120
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#define SDR0_UART1 0x0121
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#define SDR0_UART2 0x0122
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#define SDR0_UART3 0x0123
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#define SDR0_CUST0 0x4000
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2008-09-04 12:08:20 +08:00
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/* SDR for 405EZ */
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#define DCRN_SDR_ICINTSTAT 0x4510
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#define ICINTSTAT_ICRX 0x80000000
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#define ICINTSTAT_ICTX0 0x40000000
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#define ICINTSTAT_ICTX1 0x20000000
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#define ICINTSTAT_ICTX 0x60000000
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2008-10-02 14:37:57 +08:00
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/* SDRs (460EX/460GT) */
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#define SDR0_ETH_CFG 0x4103
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#define SDR0_ETH_CFG_ECS 0x00000100 /* EMAC int clk source */
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2008-03-26 19:39:50 +08:00
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/*
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* All those DCR register addresses are offsets from the base address
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* for the SRAM0 controller (e.g. 0x20 on 440GX). The base address is
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* excluded here and configured in the device tree.
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*/
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#define DCRN_SRAM0_SB0CR 0x00
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#define DCRN_SRAM0_SB1CR 0x01
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#define DCRN_SRAM0_SB2CR 0x02
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#define DCRN_SRAM0_SB3CR 0x03
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#define SRAM_SBCR_BU_MASK 0x00000180
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#define SRAM_SBCR_BS_64KB 0x00000800
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#define SRAM_SBCR_BU_RO 0x00000080
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#define SRAM_SBCR_BU_RW 0x00000180
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#define DCRN_SRAM0_BEAR 0x04
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#define DCRN_SRAM0_BESR0 0x05
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#define DCRN_SRAM0_BESR1 0x06
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#define DCRN_SRAM0_PMEG 0x07
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#define DCRN_SRAM0_CID 0x08
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#define DCRN_SRAM0_REVID 0x09
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#define DCRN_SRAM0_DPC 0x0a
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#define SRAM_DPC_ENABLE 0x80000000
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/*
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* All those DCR register addresses are offsets from the base address
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* for the SRAM0 controller (e.g. 0x30 on 440GX). The base address is
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* excluded here and configured in the device tree.
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*/
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#define DCRN_L2C0_CFG 0x00
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#define L2C_CFG_L2M 0x80000000
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#define L2C_CFG_ICU 0x40000000
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#define L2C_CFG_DCU 0x20000000
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#define L2C_CFG_DCW_MASK 0x1e000000
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#define L2C_CFG_TPC 0x01000000
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#define L2C_CFG_CPC 0x00800000
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#define L2C_CFG_FRAN 0x00200000
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#define L2C_CFG_SS_MASK 0x00180000
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#define L2C_CFG_SS_256 0x00000000
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#define L2C_CFG_CPIM 0x00040000
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#define L2C_CFG_TPIM 0x00020000
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#define L2C_CFG_LIM 0x00010000
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#define L2C_CFG_PMUX_MASK 0x00007000
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#define L2C_CFG_PMUX_SNP 0x00000000
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#define L2C_CFG_PMUX_IF 0x00001000
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#define L2C_CFG_PMUX_DF 0x00002000
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#define L2C_CFG_PMUX_DS 0x00003000
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#define L2C_CFG_PMIM 0x00000800
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#define L2C_CFG_TPEI 0x00000400
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#define L2C_CFG_CPEI 0x00000200
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#define L2C_CFG_NAM 0x00000100
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#define L2C_CFG_SMCM 0x00000080
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#define L2C_CFG_NBRM 0x00000040
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#define L2C_CFG_RDBW 0x00000008 /* only 460EX/GT */
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#define DCRN_L2C0_CMD 0x01
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#define L2C_CMD_CLR 0x80000000
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#define L2C_CMD_DIAG 0x40000000
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#define L2C_CMD_INV 0x20000000
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#define L2C_CMD_CCP 0x10000000
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#define L2C_CMD_CTE 0x08000000
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#define L2C_CMD_STRC 0x04000000
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#define L2C_CMD_STPC 0x02000000
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#define L2C_CMD_RPMC 0x01000000
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#define L2C_CMD_HCC 0x00800000
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#define DCRN_L2C0_ADDR 0x02
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#define DCRN_L2C0_DATA 0x03
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#define DCRN_L2C0_SR 0x04
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#define L2C_SR_CC 0x80000000
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#define L2C_SR_CPE 0x40000000
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#define L2C_SR_TPE 0x20000000
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#define L2C_SR_LRU 0x10000000
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#define L2C_SR_PCS 0x08000000
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#define DCRN_L2C0_REVID 0x05
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#define DCRN_L2C0_SNP0 0x06
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#define DCRN_L2C0_SNP1 0x07
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#define L2C_SNP_BA_MASK 0xffff0000
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#define L2C_SNP_SSR_MASK 0x0000f000
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#define L2C_SNP_SSR_32G 0x0000f000
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#define L2C_SNP_ESR 0x00000800
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2009-12-12 12:24:44 +08:00
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/*
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* DCR register offsets for 440SP/440SPe I2O/DMA controller.
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* The base address is configured in the device tree.
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*/
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#define DCRN_I2O0_IBAL 0x006
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#define DCRN_I2O0_IBAH 0x007
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#define I2O_REG_ENABLE 0x00000001 /* Enable I2O/DMA access */
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/* 440SP/440SPe Software Reset DCR */
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#define DCRN_SDR0_SRST 0x0200
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#define DCRN_SDR0_SRST_I2ODMA (0x80000000 >> 15) /* Reset I2O/DMA */
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/* 440SP/440SPe Memory Queue DCR offsets */
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#define DCRN_MQ0_XORBA 0x04
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#define DCRN_MQ0_CF2H 0x06
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#define DCRN_MQ0_CFBHL 0x0f
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#define DCRN_MQ0_BAUH 0x10
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/* HB/LL Paths Configuration Register */
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#define MQ0_CFBHL_TPLM 28
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#define MQ0_CFBHL_HBCL 23
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#define MQ0_CFBHL_POLY 15
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2007-12-21 12:39:22 +08:00
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#endif /* __DCR_REGS_H__ */
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