2005-04-17 06:20:36 +08:00
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/*
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* Platform device support for Au1x00 SoCs.
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*
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* Copyright 2004, Matt Porter <mporter@kernel.crashing.org>
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*
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2008-04-04 04:02:53 +08:00
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* (C) Copyright Embedded Alley Solutions, Inc 2005
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* Author: Pantelis Antoniou <pantelis@embeddedalley.com>
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*
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2005-04-17 06:20:36 +08:00
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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2008-04-24 02:43:55 +08:00
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2008-07-16 01:44:29 +08:00
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#include <linux/dma-mapping.h>
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2010-07-21 20:30:50 +08:00
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#include <linux/etherdevice.h>
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2011-05-08 16:42:18 +08:00
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#include <linux/init.h>
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2005-10-30 02:07:23 +08:00
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#include <linux/platform_device.h>
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2008-04-04 04:02:53 +08:00
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#include <linux/serial_8250.h>
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2011-05-08 16:42:18 +08:00
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#include <linux/slab.h>
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2005-04-17 06:20:36 +08:00
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2005-09-15 16:03:12 +08:00
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#include <asm/mach-au1x00/au1xxx.h>
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2008-10-21 14:59:14 +08:00
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#include <asm/mach-au1x00/au1xxx_dbdma.h>
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#include <asm/mach-au1x00/au1100_mmc.h>
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2009-11-10 08:13:30 +08:00
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#include <asm/mach-au1x00/au1xxx_eth.h>
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2005-04-17 06:20:36 +08:00
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2010-07-21 20:30:50 +08:00
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#include <prom.h>
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2010-09-25 21:13:46 +08:00
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static void alchemy_8250_pm(struct uart_port *port, unsigned int state,
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unsigned int old_state)
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{
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2010-10-26 00:44:11 +08:00
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#ifdef CONFIG_SERIAL_8250
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2010-09-25 21:13:46 +08:00
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switch (state) {
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case 0:
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2011-05-08 16:42:17 +08:00
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alchemy_uart_enable(CPHYSADDR(port->membase));
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2010-09-25 21:13:46 +08:00
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serial8250_do_pm(port, state, old_state);
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break;
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case 3: /* power off */
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serial8250_do_pm(port, state, old_state);
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2011-05-08 16:42:17 +08:00
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alchemy_uart_disable(CPHYSADDR(port->membase));
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2010-09-25 21:13:46 +08:00
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break;
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default:
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serial8250_do_pm(port, state, old_state);
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break;
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}
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2010-10-26 00:44:11 +08:00
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#endif
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2010-09-25 21:13:46 +08:00
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}
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2009-10-16 01:07:34 +08:00
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#define PORT(_base, _irq) \
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{ \
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.mapbase = _base, \
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.irq = _irq, \
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.regshift = 2, \
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.iotype = UPIO_AU, \
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2009-10-29 04:49:46 +08:00
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.flags = UPF_SKIP_TEST | UPF_IOREMAP | \
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UPF_FIXED_TYPE, \
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.type = PORT_16550A, \
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2010-09-25 21:13:46 +08:00
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.pm = alchemy_8250_pm, \
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2008-04-04 04:02:53 +08:00
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}
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2011-05-08 16:42:17 +08:00
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static struct plat_serial8250_port au1x00_uart_data[][4] __initdata = {
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[ALCHEMY_CPU_AU1000] = {
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PORT(AU1000_UART0_PHYS_ADDR, AU1000_UART0_INT),
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PORT(AU1000_UART1_PHYS_ADDR, AU1000_UART1_INT),
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PORT(AU1000_UART2_PHYS_ADDR, AU1000_UART2_INT),
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PORT(AU1000_UART3_PHYS_ADDR, AU1000_UART3_INT),
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},
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[ALCHEMY_CPU_AU1500] = {
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PORT(AU1000_UART0_PHYS_ADDR, AU1500_UART0_INT),
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PORT(AU1000_UART3_PHYS_ADDR, AU1500_UART3_INT),
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},
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[ALCHEMY_CPU_AU1100] = {
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PORT(AU1000_UART0_PHYS_ADDR, AU1100_UART0_INT),
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PORT(AU1000_UART1_PHYS_ADDR, AU1100_UART1_INT),
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PORT(AU1000_UART3_PHYS_ADDR, AU1100_UART3_INT),
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},
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[ALCHEMY_CPU_AU1550] = {
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PORT(AU1000_UART0_PHYS_ADDR, AU1550_UART0_INT),
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PORT(AU1000_UART1_PHYS_ADDR, AU1550_UART1_INT),
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PORT(AU1000_UART3_PHYS_ADDR, AU1550_UART3_INT),
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},
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[ALCHEMY_CPU_AU1200] = {
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PORT(AU1000_UART0_PHYS_ADDR, AU1200_UART0_INT),
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PORT(AU1000_UART1_PHYS_ADDR, AU1200_UART1_INT),
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},
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2008-04-04 04:02:53 +08:00
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};
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static struct platform_device au1xx0_uart_device = {
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.name = "serial8250",
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.id = PLAT8250_DEV_AU1X00,
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};
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2011-05-08 16:42:17 +08:00
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static void __init alchemy_setup_uarts(int ctype)
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{
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unsigned int uartclk = get_au1x00_uart_baud_base() * 16;
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int s = sizeof(struct plat_serial8250_port);
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int c = alchemy_get_uarts(ctype);
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struct plat_serial8250_port *ports;
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ports = kzalloc(s * (c + 1), GFP_KERNEL);
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if (!ports) {
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printk(KERN_INFO "Alchemy: no memory for UART data\n");
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return;
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}
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memcpy(ports, au1x00_uart_data[ctype], s * c);
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au1xx0_uart_device.dev.platform_data = ports;
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/* Fill up uartclk. */
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for (s = 0; s < c; s++)
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ports[s].uartclk = uartclk;
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if (platform_device_register(&au1xx0_uart_device))
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printk(KERN_INFO "Alchemy: failed to register UARTs\n");
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}
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2005-09-15 00:17:59 +08:00
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/* OHCI (USB full speed host controller) */
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2005-04-17 06:20:36 +08:00
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static struct resource au1xxx_usb_ohci_resources[] = {
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[0] = {
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.start = USB_OHCI_BASE,
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2006-01-21 06:09:54 +08:00
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.end = USB_OHCI_BASE + USB_OHCI_LEN - 1,
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2005-04-17 06:20:36 +08:00
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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2009-10-08 02:15:15 +08:00
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.start = FOR_PLATFORM_C_USB_HOST_INT,
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.end = FOR_PLATFORM_C_USB_HOST_INT,
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2005-04-17 06:20:36 +08:00
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.flags = IORESOURCE_IRQ,
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},
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};
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/* The dmamask must be set for OHCI to work */
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2009-04-07 10:01:15 +08:00
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static u64 ohci_dmamask = DMA_BIT_MASK(32);
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2005-04-17 06:20:36 +08:00
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static struct platform_device au1xxx_usb_ohci_device = {
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.name = "au1xxx-ohci",
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.id = 0,
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.dev = {
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.dma_mask = &ohci_dmamask,
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2009-04-07 10:01:15 +08:00
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.coherent_dma_mask = DMA_BIT_MASK(32),
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2005-04-17 06:20:36 +08:00
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},
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.num_resources = ARRAY_SIZE(au1xxx_usb_ohci_resources),
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.resource = au1xxx_usb_ohci_resources,
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};
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2005-04-04 09:06:19 +08:00
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/*** AU1100 LCD controller ***/
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#ifdef CONFIG_FB_AU1100
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static struct resource au1100_lcd_resources[] = {
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[0] = {
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.start = LCD_PHYS_ADDR,
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.end = LCD_PHYS_ADDR + 0x800 - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = AU1100_LCD_INT,
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.end = AU1100_LCD_INT,
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.flags = IORESOURCE_IRQ,
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}
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};
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2009-04-07 10:01:15 +08:00
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static u64 au1100_lcd_dmamask = DMA_BIT_MASK(32);
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2005-04-04 09:06:19 +08:00
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static struct platform_device au1100_lcd_device = {
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.name = "au1100-lcd",
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.id = 0,
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.dev = {
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.dma_mask = &au1100_lcd_dmamask,
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2009-04-07 10:01:15 +08:00
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.coherent_dma_mask = DMA_BIT_MASK(32),
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2005-04-04 09:06:19 +08:00
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},
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.num_resources = ARRAY_SIZE(au1100_lcd_resources),
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.resource = au1100_lcd_resources,
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};
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#endif
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2005-09-15 00:17:59 +08:00
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#ifdef CONFIG_SOC_AU1200
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/* EHCI (USB high speed host controller) */
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static struct resource au1xxx_usb_ehci_resources[] = {
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[0] = {
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.start = USB_EHCI_BASE,
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.end = USB_EHCI_BASE + USB_EHCI_LEN - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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2009-10-08 02:15:15 +08:00
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.start = AU1200_USB_INT,
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.end = AU1200_USB_INT,
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2005-09-15 00:17:59 +08:00
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.flags = IORESOURCE_IRQ,
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},
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};
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2009-04-07 10:01:15 +08:00
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static u64 ehci_dmamask = DMA_BIT_MASK(32);
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2005-09-15 00:17:59 +08:00
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static struct platform_device au1xxx_usb_ehci_device = {
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.name = "au1xxx-ehci",
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.id = 0,
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.dev = {
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.dma_mask = &ehci_dmamask,
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2009-04-07 10:01:15 +08:00
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.coherent_dma_mask = DMA_BIT_MASK(32),
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2005-09-15 00:17:59 +08:00
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},
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.num_resources = ARRAY_SIZE(au1xxx_usb_ehci_resources),
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.resource = au1xxx_usb_ehci_resources,
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};
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/* Au1200 UDC (USB gadget controller) */
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static struct resource au1xxx_usb_gdt_resources[] = {
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[0] = {
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.start = USB_UDC_BASE,
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.end = USB_UDC_BASE + USB_UDC_LEN - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = AU1200_USB_INT,
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.end = AU1200_USB_INT,
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.flags = IORESOURCE_IRQ,
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},
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};
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2009-04-07 10:01:15 +08:00
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static u64 udc_dmamask = DMA_BIT_MASK(32);
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2005-09-15 00:17:59 +08:00
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static struct platform_device au1xxx_usb_gdt_device = {
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.name = "au1xxx-udc",
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.id = 0,
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.dev = {
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.dma_mask = &udc_dmamask,
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2009-04-07 10:01:15 +08:00
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.coherent_dma_mask = DMA_BIT_MASK(32),
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2005-09-15 00:17:59 +08:00
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},
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.num_resources = ARRAY_SIZE(au1xxx_usb_gdt_resources),
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.resource = au1xxx_usb_gdt_resources,
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};
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/* Au1200 UOC (USB OTG controller) */
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static struct resource au1xxx_usb_otg_resources[] = {
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[0] = {
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.start = USB_UOC_BASE,
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.end = USB_UOC_BASE + USB_UOC_LEN - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = AU1200_USB_INT,
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.end = AU1200_USB_INT,
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.flags = IORESOURCE_IRQ,
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},
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};
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2009-04-07 10:01:15 +08:00
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static u64 uoc_dmamask = DMA_BIT_MASK(32);
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2005-09-15 00:17:59 +08:00
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static struct platform_device au1xxx_usb_otg_device = {
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.name = "au1xxx-uoc",
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.id = 0,
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.dev = {
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.dma_mask = &uoc_dmamask,
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2009-04-07 10:01:15 +08:00
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.coherent_dma_mask = DMA_BIT_MASK(32),
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2005-09-15 00:17:59 +08:00
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},
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.num_resources = ARRAY_SIZE(au1xxx_usb_otg_resources),
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.resource = au1xxx_usb_otg_resources,
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};
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static struct resource au1200_lcd_resources[] = {
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[0] = {
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.start = LCD_PHYS_ADDR,
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.end = LCD_PHYS_ADDR + 0x800 - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = AU1200_LCD_INT,
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.end = AU1200_LCD_INT,
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.flags = IORESOURCE_IRQ,
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}
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};
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2009-04-07 10:01:15 +08:00
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static u64 au1200_lcd_dmamask = DMA_BIT_MASK(32);
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2005-09-15 00:17:59 +08:00
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static struct platform_device au1200_lcd_device = {
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.name = "au1200-lcd",
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.id = 0,
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.dev = {
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.dma_mask = &au1200_lcd_dmamask,
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2009-04-07 10:01:15 +08:00
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.coherent_dma_mask = DMA_BIT_MASK(32),
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2005-09-15 00:17:59 +08:00
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},
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.num_resources = ARRAY_SIZE(au1200_lcd_resources),
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.resource = au1200_lcd_resources,
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};
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2005-09-15 16:03:12 +08:00
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2009-04-07 10:01:15 +08:00
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static u64 au1xxx_mmc_dmamask = DMA_BIT_MASK(32);
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2005-09-21 14:18:27 +08:00
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2008-10-21 14:59:14 +08:00
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extern struct au1xmmc_platform_data au1xmmc_platdata[2];
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static struct resource au1200_mmc0_resources[] = {
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[0] = {
|
2011-05-08 16:42:19 +08:00
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.start = AU1100_SD0_PHYS_ADDR,
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.end = AU1100_SD0_PHYS_ADDR + 0xfff,
|
2008-10-21 14:59:14 +08:00
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = AU1200_SD_INT,
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.end = AU1200_SD_INT,
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.flags = IORESOURCE_IRQ,
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},
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[2] = {
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.start = DSCR_CMD0_SDMS_TX0,
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.end = DSCR_CMD0_SDMS_TX0,
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.flags = IORESOURCE_DMA,
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},
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[3] = {
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.start = DSCR_CMD0_SDMS_RX0,
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.end = DSCR_CMD0_SDMS_RX0,
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.flags = IORESOURCE_DMA,
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}
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};
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static struct platform_device au1200_mmc0_device = {
|
2005-09-21 14:18:27 +08:00
|
|
|
.name = "au1xxx-mmc",
|
|
|
|
.id = 0,
|
|
|
|
.dev = {
|
2008-10-21 14:59:14 +08:00
|
|
|
.dma_mask = &au1xxx_mmc_dmamask,
|
2009-04-07 10:01:15 +08:00
|
|
|
.coherent_dma_mask = DMA_BIT_MASK(32),
|
2008-10-21 14:59:14 +08:00
|
|
|
.platform_data = &au1xmmc_platdata[0],
|
2005-09-21 14:18:27 +08:00
|
|
|
},
|
2008-10-21 14:59:14 +08:00
|
|
|
.num_resources = ARRAY_SIZE(au1200_mmc0_resources),
|
|
|
|
.resource = au1200_mmc0_resources,
|
2005-09-21 14:18:27 +08:00
|
|
|
};
|
2008-10-21 14:59:14 +08:00
|
|
|
|
|
|
|
#ifndef CONFIG_MIPS_DB1200
|
|
|
|
static struct resource au1200_mmc1_resources[] = {
|
|
|
|
[0] = {
|
2011-05-08 16:42:19 +08:00
|
|
|
.start = AU1100_SD1_PHYS_ADDR,
|
|
|
|
.end = AU1100_SD1_PHYS_ADDR + 0xfff,
|
2008-10-21 14:59:14 +08:00
|
|
|
.flags = IORESOURCE_MEM,
|
|
|
|
},
|
|
|
|
[1] = {
|
|
|
|
.start = AU1200_SD_INT,
|
|
|
|
.end = AU1200_SD_INT,
|
|
|
|
.flags = IORESOURCE_IRQ,
|
|
|
|
},
|
|
|
|
[2] = {
|
|
|
|
.start = DSCR_CMD0_SDMS_TX1,
|
|
|
|
.end = DSCR_CMD0_SDMS_TX1,
|
|
|
|
.flags = IORESOURCE_DMA,
|
|
|
|
},
|
|
|
|
[3] = {
|
|
|
|
.start = DSCR_CMD0_SDMS_RX1,
|
|
|
|
.end = DSCR_CMD0_SDMS_RX1,
|
|
|
|
.flags = IORESOURCE_DMA,
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct platform_device au1200_mmc1_device = {
|
|
|
|
.name = "au1xxx-mmc",
|
|
|
|
.id = 1,
|
|
|
|
.dev = {
|
|
|
|
.dma_mask = &au1xxx_mmc_dmamask,
|
2009-04-07 10:01:15 +08:00
|
|
|
.coherent_dma_mask = DMA_BIT_MASK(32),
|
2008-10-21 14:59:14 +08:00
|
|
|
.platform_data = &au1xmmc_platdata[1],
|
|
|
|
},
|
|
|
|
.num_resources = ARRAY_SIZE(au1200_mmc1_resources),
|
|
|
|
.resource = au1200_mmc1_resources,
|
|
|
|
};
|
|
|
|
#endif /* #ifndef CONFIG_MIPS_DB1200 */
|
2005-09-21 14:18:27 +08:00
|
|
|
#endif /* #ifdef CONFIG_SOC_AU1200 */
|
|
|
|
|
2008-01-28 01:14:52 +08:00
|
|
|
/* All Alchemy demoboards with I2C have this #define in their headers */
|
|
|
|
#ifdef SMBUS_PSC_BASE
|
|
|
|
static struct resource pbdb_smbus_resources[] = {
|
|
|
|
{
|
2008-04-06 02:16:21 +08:00
|
|
|
.start = CPHYSADDR(SMBUS_PSC_BASE),
|
|
|
|
.end = CPHYSADDR(SMBUS_PSC_BASE + 0xfffff),
|
2008-01-28 01:14:52 +08:00
|
|
|
.flags = IORESOURCE_MEM,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct platform_device pbdb_smbus_device = {
|
|
|
|
.name = "au1xpsc_smbus",
|
|
|
|
.id = 0, /* bus number */
|
|
|
|
.num_resources = ARRAY_SIZE(pbdb_smbus_resources),
|
|
|
|
.resource = pbdb_smbus_resources,
|
|
|
|
};
|
|
|
|
#endif
|
|
|
|
|
2009-11-10 08:13:30 +08:00
|
|
|
/* Macro to help defining the Ethernet MAC resources */
|
2011-05-08 16:42:18 +08:00
|
|
|
#define MAC_RES_COUNT 3 /* MAC regs base, MAC enable reg, MAC INT */
|
2009-11-10 08:13:30 +08:00
|
|
|
#define MAC_RES(_base, _enable, _irq) \
|
|
|
|
{ \
|
2011-05-08 16:42:18 +08:00
|
|
|
.start = _base, \
|
|
|
|
.end = _base + 0xffff, \
|
2009-11-10 08:13:30 +08:00
|
|
|
.flags = IORESOURCE_MEM, \
|
|
|
|
}, \
|
|
|
|
{ \
|
2011-05-08 16:42:18 +08:00
|
|
|
.start = _enable, \
|
|
|
|
.end = _enable + 0x3, \
|
2009-11-10 08:13:30 +08:00
|
|
|
.flags = IORESOURCE_MEM, \
|
|
|
|
}, \
|
|
|
|
{ \
|
|
|
|
.start = _irq, \
|
|
|
|
.end = _irq, \
|
|
|
|
.flags = IORESOURCE_IRQ \
|
|
|
|
}
|
|
|
|
|
2011-05-08 16:42:18 +08:00
|
|
|
static struct resource au1xxx_eth0_resources[][MAC_RES_COUNT] __initdata = {
|
|
|
|
[ALCHEMY_CPU_AU1000] = {
|
|
|
|
MAC_RES(AU1000_MAC0_PHYS_ADDR,
|
|
|
|
AU1000_MACEN_PHYS_ADDR,
|
|
|
|
AU1000_MAC0_DMA_INT)
|
|
|
|
},
|
|
|
|
[ALCHEMY_CPU_AU1500] = {
|
|
|
|
MAC_RES(AU1500_MAC0_PHYS_ADDR,
|
|
|
|
AU1500_MACEN_PHYS_ADDR,
|
|
|
|
AU1500_MAC0_DMA_INT)
|
|
|
|
},
|
|
|
|
[ALCHEMY_CPU_AU1100] = {
|
|
|
|
MAC_RES(AU1000_MAC0_PHYS_ADDR,
|
|
|
|
AU1000_MACEN_PHYS_ADDR,
|
|
|
|
AU1100_MAC0_DMA_INT)
|
|
|
|
},
|
|
|
|
[ALCHEMY_CPU_AU1550] = {
|
|
|
|
MAC_RES(AU1000_MAC0_PHYS_ADDR,
|
|
|
|
AU1000_MACEN_PHYS_ADDR,
|
|
|
|
AU1550_MAC0_DMA_INT)
|
|
|
|
},
|
2009-11-10 08:13:30 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
static struct au1000_eth_platform_data au1xxx_eth0_platform_data = {
|
|
|
|
.phy1_search_mac0 = 1,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct platform_device au1xxx_eth0_device = {
|
|
|
|
.name = "au1000-eth",
|
|
|
|
.id = 0,
|
2011-05-08 16:42:18 +08:00
|
|
|
.num_resources = MAC_RES_COUNT,
|
2009-11-10 08:13:30 +08:00
|
|
|
.dev.platform_data = &au1xxx_eth0_platform_data,
|
|
|
|
};
|
|
|
|
|
2011-05-08 16:42:18 +08:00
|
|
|
static struct resource au1xxx_eth1_resources[][MAC_RES_COUNT] __initdata = {
|
|
|
|
[ALCHEMY_CPU_AU1000] = {
|
|
|
|
MAC_RES(AU1000_MAC1_PHYS_ADDR,
|
|
|
|
AU1000_MACEN_PHYS_ADDR + 4,
|
|
|
|
AU1000_MAC1_DMA_INT)
|
|
|
|
},
|
|
|
|
[ALCHEMY_CPU_AU1500] = {
|
|
|
|
MAC_RES(AU1500_MAC1_PHYS_ADDR,
|
|
|
|
AU1500_MACEN_PHYS_ADDR + 4,
|
|
|
|
AU1500_MAC1_DMA_INT)
|
|
|
|
},
|
|
|
|
[ALCHEMY_CPU_AU1550] = {
|
|
|
|
MAC_RES(AU1000_MAC1_PHYS_ADDR,
|
|
|
|
AU1000_MACEN_PHYS_ADDR + 4,
|
|
|
|
AU1550_MAC1_DMA_INT)
|
|
|
|
},
|
2010-02-27 00:22:02 +08:00
|
|
|
};
|
|
|
|
|
2009-11-10 08:13:30 +08:00
|
|
|
static struct au1000_eth_platform_data au1xxx_eth1_platform_data = {
|
|
|
|
.phy1_search_mac0 = 1,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct platform_device au1xxx_eth1_device = {
|
|
|
|
.name = "au1000-eth",
|
|
|
|
.id = 1,
|
2011-05-08 16:42:18 +08:00
|
|
|
.num_resources = MAC_RES_COUNT,
|
2009-11-10 08:13:30 +08:00
|
|
|
.dev.platform_data = &au1xxx_eth1_platform_data,
|
|
|
|
};
|
|
|
|
|
|
|
|
void __init au1xxx_override_eth_cfg(unsigned int port,
|
|
|
|
struct au1000_eth_platform_data *eth_data)
|
|
|
|
{
|
|
|
|
if (!eth_data || port > 1)
|
|
|
|
return;
|
|
|
|
|
|
|
|
if (port == 0)
|
|
|
|
memcpy(&au1xxx_eth0_platform_data, eth_data,
|
|
|
|
sizeof(struct au1000_eth_platform_data));
|
|
|
|
else
|
|
|
|
memcpy(&au1xxx_eth1_platform_data, eth_data,
|
|
|
|
sizeof(struct au1000_eth_platform_data));
|
2011-05-08 16:42:18 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static void __init alchemy_setup_macs(int ctype)
|
|
|
|
{
|
|
|
|
int ret, i;
|
|
|
|
unsigned char ethaddr[6];
|
|
|
|
struct resource *macres;
|
|
|
|
|
|
|
|
/* Handle 1st MAC */
|
|
|
|
if (alchemy_get_macs(ctype) < 1)
|
|
|
|
return;
|
|
|
|
|
|
|
|
macres = kmalloc(sizeof(struct resource) * MAC_RES_COUNT, GFP_KERNEL);
|
|
|
|
if (!macres) {
|
|
|
|
printk(KERN_INFO "Alchemy: no memory for MAC0 resources\n");
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
memcpy(macres, au1xxx_eth0_resources[ctype],
|
|
|
|
sizeof(struct resource) * MAC_RES_COUNT);
|
|
|
|
au1xxx_eth0_device.resource = macres;
|
|
|
|
|
|
|
|
i = prom_get_ethernet_addr(ethaddr);
|
|
|
|
if (!i && !is_valid_ether_addr(au1xxx_eth0_platform_data.mac))
|
|
|
|
memcpy(au1xxx_eth0_platform_data.mac, ethaddr, 6);
|
|
|
|
|
|
|
|
ret = platform_device_register(&au1xxx_eth0_device);
|
2011-08-02 21:50:56 +08:00
|
|
|
if (ret)
|
2011-05-08 16:42:18 +08:00
|
|
|
printk(KERN_INFO "Alchemy: failed to register MAC0\n");
|
|
|
|
|
|
|
|
|
|
|
|
/* Handle 2nd MAC */
|
|
|
|
if (alchemy_get_macs(ctype) < 2)
|
|
|
|
return;
|
|
|
|
|
|
|
|
macres = kmalloc(sizeof(struct resource) * MAC_RES_COUNT, GFP_KERNEL);
|
|
|
|
if (!macres) {
|
|
|
|
printk(KERN_INFO "Alchemy: no memory for MAC1 resources\n");
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
memcpy(macres, au1xxx_eth1_resources[ctype],
|
|
|
|
sizeof(struct resource) * MAC_RES_COUNT);
|
|
|
|
au1xxx_eth1_device.resource = macres;
|
|
|
|
|
|
|
|
ethaddr[5] += 1; /* next addr for 2nd MAC */
|
|
|
|
if (!i && !is_valid_ether_addr(au1xxx_eth1_platform_data.mac))
|
|
|
|
memcpy(au1xxx_eth1_platform_data.mac, ethaddr, 6);
|
|
|
|
|
|
|
|
/* Register second MAC if enabled in pinfunc */
|
|
|
|
if (!(au_readl(SYS_PINFUNC) & (u32)SYS_PF_NI2)) {
|
|
|
|
ret = platform_device_register(&au1xxx_eth1_device);
|
|
|
|
if (ret)
|
|
|
|
printk(KERN_INFO "Alchemy: failed to register MAC1\n");
|
|
|
|
}
|
2009-11-10 08:13:30 +08:00
|
|
|
}
|
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
static struct platform_device *au1xxx_platform_devices[] __initdata = {
|
|
|
|
&au1xxx_usb_ohci_device,
|
2005-04-04 09:06:19 +08:00
|
|
|
#ifdef CONFIG_FB_AU1100
|
|
|
|
&au1100_lcd_device,
|
|
|
|
#endif
|
2005-09-15 00:17:59 +08:00
|
|
|
#ifdef CONFIG_SOC_AU1200
|
|
|
|
&au1xxx_usb_ehci_device,
|
|
|
|
&au1xxx_usb_gdt_device,
|
|
|
|
&au1xxx_usb_otg_device,
|
|
|
|
&au1200_lcd_device,
|
2008-10-21 14:59:14 +08:00
|
|
|
&au1200_mmc0_device,
|
|
|
|
#ifndef CONFIG_MIPS_DB1200
|
|
|
|
&au1200_mmc1_device,
|
|
|
|
#endif
|
2005-09-15 00:17:59 +08:00
|
|
|
#endif
|
2008-01-28 01:14:52 +08:00
|
|
|
#ifdef SMBUS_PSC_BASE
|
|
|
|
&pbdb_smbus_device,
|
|
|
|
#endif
|
2005-04-17 06:20:36 +08:00
|
|
|
};
|
|
|
|
|
2008-05-01 03:18:41 +08:00
|
|
|
static int __init au1xxx_platform_init(void)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
2011-05-08 16:42:18 +08:00
|
|
|
int err, ctype = alchemy_get_cputype();
|
2008-04-04 04:02:53 +08:00
|
|
|
|
2011-05-08 16:42:17 +08:00
|
|
|
alchemy_setup_uarts(ctype);
|
2011-05-08 16:42:18 +08:00
|
|
|
alchemy_setup_macs(ctype);
|
2010-07-21 20:30:50 +08:00
|
|
|
|
2010-07-17 22:38:48 +08:00
|
|
|
err = platform_add_devices(au1xxx_platform_devices,
|
|
|
|
ARRAY_SIZE(au1xxx_platform_devices));
|
|
|
|
return err;
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
arch_initcall(au1xxx_platform_init);
|