2018-07-19 22:47:06 +08:00
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// SPDX-License-Identifier: GPL-2.0+
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// Copyright (c) 2016-2017 Hisilicon Limited.
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2017-08-02 23:59:46 +08:00
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#ifndef __HNAE3_H
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#define __HNAE3_H
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/* Names used in this framework:
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* ae handle (handle):
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* a set of queues provided by AE
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* ring buffer queue (rbq):
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* the channel between upper layer and the AE, can do tx and rx
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* ring:
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* a tx or rx channel within a rbq
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* ring description (desc):
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* an element in the ring with packet information
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* buffer:
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* a memory region referred by desc with the full packet payload
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*
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* "num" means a static number set as a parameter, "count" mean a dynamic
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* number set while running
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* "cb" means control block
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*/
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#include <linux/acpi.h>
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2017-09-27 09:45:29 +08:00
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#include <linux/dcbnl.h>
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2017-08-02 23:59:46 +08:00
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/module.h>
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#include <linux/netdevice.h>
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#include <linux/pci.h>
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#include <linux/types.h>
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2018-05-19 23:53:19 +08:00
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#define HNAE3_MOD_VERSION "1.0"
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2017-08-02 23:59:46 +08:00
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/* Device IDs */
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#define HNAE3_DEV_ID_GE 0xA220
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#define HNAE3_DEV_ID_25GE 0xA221
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#define HNAE3_DEV_ID_25GE_RDMA 0xA222
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#define HNAE3_DEV_ID_25GE_RDMA_MACSEC 0xA223
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#define HNAE3_DEV_ID_50GE_RDMA 0xA224
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#define HNAE3_DEV_ID_50GE_RDMA_MACSEC 0xA225
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#define HNAE3_DEV_ID_100G_RDMA_MACSEC 0xA226
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#define HNAE3_DEV_ID_100G_VF 0xA22E
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#define HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF 0xA22F
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#define HNAE3_CLASS_NAME_SIZE 16
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#define HNAE3_DEV_INITED_B 0x0
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2017-09-20 18:52:50 +08:00
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#define HNAE3_DEV_SUPPORT_ROCE_B 0x1
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2017-09-20 18:52:51 +08:00
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#define HNAE3_DEV_SUPPORT_DCB_B 0x2
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2018-05-26 02:43:01 +08:00
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#define HNAE3_KNIC_CLIENT_INITED_B 0x3
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#define HNAE3_UNIC_CLIENT_INITED_B 0x4
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#define HNAE3_ROCE_CLIENT_INITED_B 0x5
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2018-10-01 19:46:41 +08:00
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#define HNAE3_DEV_SUPPORT_FD_B 0x6
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2018-11-15 17:29:21 +08:00
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#define HNAE3_DEV_SUPPORT_GRO_B 0x7
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2017-09-20 18:52:51 +08:00
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#define HNAE3_DEV_SUPPORT_ROCE_DCB_BITS (BIT(HNAE3_DEV_SUPPORT_DCB_B) |\
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BIT(HNAE3_DEV_SUPPORT_ROCE_B))
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2017-09-20 18:52:50 +08:00
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#define hnae3_dev_roce_supported(hdev) \
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2018-07-02 15:50:26 +08:00
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hnae3_get_bit(hdev->ae_dev->flag, HNAE3_DEV_SUPPORT_ROCE_B)
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2017-08-02 23:59:46 +08:00
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2017-09-20 18:52:51 +08:00
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#define hnae3_dev_dcb_supported(hdev) \
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2018-07-02 15:50:26 +08:00
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hnae3_get_bit(hdev->ae_dev->flag, HNAE3_DEV_SUPPORT_DCB_B)
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2017-09-20 18:52:51 +08:00
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2018-10-01 19:46:41 +08:00
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#define hnae3_dev_fd_supported(hdev) \
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hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_FD_B)
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2018-11-15 17:29:21 +08:00
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#define hnae3_dev_gro_supported(hdev) \
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hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_GRO_B)
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2017-08-02 23:59:46 +08:00
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#define ring_ptr_move_fw(ring, p) \
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((ring)->p = ((ring)->p + 1) % (ring)->desc_num)
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#define ring_ptr_move_bw(ring, p) \
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((ring)->p = ((ring)->p - 1 + (ring)->desc_num) % (ring)->desc_num)
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enum hns_desc_type {
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DESC_TYPE_SKB,
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DESC_TYPE_PAGE,
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};
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struct hnae3_handle;
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struct hnae3_queue {
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void __iomem *io_base;
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struct hnae3_ae_algo *ae_algo;
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struct hnae3_handle *handle;
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int tqp_index; /* index in a handle */
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u32 buf_size; /* size for hnae_desc->addr, preset by AE */
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2019-02-23 17:22:15 +08:00
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u16 tx_desc_num;/* total number of tx desc */
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u16 rx_desc_num;/* total number of rx desc */
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2017-08-02 23:59:46 +08:00
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};
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/*hnae3 loop mode*/
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enum hnae3_loop {
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2018-09-27 02:28:34 +08:00
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HNAE3_LOOP_APP,
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2018-09-27 02:28:35 +08:00
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HNAE3_LOOP_SERIAL_SERDES,
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HNAE3_LOOP_PARALLEL_SERDES,
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2018-09-27 02:28:33 +08:00
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HNAE3_LOOP_PHY,
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HNAE3_LOOP_NONE,
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2017-08-02 23:59:46 +08:00
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};
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enum hnae3_client_type {
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HNAE3_CLIENT_KNIC,
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HNAE3_CLIENT_UNIC,
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HNAE3_CLIENT_ROCE,
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};
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enum hnae3_dev_type {
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HNAE3_DEV_KNIC,
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HNAE3_DEV_UNIC,
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};
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/* mac media type */
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enum hnae3_media_type {
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HNAE3_MEDIA_TYPE_UNKNOWN,
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HNAE3_MEDIA_TYPE_FIBER,
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HNAE3_MEDIA_TYPE_COPPER,
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HNAE3_MEDIA_TYPE_BACKPLANE,
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2018-09-21 23:41:46 +08:00
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HNAE3_MEDIA_TYPE_NONE,
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2017-08-02 23:59:46 +08:00
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};
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2017-11-02 20:45:19 +08:00
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enum hnae3_reset_notify_type {
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HNAE3_UP_CLIENT,
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HNAE3_DOWN_CLIENT,
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HNAE3_INIT_CLIENT,
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HNAE3_UNINIT_CLIENT,
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2019-01-18 16:13:14 +08:00
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HNAE3_RESTORE_CLIENT,
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2017-11-02 20:45:19 +08:00
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};
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enum hnae3_reset_type {
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2018-03-22 22:28:52 +08:00
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HNAE3_VF_RESET,
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net: hns3: adjust VF's reset process
Currently when VF need to reset itself, it will send a cmd to PF,
after receiving the VF reset requset, PF sends a cmd to inform
VF to enter the reset process and send a cmd to firmware to do the
actual reset for the VF, it is possible that firmware has resetted
the VF, but VF has not entered the reset process, which may cause
IO not stopped problem when firmware is resetting VF.
This patch fixes it by adjusting the VF reset process, when VF
need to reset itself, it will enter the reset process first, and
it will tell the PF to send cmd to firmware to reset itself.
Add member reset_pending to struct hclgevf_dev, which indicates that
there is reset event need to be processed by the VF's reset task, and
the VF's reset task chooses the highest-level one and clears other
low-level one when it processes reset_pending.
hclge_inform_reset_assert_to_vf function is unused now, but it will
be used to support the PF reset with VF working, so declare it in
the header file.
Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: Yunsheng Lin <linyunsheng@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2018-11-09 22:07:47 +08:00
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HNAE3_VF_FUNC_RESET,
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2018-11-09 22:07:48 +08:00
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HNAE3_VF_PF_FUNC_RESET,
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2018-03-22 22:28:54 +08:00
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HNAE3_VF_FULL_RESET,
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2018-11-09 22:07:54 +08:00
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HNAE3_FLR_RESET,
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2017-11-02 20:45:19 +08:00
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HNAE3_FUNC_RESET,
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HNAE3_CORE_RESET,
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HNAE3_GLOBAL_RESET,
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HNAE3_IMP_RESET,
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2018-12-08 05:08:06 +08:00
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HNAE3_UNKNOWN_RESET,
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2017-11-02 20:45:19 +08:00
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HNAE3_NONE_RESET,
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};
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2018-11-09 22:07:54 +08:00
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enum hnae3_flr_state {
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HNAE3_FLR_DOWN,
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HNAE3_FLR_DONE,
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};
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2017-08-02 23:59:46 +08:00
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struct hnae3_vector_info {
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u8 __iomem *io_addr;
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int vector;
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};
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#define HNAE3_RING_TYPE_B 0
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#define HNAE3_RING_TYPE_TX 0
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#define HNAE3_RING_TYPE_RX 1
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2018-01-12 16:23:15 +08:00
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#define HNAE3_RING_GL_IDX_S 0
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#define HNAE3_RING_GL_IDX_M GENMASK(1, 0)
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#define HNAE3_RING_GL_RX 0
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#define HNAE3_RING_GL_TX 1
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2017-08-02 23:59:46 +08:00
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struct hnae3_ring_chain_node {
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struct hnae3_ring_chain_node *next;
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u32 tqp_index;
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u32 flag;
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2018-01-12 16:23:15 +08:00
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u32 int_gl_idx;
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2017-08-02 23:59:46 +08:00
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};
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#define HNAE3_IS_TX_RING(node) \
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(((node)->flag & (1 << HNAE3_RING_TYPE_B)) == HNAE3_RING_TYPE_TX)
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struct hnae3_client_ops {
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int (*init_instance)(struct hnae3_handle *handle);
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void (*uninit_instance)(struct hnae3_handle *handle, bool reset);
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void (*link_status_change)(struct hnae3_handle *handle, bool state);
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2017-09-27 09:45:29 +08:00
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int (*setup_tc)(struct hnae3_handle *handle, u8 tc);
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2017-11-02 20:45:19 +08:00
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int (*reset_notify)(struct hnae3_handle *handle,
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enum hnae3_reset_notify_type type);
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2018-11-07 12:06:09 +08:00
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enum hnae3_reset_type (*process_hw_error)(struct hnae3_handle *handle);
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2017-08-02 23:59:46 +08:00
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};
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#define HNAE3_CLIENT_NAME_LENGTH 16
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struct hnae3_client {
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char name[HNAE3_CLIENT_NAME_LENGTH];
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unsigned long state;
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enum hnae3_client_type type;
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const struct hnae3_client_ops *ops;
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struct list_head node;
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};
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struct hnae3_ae_dev {
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struct pci_dev *pdev;
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const struct hnae3_ae_ops *ops;
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struct list_head node;
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u32 flag;
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enum hnae3_dev_type dev_type;
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2018-10-01 19:46:45 +08:00
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enum hnae3_reset_type reset_type;
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2017-08-02 23:59:46 +08:00
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void *priv;
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};
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/* This struct defines the operation on the handle.
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*
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* init_ae_dev(): (mandatory)
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* Get PF configure from pci_dev and initialize PF hardware
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* uninit_ae_dev()
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* Disable PF device and release PF resource
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* register_client
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* Register client to ae_dev
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* unregister_client()
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* Unregister client from ae_dev
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* start()
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* Enable the hardware
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* stop()
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* Disable the hardware
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2018-11-18 11:19:12 +08:00
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* start_client()
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* Inform the hclge that client has been started
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* stop_client()
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* Inform the hclge that client has been stopped
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2017-08-02 23:59:46 +08:00
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* get_status()
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* Get the carrier state of the back channel of the handle, 1 for ok, 0 for
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* non-ok
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* get_ksettings_an_result()
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* Get negotiation status,speed and duplex
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* update_speed_duplex_h()
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* Update hardware speed and duplex
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* get_media_type()
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* Get media type of MAC
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* adjust_link()
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* Adjust link status
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* set_loopback()
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* Set loopback
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* set_promisc_mode
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* Set promisc mode
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* set_mtu()
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* set mtu
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* get_pauseparam()
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* get tx and rx of pause frame use
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* set_pauseparam()
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* set tx and rx of pause frame use
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* set_autoneg()
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* set auto autonegotiation of pause frame use
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* get_autoneg()
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* get auto autonegotiation of pause frame use
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* get_coalesce_usecs()
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* get usecs to delay a TX interrupt after a packet is sent
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* get_rx_max_coalesced_frames()
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* get Maximum number of packets to be sent before a TX interrupt.
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* set_coalesce_usecs()
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* set usecs to delay a TX interrupt after a packet is sent
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* set_coalesce_frames()
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* set Maximum number of packets to be sent before a TX interrupt.
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* get_mac_addr()
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* get mac address
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* set_mac_addr()
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* set mac address
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* add_uc_addr
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* Add unicast addr to mac table
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* rm_uc_addr
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* Remove unicast addr from mac table
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* set_mc_addr()
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* Set multicast address
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* add_mc_addr
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* Add multicast address to mac table
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* rm_mc_addr
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* Remove multicast address from mac table
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* update_stats()
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* Update Old network device statistics
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* get_ethtool_stats()
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* Get ethtool network device statistics
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* get_strings()
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* Get a set of strings that describe the requested objects
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|
* get_sset_count()
|
|
|
|
|
* Get number of strings that @get_strings will write
|
|
|
|
|
* update_led_status()
|
|
|
|
|
* Update the led status
|
|
|
|
|
* set_led_id()
|
|
|
|
|
* Set led id
|
|
|
|
|
* get_regs()
|
|
|
|
|
* Get regs dump
|
|
|
|
|
* get_regs_len()
|
|
|
|
|
* Get the len of the regs dump
|
|
|
|
|
* get_rss_key_size()
|
|
|
|
|
* Get rss key size
|
|
|
|
|
* get_rss_indir_size()
|
|
|
|
|
* Get rss indirection table size
|
|
|
|
|
* get_rss()
|
|
|
|
|
* Get rss table
|
|
|
|
|
* set_rss()
|
|
|
|
|
* Set rss table
|
|
|
|
|
* get_tc_size()
|
|
|
|
|
* Get tc size of handle
|
|
|
|
|
* get_vector()
|
|
|
|
|
* Get vector number and vector information
|
2018-03-09 10:37:01 +08:00
|
|
|
* put_vector()
|
|
|
|
|
* Put the vector in hdev
|
2017-08-02 23:59:46 +08:00
|
|
|
* map_ring_to_vector()
|
|
|
|
|
* Map rings to vector
|
|
|
|
|
* unmap_ring_from_vector()
|
|
|
|
|
* Unmap rings from vector
|
|
|
|
|
* reset_queue()
|
|
|
|
|
* Reset queue
|
|
|
|
|
* get_fw_version()
|
|
|
|
|
* Get firmware version
|
|
|
|
|
* get_mdix_mode()
|
|
|
|
|
* Get media typr of phy
|
2018-01-05 18:18:05 +08:00
|
|
|
* enable_vlan_filter()
|
|
|
|
|
* Enable vlan filter
|
2017-08-02 23:59:46 +08:00
|
|
|
* set_vlan_filter()
|
|
|
|
|
* Set vlan filter config of Ports
|
|
|
|
|
* set_vf_vlan_filter()
|
|
|
|
|
* Set vlan filter config of vf
|
2017-12-22 12:21:47 +08:00
|
|
|
* enable_hw_strip_rxvtag()
|
|
|
|
|
* Enable/disable hardware strip vlan tag of packets received
|
2018-11-15 17:29:23 +08:00
|
|
|
* set_gro_en
|
|
|
|
|
* Enable/disable HW GRO
|
2017-08-02 23:59:46 +08:00
|
|
|
*/
|
|
|
|
|
struct hnae3_ae_ops {
|
|
|
|
|
int (*init_ae_dev)(struct hnae3_ae_dev *ae_dev);
|
|
|
|
|
void (*uninit_ae_dev)(struct hnae3_ae_dev *ae_dev);
|
2018-11-09 22:07:54 +08:00
|
|
|
void (*flr_prepare)(struct hnae3_ae_dev *ae_dev);
|
|
|
|
|
void (*flr_done)(struct hnae3_ae_dev *ae_dev);
|
2017-08-02 23:59:46 +08:00
|
|
|
int (*init_client_instance)(struct hnae3_client *client,
|
|
|
|
|
struct hnae3_ae_dev *ae_dev);
|
|
|
|
|
void (*uninit_client_instance)(struct hnae3_client *client,
|
|
|
|
|
struct hnae3_ae_dev *ae_dev);
|
|
|
|
|
int (*start)(struct hnae3_handle *handle);
|
|
|
|
|
void (*stop)(struct hnae3_handle *handle);
|
2018-11-18 11:19:12 +08:00
|
|
|
int (*client_start)(struct hnae3_handle *handle);
|
|
|
|
|
void (*client_stop)(struct hnae3_handle *handle);
|
2017-08-02 23:59:46 +08:00
|
|
|
int (*get_status)(struct hnae3_handle *handle);
|
|
|
|
|
void (*get_ksettings_an_result)(struct hnae3_handle *handle,
|
|
|
|
|
u8 *auto_neg, u32 *speed, u8 *duplex);
|
|
|
|
|
|
|
|
|
|
int (*update_speed_duplex_h)(struct hnae3_handle *handle);
|
|
|
|
|
int (*cfg_mac_speed_dup_h)(struct hnae3_handle *handle, int speed,
|
|
|
|
|
u8 duplex);
|
|
|
|
|
|
|
|
|
|
void (*get_media_type)(struct hnae3_handle *handle, u8 *media_type);
|
|
|
|
|
void (*adjust_link)(struct hnae3_handle *handle, int speed, int duplex);
|
|
|
|
|
int (*set_loopback)(struct hnae3_handle *handle,
|
|
|
|
|
enum hnae3_loop loop_mode, bool en);
|
|
|
|
|
|
2018-10-30 21:50:50 +08:00
|
|
|
int (*set_promisc_mode)(struct hnae3_handle *handle, bool en_uc_pmc,
|
|
|
|
|
bool en_mc_pmc);
|
2017-08-02 23:59:46 +08:00
|
|
|
int (*set_mtu)(struct hnae3_handle *handle, int new_mtu);
|
|
|
|
|
|
|
|
|
|
void (*get_pauseparam)(struct hnae3_handle *handle,
|
|
|
|
|
u32 *auto_neg, u32 *rx_en, u32 *tx_en);
|
|
|
|
|
int (*set_pauseparam)(struct hnae3_handle *handle,
|
|
|
|
|
u32 auto_neg, u32 rx_en, u32 tx_en);
|
|
|
|
|
|
|
|
|
|
int (*set_autoneg)(struct hnae3_handle *handle, bool enable);
|
|
|
|
|
int (*get_autoneg)(struct hnae3_handle *handle);
|
|
|
|
|
|
|
|
|
|
void (*get_coalesce_usecs)(struct hnae3_handle *handle,
|
|
|
|
|
u32 *tx_usecs, u32 *rx_usecs);
|
|
|
|
|
void (*get_rx_max_coalesced_frames)(struct hnae3_handle *handle,
|
|
|
|
|
u32 *tx_frames, u32 *rx_frames);
|
|
|
|
|
int (*set_coalesce_usecs)(struct hnae3_handle *handle, u32 timeout);
|
|
|
|
|
int (*set_coalesce_frames)(struct hnae3_handle *handle,
|
|
|
|
|
u32 coalesce_frames);
|
|
|
|
|
void (*get_coalesce_range)(struct hnae3_handle *handle,
|
|
|
|
|
u32 *tx_frames_low, u32 *rx_frames_low,
|
|
|
|
|
u32 *tx_frames_high, u32 *rx_frames_high,
|
|
|
|
|
u32 *tx_usecs_low, u32 *rx_usecs_low,
|
|
|
|
|
u32 *tx_usecs_high, u32 *rx_usecs_high);
|
|
|
|
|
|
|
|
|
|
void (*get_mac_addr)(struct hnae3_handle *handle, u8 *p);
|
2018-03-10 11:29:22 +08:00
|
|
|
int (*set_mac_addr)(struct hnae3_handle *handle, void *p,
|
|
|
|
|
bool is_first);
|
2018-09-20 01:29:51 +08:00
|
|
|
int (*do_ioctl)(struct hnae3_handle *handle,
|
|
|
|
|
struct ifreq *ifr, int cmd);
|
2017-08-02 23:59:46 +08:00
|
|
|
int (*add_uc_addr)(struct hnae3_handle *handle,
|
|
|
|
|
const unsigned char *addr);
|
|
|
|
|
int (*rm_uc_addr)(struct hnae3_handle *handle,
|
|
|
|
|
const unsigned char *addr);
|
|
|
|
|
int (*set_mc_addr)(struct hnae3_handle *handle, void *addr);
|
|
|
|
|
int (*add_mc_addr)(struct hnae3_handle *handle,
|
|
|
|
|
const unsigned char *addr);
|
|
|
|
|
int (*rm_mc_addr)(struct hnae3_handle *handle,
|
|
|
|
|
const unsigned char *addr);
|
|
|
|
|
void (*set_tso_stats)(struct hnae3_handle *handle, int enable);
|
|
|
|
|
void (*update_stats)(struct hnae3_handle *handle,
|
|
|
|
|
struct net_device_stats *net_stats);
|
|
|
|
|
void (*get_stats)(struct hnae3_handle *handle, u64 *data);
|
|
|
|
|
|
|
|
|
|
void (*get_strings)(struct hnae3_handle *handle,
|
|
|
|
|
u32 stringset, u8 *data);
|
|
|
|
|
int (*get_sset_count)(struct hnae3_handle *handle, int stringset);
|
|
|
|
|
|
2018-01-19 14:41:09 +08:00
|
|
|
void (*get_regs)(struct hnae3_handle *handle, u32 *version,
|
|
|
|
|
void *data);
|
2017-08-02 23:59:46 +08:00
|
|
|
int (*get_regs_len)(struct hnae3_handle *handle);
|
|
|
|
|
|
|
|
|
|
u32 (*get_rss_key_size)(struct hnae3_handle *handle);
|
|
|
|
|
u32 (*get_rss_indir_size)(struct hnae3_handle *handle);
|
|
|
|
|
int (*get_rss)(struct hnae3_handle *handle, u32 *indir, u8 *key,
|
|
|
|
|
u8 *hfunc);
|
|
|
|
|
int (*set_rss)(struct hnae3_handle *handle, const u32 *indir,
|
|
|
|
|
const u8 *key, const u8 hfunc);
|
2017-10-10 16:42:05 +08:00
|
|
|
int (*set_rss_tuple)(struct hnae3_handle *handle,
|
|
|
|
|
struct ethtool_rxnfc *cmd);
|
2017-10-10 16:42:06 +08:00
|
|
|
int (*get_rss_tuple)(struct hnae3_handle *handle,
|
|
|
|
|
struct ethtool_rxnfc *cmd);
|
2017-08-02 23:59:46 +08:00
|
|
|
|
|
|
|
|
int (*get_tc_size)(struct hnae3_handle *handle);
|
|
|
|
|
|
|
|
|
|
int (*get_vector)(struct hnae3_handle *handle, u16 vector_num,
|
|
|
|
|
struct hnae3_vector_info *vector_info);
|
2018-03-09 10:37:01 +08:00
|
|
|
int (*put_vector)(struct hnae3_handle *handle, int vector_num);
|
2017-08-02 23:59:46 +08:00
|
|
|
int (*map_ring_to_vector)(struct hnae3_handle *handle,
|
|
|
|
|
int vector_num,
|
|
|
|
|
struct hnae3_ring_chain_node *vr_chain);
|
|
|
|
|
int (*unmap_ring_from_vector)(struct hnae3_handle *handle,
|
|
|
|
|
int vector_num,
|
|
|
|
|
struct hnae3_ring_chain_node *vr_chain);
|
|
|
|
|
|
2018-10-30 21:50:50 +08:00
|
|
|
int (*reset_queue)(struct hnae3_handle *handle, u16 queue_id);
|
2017-08-02 23:59:46 +08:00
|
|
|
u32 (*get_fw_version)(struct hnae3_handle *handle);
|
|
|
|
|
void (*get_mdix_mode)(struct hnae3_handle *handle,
|
|
|
|
|
u8 *tp_mdix_ctrl, u8 *tp_mdix);
|
|
|
|
|
|
2018-01-05 18:18:05 +08:00
|
|
|
void (*enable_vlan_filter)(struct hnae3_handle *handle, bool enable);
|
2017-08-02 23:59:46 +08:00
|
|
|
int (*set_vlan_filter)(struct hnae3_handle *handle, __be16 proto,
|
|
|
|
|
u16 vlan_id, bool is_kill);
|
|
|
|
|
int (*set_vf_vlan_filter)(struct hnae3_handle *handle, int vfid,
|
|
|
|
|
u16 vlan, u8 qos, __be16 proto);
|
2017-12-22 12:21:47 +08:00
|
|
|
int (*enable_hw_strip_rxvtag)(struct hnae3_handle *handle, bool enable);
|
2018-10-20 03:15:27 +08:00
|
|
|
void (*reset_event)(struct pci_dev *pdev, struct hnae3_handle *handle);
|
2018-11-07 12:06:08 +08:00
|
|
|
void (*set_default_reset_request)(struct hnae3_ae_dev *ae_dev,
|
|
|
|
|
enum hnae3_reset_type rst_type);
|
2017-12-22 12:21:40 +08:00
|
|
|
void (*get_channels)(struct hnae3_handle *handle,
|
|
|
|
|
struct ethtool_channels *ch);
|
2017-12-22 12:21:41 +08:00
|
|
|
void (*get_tqps_and_rss_info)(struct hnae3_handle *h,
|
2018-09-27 02:28:39 +08:00
|
|
|
u16 *alloc_tqps, u16 *max_rss_size);
|
2019-01-23 07:39:30 +08:00
|
|
|
int (*set_channels)(struct hnae3_handle *handle, u32 new_tqps_num,
|
|
|
|
|
bool rxfh_configured);
|
2017-12-22 12:21:54 +08:00
|
|
|
void (*get_flowctrl_adv)(struct hnae3_handle *handle,
|
|
|
|
|
u32 *flowctrl_adv);
|
2018-01-19 14:41:11 +08:00
|
|
|
int (*set_led_id)(struct hnae3_handle *handle,
|
|
|
|
|
enum ethtool_phys_id_state status);
|
2018-03-21 15:49:27 +08:00
|
|
|
void (*get_link_mode)(struct hnae3_handle *handle,
|
|
|
|
|
unsigned long *supported,
|
|
|
|
|
unsigned long *advertising);
|
2018-10-01 19:46:43 +08:00
|
|
|
int (*add_fd_entry)(struct hnae3_handle *handle,
|
|
|
|
|
struct ethtool_rxnfc *cmd);
|
|
|
|
|
int (*del_fd_entry)(struct hnae3_handle *handle,
|
|
|
|
|
struct ethtool_rxnfc *cmd);
|
2018-10-01 19:46:45 +08:00
|
|
|
void (*del_all_fd_entries)(struct hnae3_handle *handle,
|
|
|
|
|
bool clear_list);
|
2018-10-01 19:46:44 +08:00
|
|
|
int (*get_fd_rule_cnt)(struct hnae3_handle *handle,
|
|
|
|
|
struct ethtool_rxnfc *cmd);
|
|
|
|
|
int (*get_fd_rule_info)(struct hnae3_handle *handle,
|
|
|
|
|
struct ethtool_rxnfc *cmd);
|
|
|
|
|
int (*get_fd_all_rules)(struct hnae3_handle *handle,
|
|
|
|
|
struct ethtool_rxnfc *cmd, u32 *rule_locs);
|
2018-10-01 19:46:45 +08:00
|
|
|
int (*restore_fd_rules)(struct hnae3_handle *handle);
|
2018-10-01 19:46:47 +08:00
|
|
|
void (*enable_fd)(struct hnae3_handle *handle, bool enable);
|
2018-11-22 22:09:43 +08:00
|
|
|
int (*dbg_run_cmd)(struct hnae3_handle *handle, char *cmd_buf);
|
2018-12-08 05:08:02 +08:00
|
|
|
pci_ers_result_t (*handle_hw_ras_error)(struct hnae3_ae_dev *ae_dev);
|
2018-11-07 12:06:09 +08:00
|
|
|
bool (*get_hw_reset_stat)(struct hnae3_handle *handle);
|
|
|
|
|
bool (*ae_dev_resetting)(struct hnae3_handle *handle);
|
|
|
|
|
unsigned long (*ae_dev_reset_cnt)(struct hnae3_handle *handle);
|
2019-02-02 22:39:28 +08:00
|
|
|
int (*set_gro_en)(struct hnae3_handle *handle, bool enable);
|
2018-12-15 23:31:57 +08:00
|
|
|
u16 (*get_global_queue_id)(struct hnae3_handle *handle, u16 queue_id);
|
2018-12-20 11:51:58 +08:00
|
|
|
void (*set_timer_task)(struct hnae3_handle *handle, bool enable);
|
net: hns3: Fix NULL deref when unloading driver
When the driver is unloading, if there is a calling of ndo_open occurs
between phy_disconnect() and unregister_netdev(), it will end up
causing the kernel to eventually hit a NULL deref:
[14942.417828] Unable to handle kernel NULL pointer dereference at virtual address 0000000000000048
[14942.529878] Mem abort info:
[14942.551166] ESR = 0x96000006
[14942.567070] Exception class = DABT (current EL), IL = 32 bits
[14942.623081] SET = 0, FnV = 0
[14942.639112] EA = 0, S1PTW = 0
[14942.643628] Data abort info:
[14942.659227] ISV = 0, ISS = 0x00000006
[14942.674870] CM = 0, WnR = 0
[14942.679449] user pgtable: 4k pages, 48-bit VAs, pgdp = 00000000224ad6ad
[14942.695595] [0000000000000048] pgd=00000021e6673003, pud=00000021dbf01003, pmd=0000000000000000
[14942.723163] Internal error: Oops: 96000006 [#1] PREEMPT SMP
[14942.729358] Modules linked in: hns3(O) hclge(O) pv680_mii(O) hnae3(O) [last unloaded: hclge]
[14942.738907] CPU: 1 PID: 26629 Comm: kworker/u4:13 Tainted: G O 4.18.0-rc1-12928-ga960791-dirty #145
[14942.749491] Hardware name: Huawei Technologies Co., Ltd. D05/D05, BIOS Hi1620 FPGA TB BOOT BIOS B763 08/17/2018
[14942.760392] Workqueue: events_power_efficient phy_state_machine
[14942.766644] pstate: 80c00009 (Nzcv daif +PAN +UAO)
[14942.771918] pc : test_and_set_bit+0x18/0x38
[14942.776589] lr : netif_carrier_off+0x24/0x70
[14942.781033] sp : ffff0000121abd20
[14942.784518] x29: ffff0000121abd20 x28: 0000000000000000
[14942.790208] x27: ffff0000164d3cd8 x26: ffff8021da68b7b8
[14942.795832] x25: 0000000000000000 x24: ffff8021eb407800
[14942.801445] x23: 0000000000000000 x22: 0000000000000000
[14942.807046] x21: 0000000000000001 x20: 0000000000000000
[14942.812672] x19: 0000000000000000 x18: ffff000009781708
[14942.818284] x17: 00000000004970e8 x16: ffff00000816ad48
[14942.823900] x15: 0000000000000000 x14: 0000000000000008
[14942.829528] x13: 0000000000000000 x12: 0000000000000f65
[14942.835149] x11: 0000000000000001 x10: 00000000000009d0
[14942.840753] x9 : ffff0000121abaa0 x8 : 0000000000000000
[14942.846360] x7 : ffff000009781708 x6 : 0000000000000003
[14942.851970] x5 : 0000000000000020 x4 : 0000000000000004
[14942.857575] x3 : 0000000000000002 x2 : 0000000000000001
[14942.863180] x1 : 0000000000000048 x0 : 0000000000000000
[14942.868875] Process kworker/u4:13 (pid: 26629, stack limit = 0x00000000c909dbf3)
[14942.876464] Call trace:
[14942.879200] test_and_set_bit+0x18/0x38
[14942.883376] phy_link_change+0x38/0x78
[14942.887378] phy_state_machine+0x3dc/0x4f8
[14942.891968] process_one_work+0x158/0x470
[14942.896223] worker_thread+0x50/0x470
[14942.900219] kthread+0x104/0x130
[14942.903905] ret_from_fork+0x10/0x1c
[14942.907755] Code: d2800022 8b400c21 f9800031 9ac32044 (c85f7c22)
[14942.914185] ---[ end trace 968c9e12eb740b23 ]---
So this patch fixes it by modifying the timing to do phy_connect_direct()
and phy_disconnect().
Fixes: 256727da7395 ("net: hns3: Add MDIO support to HNS3 Ethernet driver for hip08 SoC")
Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: Peng Li <lipeng321@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2019-01-31 04:55:46 +08:00
|
|
|
int (*mac_connect_phy)(struct hnae3_handle *handle);
|
|
|
|
|
void (*mac_disconnect_phy)(struct hnae3_handle *handle);
|
2017-08-02 23:59:46 +08:00
|
|
|
};
|
|
|
|
|
|
2017-09-27 09:45:29 +08:00
|
|
|
struct hnae3_dcb_ops {
|
|
|
|
|
/* IEEE 802.1Qaz std */
|
|
|
|
|
int (*ieee_getets)(struct hnae3_handle *, struct ieee_ets *);
|
|
|
|
|
int (*ieee_setets)(struct hnae3_handle *, struct ieee_ets *);
|
|
|
|
|
int (*ieee_getpfc)(struct hnae3_handle *, struct ieee_pfc *);
|
|
|
|
|
int (*ieee_setpfc)(struct hnae3_handle *, struct ieee_pfc *);
|
|
|
|
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/* DCBX configuration */
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u8 (*getdcbx)(struct hnae3_handle *);
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u8 (*setdcbx)(struct hnae3_handle *, u8);
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2017-10-17 14:51:30 +08:00
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int (*setup_tc)(struct hnae3_handle *, u8, u8 *);
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2017-09-27 09:45:29 +08:00
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};
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2017-08-02 23:59:46 +08:00
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struct hnae3_ae_algo {
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const struct hnae3_ae_ops *ops;
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struct list_head node;
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const struct pci_device_id *pdev_id_table;
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};
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#define HNAE3_INT_NAME_LEN (IFNAMSIZ + 16)
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#define HNAE3_ITR_COUNTDOWN_START 100
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struct hnae3_tc_info {
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u16 tqp_offset; /* TQP offset from base TQP */
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u16 tqp_count; /* Total TQPs */
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u8 tc; /* TC index */
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bool enable; /* If this TC is enable or not */
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};
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#define HNAE3_MAX_TC 8
|
2017-09-20 18:52:58 +08:00
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#define HNAE3_MAX_USER_PRIO 8
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2017-08-02 23:59:46 +08:00
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struct hnae3_knic_private_info {
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struct net_device *netdev; /* Set by KNIC client when init instance */
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u16 rss_size; /* Allocated RSS queues */
|
2019-01-18 16:13:10 +08:00
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u16 req_rss_size;
|
2017-08-02 23:59:46 +08:00
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u16 rx_buf_len;
|
2019-02-23 17:22:15 +08:00
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|
|
u16 num_tx_desc;
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u16 num_rx_desc;
|
2017-08-02 23:59:46 +08:00
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u8 num_tc; /* Total number of enabled TCs */
|
2017-09-20 18:52:58 +08:00
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u8 prio_tc[HNAE3_MAX_USER_PRIO]; /* TC indexed by prio */
|
2017-08-02 23:59:46 +08:00
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struct hnae3_tc_info tc_info[HNAE3_MAX_TC]; /* Idx of array is HW TC */
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|
u16 num_tqps; /* total number of TQPs in this handle */
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|
|
struct hnae3_queue **tqp; /* array base of all TQPs in this instance */
|
2017-09-27 09:45:29 +08:00
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|
const struct hnae3_dcb_ops *dcb_ops;
|
2018-01-12 16:23:09 +08:00
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|
|
u16 int_rl_setting;
|
2018-10-11 03:05:37 +08:00
|
|
|
enum pkt_hash_types rss_type;
|
2017-08-02 23:59:46 +08:00
|
|
|
};
|
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|
|
struct hnae3_roce_private_info {
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|
|
struct net_device *netdev;
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|
|
void __iomem *roce_io_base;
|
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|
|
int base_vector;
|
|
|
|
|
int num_vectors;
|
2018-11-07 12:06:09 +08:00
|
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|
|
|
|
|
|
/* The below attributes defined for RoCE client, hnae3 gives
|
|
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|
|
* initial values to them, and RoCE client can modify and use
|
|
|
|
|
* them.
|
|
|
|
|
*/
|
|
|
|
|
unsigned long reset_state;
|
|
|
|
|
unsigned long instance_state;
|
|
|
|
|
unsigned long state;
|
2017-08-02 23:59:46 +08:00
|
|
|
};
|
|
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|
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|
|
|
struct hnae3_unic_private_info {
|
|
|
|
|
struct net_device *netdev;
|
|
|
|
|
u16 rx_buf_len;
|
2019-02-23 17:22:15 +08:00
|
|
|
u16 num_tx_desc;
|
|
|
|
|
u16 num_rx_desc;
|
|
|
|
|
|
2017-08-02 23:59:46 +08:00
|
|
|
u16 num_tqps; /* total number of tqps in this handle */
|
|
|
|
|
struct hnae3_queue **tqp; /* array base of all TQPs of this instance */
|
|
|
|
|
};
|
|
|
|
|
|
2018-09-27 02:28:34 +08:00
|
|
|
#define HNAE3_SUPPORT_APP_LOOPBACK BIT(0)
|
2017-12-15 02:03:06 +08:00
|
|
|
#define HNAE3_SUPPORT_PHY_LOOPBACK BIT(1)
|
2018-09-27 02:28:35 +08:00
|
|
|
#define HNAE3_SUPPORT_SERDES_SERIAL_LOOPBACK BIT(2)
|
2017-12-15 02:03:06 +08:00
|
|
|
#define HNAE3_SUPPORT_VF BIT(3)
|
2018-09-27 02:28:35 +08:00
|
|
|
#define HNAE3_SUPPORT_SERDES_PARALLEL_LOOPBACK BIT(4)
|
2017-08-02 23:59:46 +08:00
|
|
|
|
2018-10-12 22:34:04 +08:00
|
|
|
#define HNAE3_USER_UPE BIT(0) /* unicast promisc enabled by user */
|
|
|
|
|
#define HNAE3_USER_MPE BIT(1) /* mulitcast promisc enabled by user */
|
|
|
|
|
#define HNAE3_BPE BIT(2) /* broadcast promisc enable */
|
|
|
|
|
#define HNAE3_OVERFLOW_UPE BIT(3) /* unicast mac vlan overflow */
|
|
|
|
|
#define HNAE3_OVERFLOW_MPE BIT(4) /* multicast mac vlan overflow */
|
|
|
|
|
#define HNAE3_VLAN_FLTR BIT(5) /* enable vlan filter */
|
|
|
|
|
#define HNAE3_UPE (HNAE3_USER_UPE | HNAE3_OVERFLOW_UPE)
|
|
|
|
|
#define HNAE3_MPE (HNAE3_USER_MPE | HNAE3_OVERFLOW_MPE)
|
|
|
|
|
|
2017-08-02 23:59:46 +08:00
|
|
|
struct hnae3_handle {
|
|
|
|
|
struct hnae3_client *client;
|
|
|
|
|
struct pci_dev *pdev;
|
|
|
|
|
void *priv;
|
|
|
|
|
struct hnae3_ae_algo *ae_algo; /* the class who provides this handle */
|
|
|
|
|
u64 flags; /* Indicate the capabilities for this handle*/
|
|
|
|
|
|
|
|
|
|
union {
|
|
|
|
|
struct net_device *netdev; /* first member */
|
|
|
|
|
struct hnae3_knic_private_info kinfo;
|
|
|
|
|
struct hnae3_unic_private_info uinfo;
|
|
|
|
|
struct hnae3_roce_private_info rinfo;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
u32 numa_node_mask; /* for multi-chip support */
|
2018-10-12 22:34:04 +08:00
|
|
|
|
|
|
|
|
u8 netdev_flags;
|
2018-11-22 22:09:41 +08:00
|
|
|
struct dentry *hnae3_dbgfs;
|
2017-08-02 23:59:46 +08:00
|
|
|
};
|
|
|
|
|
|
2018-07-02 15:50:26 +08:00
|
|
|
#define hnae3_set_field(origin, mask, shift, val) \
|
2017-08-02 23:59:46 +08:00
|
|
|
do { \
|
|
|
|
|
(origin) &= (~(mask)); \
|
|
|
|
|
(origin) |= ((val) << (shift)) & (mask); \
|
|
|
|
|
} while (0)
|
2018-07-02 15:50:26 +08:00
|
|
|
#define hnae3_get_field(origin, mask, shift) (((origin) & (mask)) >> (shift))
|
2017-08-02 23:59:46 +08:00
|
|
|
|
2018-07-02 15:50:26 +08:00
|
|
|
#define hnae3_set_bit(origin, shift, val) \
|
|
|
|
|
hnae3_set_field((origin), (0x1 << (shift)), (shift), (val))
|
|
|
|
|
#define hnae3_get_bit(origin, shift) \
|
|
|
|
|
hnae3_get_field((origin), (0x1 << (shift)), (shift))
|
2017-08-02 23:59:46 +08:00
|
|
|
|
2019-01-31 04:55:44 +08:00
|
|
|
int hnae3_register_ae_dev(struct hnae3_ae_dev *ae_dev);
|
2017-08-02 23:59:46 +08:00
|
|
|
void hnae3_unregister_ae_dev(struct hnae3_ae_dev *ae_dev);
|
|
|
|
|
|
|
|
|
|
void hnae3_unregister_ae_algo(struct hnae3_ae_algo *ae_algo);
|
2018-05-16 02:20:09 +08:00
|
|
|
void hnae3_register_ae_algo(struct hnae3_ae_algo *ae_algo);
|
2017-08-02 23:59:46 +08:00
|
|
|
|
|
|
|
|
void hnae3_unregister_client(struct hnae3_client *client);
|
|
|
|
|
int hnae3_register_client(struct hnae3_client *client);
|
2018-09-20 01:29:57 +08:00
|
|
|
|
|
|
|
|
void hnae3_set_client_init_flag(struct hnae3_client *client,
|
|
|
|
|
struct hnae3_ae_dev *ae_dev, int inited);
|
2017-08-02 23:59:46 +08:00
|
|
|
#endif
|