2018-01-27 02:50:27 +08:00
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// SPDX-License-Identifier: GPL-2.0
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2016-03-12 05:35:55 +08:00
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/*
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2016-08-23 05:59:48 +08:00
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* Generic PCI host driver common code
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*
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2016-03-12 05:35:55 +08:00
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* Copyright (C) 2014 ARM Limited
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*
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* Author: Will Deacon <will.deacon@arm.com>
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*/
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#include <linux/kernel.h>
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2020-04-10 07:49:22 +08:00
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#include <linux/module.h>
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2016-03-12 05:35:55 +08:00
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#include <linux/of_address.h>
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2020-04-10 07:49:23 +08:00
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#include <linux/of_device.h>
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2016-03-12 05:35:55 +08:00
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#include <linux/of_pci.h>
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2016-06-11 03:55:09 +08:00
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#include <linux/pci-ecam.h>
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2016-03-12 05:35:55 +08:00
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#include <linux/platform_device.h>
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2016-05-12 06:34:46 +08:00
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static void gen_pci_unmap_cfg(void *ptr)
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{
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pci_ecam_free((struct pci_config_window *)ptr);
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}
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static struct pci_config_window *gen_pci_init(struct device *dev,
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2020-05-23 07:48:20 +08:00
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struct pci_host_bridge *bridge, const struct pci_ecam_ops *ops)
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2016-03-12 05:35:55 +08:00
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{
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int err;
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2016-05-12 06:34:46 +08:00
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struct resource cfgres;
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2020-07-22 10:25:13 +08:00
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struct resource_entry *bus;
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2016-05-12 06:34:46 +08:00
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struct pci_config_window *cfg;
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2016-03-12 05:35:55 +08:00
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2016-05-12 06:34:46 +08:00
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err = of_address_to_resource(dev->of_node, 0, &cfgres);
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2016-03-12 05:35:55 +08:00
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if (err) {
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dev_err(dev, "missing \"reg\" property\n");
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2020-05-23 07:48:20 +08:00
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return ERR_PTR(err);
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2016-03-12 05:35:55 +08:00
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}
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2020-07-22 10:25:13 +08:00
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bus = resource_list_first_type(&bridge->windows, IORESOURCE_BUS);
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if (!bus)
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return ERR_PTR(-ENODEV);
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cfg = pci_ecam_create(dev, &cfgres, bus->res, ops);
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2020-05-23 07:48:20 +08:00
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if (IS_ERR(cfg))
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return cfg;
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2016-03-12 05:35:55 +08:00
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2019-07-08 20:33:54 +08:00
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err = devm_add_action_or_reset(dev, gen_pci_unmap_cfg, cfg);
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2020-05-23 07:48:20 +08:00
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if (err)
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return ERR_PTR(err);
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2016-05-12 06:34:46 +08:00
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2020-05-23 07:48:20 +08:00
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return cfg;
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2016-03-12 05:35:55 +08:00
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}
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2020-04-10 07:49:23 +08:00
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int pci_host_common_probe(struct platform_device *pdev)
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2016-03-12 05:35:55 +08:00
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{
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struct device *dev = &pdev->dev;
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2017-06-29 04:14:00 +08:00
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struct pci_host_bridge *bridge;
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2016-05-12 06:34:46 +08:00
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struct pci_config_window *cfg;
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2020-04-10 07:49:23 +08:00
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const struct pci_ecam_ops *ops;
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2017-06-29 04:14:00 +08:00
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2020-04-10 07:49:23 +08:00
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ops = of_device_get_match_data(&pdev->dev);
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if (!ops)
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return -ENODEV;
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2017-06-29 04:14:00 +08:00
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bridge = devm_pci_alloc_host_bridge(dev, 0);
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if (!bridge)
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return -ENOMEM;
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2016-03-12 05:35:55 +08:00
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of_pci_check_probe_only();
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/* Parse and map our Configuration Space windows */
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2020-05-23 07:48:20 +08:00
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cfg = gen_pci_init(dev, bridge, ops);
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2016-05-12 06:34:46 +08:00
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if (IS_ERR(cfg))
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return PTR_ERR(cfg);
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2016-03-12 05:35:55 +08:00
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/* Do not reassign resources if probe only */
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if (!pci_has_flag(PCI_PROBE_ONLY))
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PCI: Remove PCI_REASSIGN_ALL_RSRC use on arm and arm64
On arm, PCI_REASSIGN_ALL_RSRC is used only in pcibios_assign_all_busses(),
which helps decide whether to reconfigure bridge bus numbers. It has
nothing to do with BAR assignments. On arm64 and powerpc,
pcibios_assign_all_busses() tests PCI_REASSIGN_ALL_BUS, which makes more
sense.
Align arm with arm64 and powerpc, so they all use PCI_REASSIGN_ALL_BUS for
pcibios_assign_all_busses().
Remove PCI_REASSIGN_ALL_RSRC from the generic, Tegra, Versatile, and
R-Car drivers. These drivers are used only on arm or arm64, where
PCI_REASSIGN_ALL_RSRC is not used after this change, so removing it
should have no effect.
No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
Reviewed-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2017-12-01 01:21:57 +08:00
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pci_add_flags(PCI_REASSIGN_ALL_BUS);
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2016-03-12 05:35:55 +08:00
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2017-06-29 04:14:00 +08:00
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bridge->sysdata = cfg;
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2020-04-10 07:49:21 +08:00
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bridge->ops = (struct pci_ops *)&ops->pci_ops;
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2017-06-29 04:14:00 +08:00
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2020-05-23 07:48:20 +08:00
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platform_set_drvdata(pdev, bridge);
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2016-03-12 05:35:55 +08:00
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2020-05-23 07:48:20 +08:00
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return pci_host_probe(bridge);
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2018-05-15 17:07:06 +08:00
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}
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2020-04-10 07:49:22 +08:00
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EXPORT_SYMBOL_GPL(pci_host_common_probe);
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2018-05-15 17:07:06 +08:00
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int pci_host_common_remove(struct platform_device *pdev)
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{
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2020-05-23 07:48:20 +08:00
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struct pci_host_bridge *bridge = platform_get_drvdata(pdev);
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2018-05-15 17:07:06 +08:00
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pci_lock_rescan_remove();
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2020-05-23 07:48:20 +08:00
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pci_stop_root_bus(bridge->bus);
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pci_remove_root_bus(bridge->bus);
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2018-05-15 17:07:06 +08:00
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pci_unlock_rescan_remove();
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2016-03-12 05:35:55 +08:00
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return 0;
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}
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2020-04-10 07:49:22 +08:00
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EXPORT_SYMBOL_GPL(pci_host_common_remove);
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MODULE_LICENSE("GPL v2");
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