2012-01-27 00:22:02 +08:00
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/*
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* arch/arm/mach-tegra/sleep.S
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*
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* Copyright (c) 2010-2011, NVIDIA Corporation.
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* Copyright (c) 2011, Google, Inc.
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*
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* Author: Colin Cross <ccross@android.com>
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* Gary King <gking@nvidia.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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#include <linux/linkage.h>
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2012-03-19 23:55:12 +08:00
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#include <asm/assembler.h>
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2012-10-31 17:41:17 +08:00
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#include <asm/cp15.h>
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2012-03-19 23:55:12 +08:00
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2012-10-05 04:24:09 +08:00
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#include "iomap.h"
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2012-01-27 00:22:02 +08:00
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#include "flowctrl.h"
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2012-08-16 17:31:50 +08:00
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#include "sleep.h"
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2012-01-27 00:22:02 +08:00
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2012-10-31 17:41:17 +08:00
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#ifdef CONFIG_PM_SLEEP
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/*
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* tegra_disable_clean_inv_dcache
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*
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* disable, clean & invalidate the D-cache
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*
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* Corrupted registers: r1-r3, r6, r8, r9-r11
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*/
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ENTRY(tegra_disable_clean_inv_dcache)
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stmfd sp!, {r0, r4-r5, r7, r9-r11, lr}
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dmb @ ensure ordering
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/* Disable the D-cache */
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mrc p15, 0, r2, c1, c0, 0
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bic r2, r2, #CR_C
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mcr p15, 0, r2, c1, c0, 0
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isb
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/* Flush the D-cache */
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bl v7_flush_dcache_louis
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/* Trun off coherency */
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exit_smp r4, r5
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ldmfd sp!, {r0, r4-r5, r7, r9-r11, pc}
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ENDPROC(tegra_disable_clean_inv_dcache)
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#endif
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