2006-08-30 06:12:40 +08:00
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/*
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* ata_generic.c - Generic PATA/SATA controller driver.
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2008-10-27 23:09:10 +08:00
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* Copyright 2005 Red Hat Inc, all rights reserved.
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2006-08-30 06:12:40 +08:00
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*
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2006-08-31 12:03:49 +08:00
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* Elements from ide/pci/generic.c
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2006-08-30 06:12:40 +08:00
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* Copyright (C) 2001-2002 Andre Hedrick <andre@linux-ide.org>
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* Portions (C) Copyright 2002 Red Hat Inc <alan@redhat.com>
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*
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* May be copied or modified under the terms of the GNU General Public License
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2006-08-31 12:03:49 +08:00
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*
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2006-08-30 06:12:40 +08:00
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* Driver for PCI IDE interfaces implementing the standard bus mastering
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* interface functionality. This assumes the BIOS did the drive set up and
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* tuning for us. By default we do not grab all IDE class devices as they
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* may have other drivers or need fixups to avoid problems. Instead we keep
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* a default list of stuff without documentation/driver that appears to
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2006-08-31 12:03:49 +08:00
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* work.
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2006-08-30 06:12:40 +08:00
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <linux/blkdev.h>
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#include <linux/delay.h>
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#include <scsi/scsi_host.h>
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#include <linux/libata.h>
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#define DRV_NAME "ata_generic"
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2008-01-20 00:07:58 +08:00
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#define DRV_VERSION "0.2.15"
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2006-08-30 06:12:40 +08:00
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/*
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* A generic parallel ATA driver using libata
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*/
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2010-06-22 18:27:26 +08:00
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enum {
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ATA_GEN_CLASS_MATCH = (1 << 0),
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ATA_GEN_FORCE_DMA = (1 << 1),
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2010-09-28 20:19:38 +08:00
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ATA_GEN_INTEL_IDER = (1 << 2),
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2010-06-22 18:27:26 +08:00
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};
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2006-08-30 06:12:40 +08:00
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/**
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* generic_set_mode - mode setting
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2007-08-06 17:36:23 +08:00
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* @link: link to set up
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2007-01-24 19:47:07 +08:00
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* @unused: returned device on error
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2006-08-30 06:12:40 +08:00
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*
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* Use a non standard set_mode function. We don't want to be tuned.
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* The BIOS configured everything. Our job is not to fiddle. We
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* read the dma enabled bits from the PCI configuration of the device
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2006-08-31 12:03:49 +08:00
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* and respect them.
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2006-08-30 06:12:40 +08:00
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*/
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2006-08-31 12:03:49 +08:00
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2007-08-06 17:36:23 +08:00
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static int generic_set_mode(struct ata_link *link, struct ata_device **unused)
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2006-08-30 06:12:40 +08:00
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{
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2007-08-06 17:36:23 +08:00
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struct ata_port *ap = link->ap;
|
2010-06-22 18:27:26 +08:00
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const struct pci_device_id *id = ap->host->private_data;
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2006-08-30 06:12:40 +08:00
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int dma_enabled = 0;
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2007-08-06 17:36:23 +08:00
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struct ata_device *dev;
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2006-08-30 06:12:40 +08:00
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2010-06-22 18:27:26 +08:00
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if (id->driver_data & ATA_GEN_FORCE_DMA) {
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dma_enabled = 0xff;
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} else if (ap->ioaddr.bmdma_addr) {
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/* Bits 5 and 6 indicate if DMA is active on master/slave */
|
2007-07-03 22:11:30 +08:00
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dma_enabled = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
|
2010-06-22 18:27:26 +08:00
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}
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2006-08-31 12:03:49 +08:00
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2008-11-03 19:03:17 +08:00
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ata_for_each_dev(dev, link, ENABLED) {
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2007-11-27 18:43:38 +08:00
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/* We don't really care */
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dev->pio_mode = XFER_PIO_0;
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dev->dma_mode = XFER_MW_DMA_0;
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/* We do need the right mode information for DMA or PIO
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and this comes from the current configuration flags */
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if (dma_enabled & (1 << (5 + dev->devno))) {
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2007-11-27 18:43:41 +08:00
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unsigned int xfer_mask = ata_id_xfermask(dev->id);
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const char *name;
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if (xfer_mask & (ATA_MASK_MWDMA | ATA_MASK_UDMA))
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name = ata_mode_string(xfer_mask);
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else {
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/* SWDMA perhaps? */
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name = "DMA";
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xfer_mask |= ata_xfer_mode2mask(XFER_MW_DMA_0);
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}
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ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
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name);
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dev->xfer_mode = ata_xfer_mask2mode(xfer_mask);
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dev->xfer_shift = ata_xfer_mode2shift(dev->xfer_mode);
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2007-11-27 18:43:38 +08:00
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dev->flags &= ~ATA_DFLAG_PIO;
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} else {
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ata_dev_printk(dev, KERN_INFO, "configured for PIO\n");
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dev->xfer_mode = XFER_PIO_0;
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dev->xfer_shift = ATA_SHIFT_PIO;
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dev->flags |= ATA_DFLAG_PIO;
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2006-08-30 06:12:40 +08:00
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}
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}
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2007-01-24 19:47:07 +08:00
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return 0;
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2006-08-30 06:12:40 +08:00
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}
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static struct scsi_host_template generic_sht = {
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2008-03-25 11:22:49 +08:00
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ATA_BMDMA_SHT(DRV_NAME),
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2006-08-30 06:12:40 +08:00
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};
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static struct ata_port_operations generic_port_ops = {
|
libata: implement and use ops inheritance
libata lets low level drivers build ata_port_operations table and
register it with libata core layer. This allows low level drivers
high level of flexibility but also burdens them with lots of
boilerplate entries.
This becomes worse for drivers which support related similar
controllers which differ slightly. They share most of the operations
except for a few. However, the driver still needs to list all
operations for each variant. This results in large number of
duplicate entries, which is not only inefficient but also error-prone
as it becomes very difficult to tell what the actual differences are.
This duplicate boilerplates all over the low level drivers also make
updating the core layer exteremely difficult and error-prone. When
compounded with multi-branched development model, it ends up
accumulating inconsistencies over time. Some of those inconsistencies
cause immediate problems and fixed. Others just remain there dormant
making maintenance increasingly difficult.
To rectify the problem, this patch implements ata_port_operations
inheritance. To allow LLDs to easily re-use their own ops tables
overriding only specific methods, this patch implements poor man's
class inheritance. An ops table has ->inherits field which can be set
to any ops table as long as it doesn't create a loop. When the host
is started, the inheritance chain is followed and any operation which
isn't specified is taken from the nearest ancestor which has it
specified. This operation is called finalization and done only once
per an ops table and the LLD doesn't have to do anything special about
it other than making the ops table non-const such that libata can
update it.
libata provides four base ops tables lower drivers can inherit from -
base, sata, pmp, sff and bmdma. To avoid overriding these ops
accidentaly, these ops are declared const and LLDs should always
inherit these instead of using them directly.
After finalization, all the ops table are identical before and after
the patch except for setting .irq_handler to ata_interrupt in drivers
which didn't use to. The .irq_handler doesn't have any actual effect
and the field will soon be removed by later patch.
* sata_sx4 is still using old style EH and currently doesn't take
advantage of ops inheritance.
Signed-off-by: Tejun Heo <htejun@gmail.com>
2008-03-25 11:22:49 +08:00
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.inherits = &ata_bmdma_port_ops,
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2007-04-11 07:04:20 +08:00
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.cable_detect = ata_cable_unknown,
|
libata: implement and use ops inheritance
libata lets low level drivers build ata_port_operations table and
register it with libata core layer. This allows low level drivers
high level of flexibility but also burdens them with lots of
boilerplate entries.
This becomes worse for drivers which support related similar
controllers which differ slightly. They share most of the operations
except for a few. However, the driver still needs to list all
operations for each variant. This results in large number of
duplicate entries, which is not only inefficient but also error-prone
as it becomes very difficult to tell what the actual differences are.
This duplicate boilerplates all over the low level drivers also make
updating the core layer exteremely difficult and error-prone. When
compounded with multi-branched development model, it ends up
accumulating inconsistencies over time. Some of those inconsistencies
cause immediate problems and fixed. Others just remain there dormant
making maintenance increasingly difficult.
To rectify the problem, this patch implements ata_port_operations
inheritance. To allow LLDs to easily re-use their own ops tables
overriding only specific methods, this patch implements poor man's
class inheritance. An ops table has ->inherits field which can be set
to any ops table as long as it doesn't create a loop. When the host
is started, the inheritance chain is followed and any operation which
isn't specified is taken from the nearest ancestor which has it
specified. This operation is called finalization and done only once
per an ops table and the LLD doesn't have to do anything special about
it other than making the ops table non-const such that libata can
update it.
libata provides four base ops tables lower drivers can inherit from -
base, sata, pmp, sff and bmdma. To avoid overriding these ops
accidentaly, these ops are declared const and LLDs should always
inherit these instead of using them directly.
After finalization, all the ops table are identical before and after
the patch except for setting .irq_handler to ata_interrupt in drivers
which didn't use to. The .irq_handler doesn't have any actual effect
and the field will soon be removed by later patch.
* sata_sx4 is still using old style EH and currently doesn't take
advantage of ops inheritance.
Signed-off-by: Tejun Heo <htejun@gmail.com>
2008-03-25 11:22:49 +08:00
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.set_mode = generic_set_mode,
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2006-08-31 12:03:49 +08:00
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};
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2006-08-30 06:12:40 +08:00
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static int all_generic_ide; /* Set to claim all devices */
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2010-09-28 20:19:38 +08:00
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/**
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* is_intel_ider - identify intel IDE-R devices
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* @dev: PCI device
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*
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* Distinguish Intel IDE-R controller devices from other Intel IDE
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* devices. IDE-R devices have no timing registers and are in
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* most respects virtual. They should be driven by the ata_generic
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* driver.
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*
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* IDE-R devices have PCI offset 0xF8.L as zero, later Intel ATA has
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* it non zero. All Intel ATA has 0x40 writable (timing), but it is
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* not writable on IDE-R devices (this is guaranteed).
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*/
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static int is_intel_ider(struct pci_dev *dev)
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{
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/* For Intel IDE the value at 0xF8 is only zero on IDE-R
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interfaces */
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u32 r;
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u16 t;
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/* Check the manufacturing ID, it will be zero for IDE-R */
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pci_read_config_dword(dev, 0xF8, &r);
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/* Not IDE-R: punt so that ata_(old)piix gets it */
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if (r != 0)
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return 0;
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/* 0xF8 will also be zero on some early Intel IDE devices
|
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but they will have a sane timing register */
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pci_read_config_word(dev, 0x40, &t);
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if (t != 0)
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return 0;
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/* Finally check if the timing register is writable so that
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we eliminate any early devices hot-docked in a docking
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station */
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pci_write_config_word(dev, 0x40, 1);
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pci_read_config_word(dev, 0x40, &t);
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if (t) {
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pci_write_config_word(dev, 0x40, 0);
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|
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return 0;
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}
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return 1;
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}
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|
2006-08-30 06:12:40 +08:00
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|
|
/**
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* ata_generic_init - attach generic IDE
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* @dev: PCI device found
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* @id: match entry
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*
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* Called each time a matching IDE interface is found. We check if the
|
2006-08-31 12:03:49 +08:00
|
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* interface is one we wish to claim and if so we perform any chip
|
2006-08-30 06:12:40 +08:00
|
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* specific hacks then let the ATA layer do the heavy lifting.
|
|
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*/
|
2006-08-31 12:03:49 +08:00
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|
2006-08-30 06:12:40 +08:00
|
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static int ata_generic_init_one(struct pci_dev *dev, const struct pci_device_id *id)
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|
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{
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u16 command;
|
2007-05-04 18:43:58 +08:00
|
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|
static const struct ata_port_info info = {
|
2007-05-28 18:59:48 +08:00
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.flags = ATA_FLAG_SLAVE_POSS,
|
2009-03-15 04:38:24 +08:00
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.pio_mask = ATA_PIO4,
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.mwdma_mask = ATA_MWDMA2,
|
2007-07-10 00:16:50 +08:00
|
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.udma_mask = ATA_UDMA5,
|
2006-08-30 06:12:40 +08:00
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.port_ops = &generic_port_ops
|
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|
};
|
2007-05-04 18:43:58 +08:00
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const struct ata_port_info *ppi[] = { &info, NULL };
|
2006-08-31 12:03:49 +08:00
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|
2006-08-30 06:12:40 +08:00
|
|
|
/* Don't use the generic entry unless instructed to do so */
|
2010-06-22 18:27:26 +08:00
|
|
|
if ((id->driver_data & ATA_GEN_CLASS_MATCH) && all_generic_ide == 0)
|
2006-08-30 06:12:40 +08:00
|
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|
return -ENODEV;
|
|
|
|
|
2010-09-28 20:19:38 +08:00
|
|
|
if (id->driver_data & ATA_GEN_INTEL_IDER)
|
|
|
|
if (!is_intel_ider(dev))
|
|
|
|
return -ENODEV;
|
|
|
|
|
2006-08-30 06:12:40 +08:00
|
|
|
/* Devices that need care */
|
|
|
|
if (dev->vendor == PCI_VENDOR_ID_UMC &&
|
|
|
|
dev->device == PCI_DEVICE_ID_UMC_UM8886A &&
|
|
|
|
(!(PCI_FUNC(dev->devfn) & 1)))
|
|
|
|
return -ENODEV;
|
|
|
|
|
|
|
|
if (dev->vendor == PCI_VENDOR_ID_OPTI &&
|
|
|
|
dev->device == PCI_DEVICE_ID_OPTI_82C558 &&
|
|
|
|
(!(PCI_FUNC(dev->devfn) & 1)))
|
|
|
|
return -ENODEV;
|
|
|
|
|
|
|
|
/* Don't re-enable devices in generic mode or we will break some
|
|
|
|
motherboards with disabled and unused IDE controllers */
|
|
|
|
pci_read_config_word(dev, PCI_COMMAND, &command);
|
|
|
|
if (!(command & PCI_COMMAND_IO))
|
|
|
|
return -ENODEV;
|
2006-08-31 12:03:49 +08:00
|
|
|
|
2006-08-30 06:12:40 +08:00
|
|
|
if (dev->vendor == PCI_VENDOR_ID_AL)
|
2008-04-07 21:47:16 +08:00
|
|
|
ata_pci_bmdma_clear_simplex(dev);
|
2006-08-30 06:12:40 +08:00
|
|
|
|
2008-05-03 06:13:39 +08:00
|
|
|
if (dev->vendor == PCI_VENDOR_ID_ATI) {
|
|
|
|
int rc = pcim_enable_device(dev);
|
|
|
|
if (rc < 0)
|
|
|
|
return rc;
|
|
|
|
pcim_pin_device(dev);
|
|
|
|
}
|
2010-06-22 18:27:26 +08:00
|
|
|
return ata_pci_bmdma_init_one(dev, ppi, &generic_sht, (void *)id, 0);
|
2006-08-30 06:12:40 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static struct pci_device_id ata_generic[] = {
|
|
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_PCTECH, PCI_DEVICE_ID_PCTECH_SAMURAI_IDE), },
|
|
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_HOLTEK, PCI_DEVICE_ID_HOLTEK_6565), },
|
2006-08-31 12:03:49 +08:00
|
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_UMC, PCI_DEVICE_ID_UMC_UM8673F), },
|
2006-08-30 06:12:40 +08:00
|
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_UMC, PCI_DEVICE_ID_UMC_UM8886A), },
|
|
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_UMC, PCI_DEVICE_ID_UMC_UM8886BF), },
|
|
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_HINT, PCI_DEVICE_ID_HINT_VXPROII_IDE), },
|
|
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C561), },
|
|
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_OPTI, PCI_DEVICE_ID_OPTI_82C558), },
|
2010-06-22 18:27:26 +08:00
|
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_CENATEK,PCI_DEVICE_ID_CENATEK_IDE),
|
|
|
|
.driver_data = ATA_GEN_FORCE_DMA },
|
2010-06-17 17:42:22 +08:00
|
|
|
/*
|
|
|
|
* For some reason, MCP89 on MacBook 7,1 doesn't work with
|
|
|
|
* ahci, use ata_generic instead.
|
|
|
|
*/
|
|
|
|
{ PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP89_SATA,
|
2010-06-22 18:27:26 +08:00
|
|
|
PCI_VENDOR_ID_APPLE, 0xcb89,
|
|
|
|
.driver_data = ATA_GEN_FORCE_DMA },
|
2009-11-30 21:23:11 +08:00
|
|
|
#if !defined(CONFIG_PATA_TOSHIBA) && !defined(CONFIG_PATA_TOSHIBA_MODULE)
|
2006-08-30 06:12:40 +08:00
|
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_1), },
|
|
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_2), },
|
2009-11-30 21:23:11 +08:00
|
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_3), },
|
|
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_5), },
|
2010-09-28 20:19:38 +08:00
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|
|
#endif
|
|
|
|
/* Intel, IDE class device */
|
|
|
|
{ PCI_VENDOR_ID_INTEL, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
|
|
|
|
PCI_CLASS_STORAGE_IDE << 8, 0xFFFFFF00UL,
|
|
|
|
.driver_data = ATA_GEN_INTEL_IDER },
|
2006-08-30 06:12:40 +08:00
|
|
|
/* Must come last. If you add entries adjust this table appropriately */
|
2010-06-22 18:27:26 +08:00
|
|
|
{ PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_IDE << 8, 0xFFFFFF00UL),
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|
|
|
.driver_data = ATA_GEN_CLASS_MATCH },
|
2006-08-30 06:12:40 +08:00
|
|
|
{ 0, },
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct pci_driver ata_generic_pci_driver = {
|
|
|
|
.name = DRV_NAME,
|
|
|
|
.id_table = ata_generic,
|
|
|
|
.probe = ata_generic_init_one,
|
2006-11-23 00:57:36 +08:00
|
|
|
.remove = ata_pci_remove_one,
|
2007-03-02 16:31:26 +08:00
|
|
|
#ifdef CONFIG_PM
|
2006-11-23 00:57:36 +08:00
|
|
|
.suspend = ata_pci_device_suspend,
|
|
|
|
.resume = ata_pci_device_resume,
|
2007-03-02 16:31:26 +08:00
|
|
|
#endif
|
2006-08-30 06:12:40 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
static int __init ata_generic_init(void)
|
|
|
|
{
|
2006-10-11 05:28:12 +08:00
|
|
|
return pci_register_driver(&ata_generic_pci_driver);
|
2006-08-30 06:12:40 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static void __exit ata_generic_exit(void)
|
|
|
|
{
|
|
|
|
pci_unregister_driver(&ata_generic_pci_driver);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
MODULE_AUTHOR("Alan Cox");
|
|
|
|
MODULE_DESCRIPTION("low-level driver for generic ATA");
|
|
|
|
MODULE_LICENSE("GPL");
|
|
|
|
MODULE_DEVICE_TABLE(pci, ata_generic);
|
|
|
|
MODULE_VERSION(DRV_VERSION);
|
|
|
|
|
|
|
|
module_init(ata_generic_init);
|
|
|
|
module_exit(ata_generic_exit);
|
|
|
|
|
|
|
|
module_param(all_generic_ide, int, 0);
|