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OpenCloudOS-Kernel/sound/soc/codecs/es8316.h

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treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-04 16:11:33 +08:00
/* SPDX-License-Identifier: GPL-2.0-only */
ASoC: add es8316 codec driver Add a codec driver for the Everest ES8316, based on code provided by David Yang from Everest Semi. I limited the functionality to items where the vendor code was clear, and things that can be tested on the Weibu F3C (Intel Cherry Trail). As a result the initial implementation only supports running in slave mode at single speed (up to 48kHz sample rate) using I2S. HPD is not supported. Signed-off-by: David Yang <yangxiaohua@everest-semi.com> [drake@endlessm.com: significant cleanups and simplifications, remove dead/unclear code] Signed-off-by: Daniel Drake <drake@endlessm.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-06-13 01:01:45 +08:00
/*
* Copyright Everest Semiconductor Co.,Ltd
*
* Author: David Yang <yangxiaohua@everest-semi.com>
*/
#ifndef _ES8316_H
#define _ES8316_H
/*
* ES8316 register space
*/
/* Reset Control */
#define ES8316_RESET 0x00
/* Clock Management */
#define ES8316_CLKMGR_CLKSW 0x01
#define ES8316_CLKMGR_CLKSEL 0x02
#define ES8316_CLKMGR_ADCOSR 0x03
#define ES8316_CLKMGR_ADCDIV1 0x04
#define ES8316_CLKMGR_ADCDIV2 0x05
#define ES8316_CLKMGR_DACDIV1 0x06
#define ES8316_CLKMGR_DACDIV2 0x07
#define ES8316_CLKMGR_CPDIV 0x08
/* Serial Data Port Control */
#define ES8316_SERDATA1 0x09
#define ES8316_SERDATA_ADC 0x0a
#define ES8316_SERDATA_DAC 0x0b
/* System Control */
#define ES8316_SYS_VMIDSEL 0x0c
#define ES8316_SYS_PDN 0x0d
#define ES8316_SYS_LP1 0x0e
#define ES8316_SYS_LP2 0x0f
#define ES8316_SYS_VMIDLOW 0x10
#define ES8316_SYS_VSEL 0x11
#define ES8316_SYS_REF 0x12
/* Headphone Mixer */
#define ES8316_HPMIX_SEL 0x13
#define ES8316_HPMIX_SWITCH 0x14
#define ES8316_HPMIX_PDN 0x15
#define ES8316_HPMIX_VOL 0x16
/* Charge Pump Headphone driver */
#define ES8316_CPHP_OUTEN 0x17
#define ES8316_CPHP_ICAL_VOL 0x18
#define ES8316_CPHP_PDN1 0x19
#define ES8316_CPHP_PDN2 0x1a
#define ES8316_CPHP_LDOCTL 0x1b
/* Calibration */
#define ES8316_CAL_TYPE 0x1c
#define ES8316_CAL_SET 0x1d
#define ES8316_CAL_HPLIV 0x1e
#define ES8316_CAL_HPRIV 0x1f
#define ES8316_CAL_HPLMV 0x20
#define ES8316_CAL_HPRMV 0x21
/* ADC Control */
#define ES8316_ADC_PDN_LINSEL 0x22
#define ES8316_ADC_PGAGAIN 0x23
#define ES8316_ADC_D2SEPGA 0x24
#define ES8316_ADC_DMIC 0x25
#define ES8316_ADC_MUTE 0x26
#define ES8316_ADC_VOLUME 0x27
#define ES8316_ADC_ALC1 0x29
#define ES8316_ADC_ALC2 0x2a
#define ES8316_ADC_ALC3 0x2b
#define ES8316_ADC_ALC4 0x2c
#define ES8316_ADC_ALC5 0x2d
#define ES8316_ADC_ALC_NG 0x2e
/* DAC Control */
#define ES8316_DAC_PDN 0x2f
#define ES8316_DAC_SET1 0x30
#define ES8316_DAC_SET2 0x31
#define ES8316_DAC_SET3 0x32
#define ES8316_DAC_VOLL 0x33
#define ES8316_DAC_VOLR 0x34
/* GPIO */
#define ES8316_GPIO_SEL 0x4d
#define ES8316_GPIO_DEBOUNCE 0x4e
#define ES8316_GPIO_FLAG 0x4f
/* Test mode */
#define ES8316_TESTMODE 0x50
#define ES8316_TEST1 0x51
#define ES8316_TEST2 0x52
#define ES8316_TEST3 0x53
/*
* Field definitions
*/
/* ES8316_RESET */
#define ES8316_RESET_CSM_ON 0x80
/* ES8316_CLKMGR_CLKSW */
#define ES8316_CLKMGR_CLKSW_MCLK_ON 0x40
#define ES8316_CLKMGR_CLKSW_BCLK_ON 0x20
/* ES8316_SERDATA1 */
#define ES8316_SERDATA1_MASTER 0x80
#define ES8316_SERDATA1_BCLK_INV 0x20
/* ES8316_SERDATA_ADC and _DAC */
#define ES8316_SERDATA2_FMT_MASK 0x3
#define ES8316_SERDATA2_FMT_I2S 0x00
#define ES8316_SERDATA2_FMT_LEFTJ 0x01
#define ES8316_SERDATA2_FMT_RIGHTJ 0x02
#define ES8316_SERDATA2_FMT_PCM 0x03
#define ES8316_SERDATA2_ADCLRP 0x20
#define ES8316_SERDATA2_LEN_MASK 0x1c
#define ES8316_SERDATA2_LEN_24 0x00
#define ES8316_SERDATA2_LEN_20 0x04
#define ES8316_SERDATA2_LEN_18 0x08
#define ES8316_SERDATA2_LEN_16 0x0c
#define ES8316_SERDATA2_LEN_32 0x10
ASoC: es8316: Add jack-detect support Adding jack-detect support may seem weird for a codec with only a single output, but it is necessary. The ES8316 appnote showing the intended usage uses a jack-receptacle which physically disconnects the speakers from the output when a jack is plugged in. But all 3 devices using the es8316 which I have (2 Cherry Trail devices and one Bay Trail CR device), use an analog mux to disconnect the speakers, driven by a GPIO. In order to enable/disable the speakers at the right time, we need jack-detect. The same goes for the microphone where we must correctly set the mux for the single ADC to either the internal or the headset microphone. All devices I have support the es8316's builtin jack-detect functionality. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2019-01-03 21:45:26 +08:00
/* ES8316_GPIO_DEBOUNCE */
#define ES8316_GPIO_ENABLE_INTERRUPT 0x02
/* ES8316_GPIO_FLAG */
#define ES8316_GPIO_FLAG_GM_NOT_SHORTED 0x02
#define ES8316_GPIO_FLAG_HP_NOT_INSERTED 0x04
ASoC: add es8316 codec driver Add a codec driver for the Everest ES8316, based on code provided by David Yang from Everest Semi. I limited the functionality to items where the vendor code was clear, and things that can be tested on the Weibu F3C (Intel Cherry Trail). As a result the initial implementation only supports running in slave mode at single speed (up to 48kHz sample rate) using I2S. HPD is not supported. Signed-off-by: David Yang <yangxiaohua@everest-semi.com> [drake@endlessm.com: significant cleanups and simplifications, remove dead/unclear code] Signed-off-by: Daniel Drake <drake@endlessm.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-06-13 01:01:45 +08:00
#endif