138 lines
3.2 KiB
C
138 lines
3.2 KiB
C
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Huawei HiNIC PCI Express Linux driver
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* Copyright(c) 2017 Huawei Technologies Co., Ltd
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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*/
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#ifndef HINIC_RX_H
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#define HINIC_RX_H
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/* rx cqe checksum err */
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#define HINIC_RX_CSUM_IP_CSUM_ERR BIT(0)
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#define HINIC_RX_CSUM_TCP_CSUM_ERR BIT(1)
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#define HINIC_RX_CSUM_UDP_CSUM_ERR BIT(2)
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#define HINIC_RX_CSUM_IGMP_CSUM_ERR BIT(3)
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#define HINIC_RX_CSUM_ICMPv4_CSUM_ERR BIT(4)
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#define HINIC_RX_CSUM_ICMPv6_CSUM_ERR BIT(5)
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#define HINIC_RX_CSUM_SCTP_CRC_ERR BIT(6)
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#define HINIC_RX_CSUM_HW_CHECK_NONE BIT(7)
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#define HINIC_RX_CSUM_IPSU_OTHER_ERR BIT(8)
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#define HINIC_RX_CSUM_OFFLOAD_EN 0xFFF
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#define HINIC_RX_BP_LOWER_THD 200
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#define HINIC_RX_BP_UPPER_THD 400
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#define HINIC_SUPPORT_LRO_ADAP_QPS_MAX 16
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#define HINIC_RX_BUFFER_WRITE 16
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enum {
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HINIC_RX_STATUS_BP_EN,
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};
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struct hinic_rxq_stats {
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u64 packets;
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u64 bytes;
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u64 errors;
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u64 csum_errors;
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u64 other_errors;
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u64 unlock_bp;
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u64 dropped;
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u64 alloc_skb_err;
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#ifdef HAVE_NDO_GET_STATS64
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struct u64_stats_sync syncp;
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#else
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struct u64_stats_sync_empty syncp;
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#endif
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};
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struct hinic_rx_info {
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dma_addr_t buf_dma_addr;
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struct hinic_rq_cqe *cqe;
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dma_addr_t cqe_dma;
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struct page *page;
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u32 page_offset;
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struct hinic_rq_wqe *rq_wqe;
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};
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struct hinic_rxq {
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struct net_device *netdev;
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u16 q_id;
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u16 q_depth;
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u16 q_mask;
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u16 buf_len;
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u32 rx_buff_shift;
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u32 dma_rx_buff_size;
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struct hinic_rxq_stats rxq_stats;
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int cons_idx;
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int delta;
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u32 irq_id;
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u16 msix_entry_idx;
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struct hinic_rx_info *rx_info;
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struct hinic_irq *irq_cfg;
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u16 next_to_alloc;
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u16 next_to_update;
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struct device *dev; /* device for DMA mapping */
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u32 bp_cnt;
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unsigned long status;
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dma_addr_t cqe_start_paddr;
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void *cqe_start_vaddr;
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u64 last_moder_packets;
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u64 last_moder_bytes;
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u8 last_coalesc_timer_cfg;
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u8 last_pending_limt;
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};
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void hinic_rxq_clean_stats(struct hinic_rxq_stats *rxq_stats);
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void hinic_rxq_get_stats(struct hinic_rxq *rxq,
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struct hinic_rxq_stats *stats);
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int hinic_alloc_rxqs(struct net_device *netdev);
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void hinic_free_rxqs(struct net_device *netdev);
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void hinic_init_rss_parameters(struct net_device *netdev);
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void hinic_set_default_rss_indir(struct net_device *netdev);
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int hinic_setup_all_rx_resources(struct net_device *netdev,
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struct irq_info *msix_entires);
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void hinic_free_all_rx_resources(struct net_device *netdev);
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void hinic_rx_remove_configure(struct net_device *netdev);
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int hinic_rx_configure(struct net_device *netdev);
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int hinic_set_hw_rss_parameters(struct net_device *netdev, u8 rss_en, u8 num_tc,
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u8 *prio_tc);
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int hinic_update_hw_tc_map(struct net_device *netdev, u8 num_tc, u8 *prio_tc);
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int hinic_rx_poll(struct hinic_rxq *rxq, int budget);
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#endif
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