2019-05-29 22:12:40 +08:00
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// SPDX-License-Identifier: GPL-2.0-only
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2013-01-21 07:28:06 +08:00
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/*
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* Copyright (C) 2012 - Virtual Open Systems and Columbia University
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* Author: Christoffer Dall <c.dall@virtualopensystems.com>
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*/
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#include <linux/compiler.h>
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#include <linux/errno.h>
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#include <linux/sched.h>
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#include <linux/kvm_host.h>
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#include <linux/kvm.h>
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#include <asm/unified.h>
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#include <asm/ptrace.h>
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#include <asm/cputype.h>
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#include <asm/kvm_arm.h>
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#include <asm/kvm_coproc.h>
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2018-12-20 19:36:07 +08:00
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#include <asm/kvm_emulate.h>
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2013-01-21 07:28:06 +08:00
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2013-04-30 14:32:15 +08:00
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#include <kvm/arm_arch_timer.h>
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2013-01-21 07:28:06 +08:00
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/******************************************************************************
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2013-09-26 23:49:28 +08:00
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* Cortex-A15 and Cortex-A7 Reset Values
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2013-01-21 07:28:06 +08:00
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*/
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2013-09-26 23:49:28 +08:00
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static struct kvm_regs cortexa_regs_reset = {
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2013-01-21 07:28:06 +08:00
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.usr_regs.ARM_cpsr = SVC_MODE | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT,
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};
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/*******************************************************************************
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* Exported reset function
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*/
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/**
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* kvm_reset_vcpu - sets core registers and cp15 registers to reset value
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* @vcpu: The VCPU pointer
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*
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* This function finds the right table above and sets the registers on the
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2016-05-21 19:48:35 +08:00
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* virtual CPU struct to their architecturally defined reset values.
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2013-01-21 07:28:06 +08:00
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*/
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int kvm_reset_vcpu(struct kvm_vcpu *vcpu)
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{
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2013-09-12 06:27:41 +08:00
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struct kvm_regs *reset_regs;
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2013-01-21 07:28:06 +08:00
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switch (vcpu->arch.target) {
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2013-09-26 23:49:28 +08:00
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case KVM_ARM_TARGET_CORTEX_A7:
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2013-01-21 07:28:06 +08:00
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case KVM_ARM_TARGET_CORTEX_A15:
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2013-10-17 22:04:47 +08:00
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reset_regs = &cortexa_regs_reset;
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2013-01-21 07:28:06 +08:00
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vcpu->arch.midr = read_cpuid_id();
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break;
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default:
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return -ENODEV;
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}
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/* Reset core registers */
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2016-01-03 19:26:01 +08:00
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memcpy(&vcpu->arch.ctxt.gp_regs, reset_regs, sizeof(vcpu->arch.ctxt.gp_regs));
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2013-01-21 07:28:06 +08:00
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/* Reset CP15 registers */
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kvm_reset_coprocs(vcpu);
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2018-12-20 19:36:07 +08:00
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/*
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* Additional reset state handling that PSCI may have imposed on us.
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* Must be done after all the sys_reg reset.
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*/
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if (READ_ONCE(vcpu->arch.reset_state.reset)) {
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unsigned long target_pc = vcpu->arch.reset_state.pc;
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/* Gracefully handle Thumb2 entry point */
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if (target_pc & 1) {
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target_pc &= ~1UL;
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vcpu_set_thumb(vcpu);
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}
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/* Propagate caller endianness */
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if (vcpu->arch.reset_state.be)
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kvm_vcpu_set_be(vcpu);
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*vcpu_pc(vcpu) = target_pc;
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vcpu_set_reg(vcpu, 0, vcpu->arch.reset_state.r0);
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vcpu->arch.reset_state.reset = false;
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}
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2013-04-30 14:32:15 +08:00
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/* Reset arch_timer context */
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2017-05-03 02:14:06 +08:00
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return kvm_timer_vcpu_reset(vcpu);
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2013-01-21 07:28:06 +08:00
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}
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