2013-03-14 20:08:56 +08:00
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Freescale i.MX General Purpose Timer (GPT)
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Required properties:
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2018-12-29 17:39:34 +08:00
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- compatible : should be one of following:
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for i.MX1:
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- "fsl,imx1-gpt";
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for i.MX21:
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- "fsl,imx21-gpt";
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for i.MX27:
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- "fsl,imx27-gpt", "fsl,imx21-gpt";
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for i.MX31:
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- "fsl,imx31-gpt";
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for i.MX25:
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- "fsl,imx25-gpt", "fsl,imx31-gpt";
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for i.MX50:
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- "fsl,imx50-gpt", "fsl,imx31-gpt";
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for i.MX51:
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- "fsl,imx51-gpt", "fsl,imx31-gpt";
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for i.MX53:
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- "fsl,imx53-gpt", "fsl,imx31-gpt";
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for i.MX6Q:
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- "fsl,imx6q-gpt", "fsl,imx31-gpt";
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for i.MX6DL:
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- "fsl,imx6dl-gpt";
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for i.MX6SL:
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- "fsl,imx6sl-gpt", "fsl,imx6dl-gpt";
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for i.MX6SX:
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- "fsl,imx6sx-gpt", "fsl,imx6dl-gpt";
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- reg : specifies base physical address and size of the registers.
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- interrupts : should be the gpt interrupt.
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- clocks : the clocks provided by the SoC to drive the timer, must contain
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an entry for each entry in clock-names.
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- clock-names : must include "ipg" entry first, then "per" entry.
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2013-03-14 20:08:56 +08:00
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Example:
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gpt1: timer@10003000 {
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2018-12-29 17:39:34 +08:00
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compatible = "fsl,imx27-gpt", "fsl,imx21-gpt";
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2013-03-14 20:08:56 +08:00
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reg = <0x10003000 0x1000>;
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interrupts = <26>;
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2018-12-29 17:39:34 +08:00
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clocks = <&clks IMX27_CLK_GPT1_IPG_GATE>,
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<&clks IMX27_CLK_PER1_GATE>;
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2013-03-14 20:08:56 +08:00
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clock-names = "ipg", "per";
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};
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