298 lines
8.8 KiB
C
298 lines
8.8 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __LINUX_PHYTIUM_HW_REGS
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#define __LINUX_PHYTIUM_HW_REGS
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#define USBIEN 0x198
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#define USBIEN_SUDAVIE BIT(0)
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#define USBIEN_SOFIE BIT(1)
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#define USBIEN_SUTOKIE BIT(2)
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#define USBIEN_SUSPIE BIT(3)
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#define USBIEN_URESIE BIT(4)
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#define USBIEN_HSPEEDIE BIT(5)
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#define USBIEN_LPMIE BIT(7)
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#define USBCS 0x1a3
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#define USBCS_LSMODE BIT(0)
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#define USBCS_LPMNYET BIT(1)
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#define USBCS_SIGSUME BIT(5)
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#define USBCS_DISCON BIT(6)
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#define USBCS_WAKESRC BIT(7)
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#define USBIR_SOF BIT(1)
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#define USBIR_SUSP BIT(3)
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#define USBIR_URES BIT(4)
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#define USBIR_HSPEED BIT(5)
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#define USBIR_SUDAV BIT(0)
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#define USBIR_SUTOK BIT(2)
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#define USBIR_LPMIR BIT(7)
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#define OTGIRQ_IDLEIRQ BIT(0)
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#define OTGIRQ_SRPDETIRQ BIT(1)
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#define OTGIRQ_CONIRQ BIT(2)
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#define OTGIRQ_LOCSOFIRQ BIT(2)
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#define OTGIRQ_VBUSERRIRQ BIT(3)
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#define OTGIRQ_PERIPHIRQ BIT(4)
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#define OTGIRQ_IDCHANGEIRQ BIT(5)
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#define OTGIRQ_HOSTDISCON BIT(6)
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#define OTGIRQ_BSE0SRPIRQ BIT(7)
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#define OTGCTRL_BUSREQ BIT(0)
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#define OTGCTRL_ABUSDROP BIT(1)
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#define OTGCTRL_ASETBHNPEN BIT(2)
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#define OTGCTRL_BHNPEN BIT(3)
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#define OTGCTRL_SRPVBUSDETEN BIT(4)
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#define OTGCTRL_SRPDATDETEN BIT(5)
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#define OTGCTRL_FORCEBCONN BIT(7)
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#define OTGSTATUS_ID BIT(6)
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#define ENDPRST_EP 0x0f
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#define ENDPRST_IO_TX BIT(4)
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#define ENDPRST_TOGRST BIT(5)
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#define ENDPRST_FIFORST BIT(6)
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#define ENDPRST_TOGSETQ BIT(7)
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#define FIFOCTRL_EP 0x0f
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#define FIFOCTRL_IO_TX BIT(4)
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#define FIFOCTRL_FIFOAUTO BIT(5)
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#define SPEEDCTRL_LS BIT(0)
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#define SPEEDCTRL_FS BIT(1)
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#define SPEEDCTRL_HS BIT(2)
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#define SPEEDCTRL_HSDISABLE BIT(7)
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#define CON_TYPE_CONTROL 0x00
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#define CON_TYPE_ISOC 0x04
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#define CON_TYPE_BULK 0x08
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#define CON_TYPE_INT 0x0C
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#define CON_TYPE_ISOC_1_ISOD 0x00
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#define CON_TYPE_ISOC_2_ISOD 0x10
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#define CON_TYPE_ISOC_3_ISOD 0x20
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#define CON_STALL 0x40
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#define CON_VAL 0x80
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#define ERR_TYPE 0x1c
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#define ERR_COUNT 0x03
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#define ERR_RESEND BIT(6)
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#define ERR_UNDERRIEN BIT(7)
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#define ERR_NONE 0
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#define ERR_CRC 1
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#define ERR_DATA_TOGGLE_MISMATCH 2
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#define ERR_STALL 3
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#define ERR_TIMEOUT 4
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#define ERR_PID 5
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#define ERR_TOO_LONG_PACKET 6
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#define ERR_DATA_UNDERRUN 7
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#define EP0CS_HCSETTOGGLE BIT(6)
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#define EP0CS_HCSET BIT(4)
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#define EP0CS_RXBUSY_MASK BIT(3)
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#define EP0CS_TXBUSY_MASK BIT(2)
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#define EP0CS_STALL BIT(0)
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#define EP0CS_HSNAK BIT(1)
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#define EP0CS_DSTALL BIT(4)
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#define EP0CS_CHGSET BIT(7)
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#define CS_ERR 0x01
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#define CS_BUSY 0x02
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#define CS_NPAK 0x0c
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#define CS_NPAK_OFFSET 0x02
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#define CS_AUTO 0x10
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#define CON_BUF_SINGLE 0x00
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#define CON_BUF_DOUBLE 0x01
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#define CON_BUF_TRIPLE 0x02
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#define CON_BUF_QUAD 0x03
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#define CON_BUF 0x03
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struct HW_REGS {
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uint8_t ep0Rxbc; /*address 0x00*/
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uint8_t ep0Txbc; /*address 0x01*/
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uint8_t ep0cs; /*address 0x02*/
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int8_t reserved0; /*address 0x03*/
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uint8_t lpmctrll; /*address 0x04*/
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uint8_t lpmctrlh; /*address 0x05*/
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uint8_t lpmclock;
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uint8_t ep0fifoctrl;
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struct ep { /*address 0x08*/
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uint16_t rxbc; //outbc (hcinbc)
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uint8_t rxcon;
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uint8_t rxcs;
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uint16_t txbc; //inbc (hcoutbc
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uint8_t txcon;
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uint8_t txcs;
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} ep[15];
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uint8_t reserved1[4];
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uint32_t fifodat[15]; /*address 0x84*/
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uint8_t ep0ctrl; /*address 0xC0*/
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uint8_t tx0err; /*address 0xC1*/
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uint8_t reserved2;
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uint8_t rx0err; /*address 0xC3*/
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struct epExt {
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uint8_t txctrl;
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uint8_t txerr;
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uint8_t rxctrl;
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uint8_t rxerr;
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} epExt[15];
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uint8_t ep0datatx[64]; /*address 0x100*/
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uint8_t ep0datarx[64]; /*address 0x140*/
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uint8_t setupdat[8]; /*address 0x180*/
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uint16_t txirq; /*address 0x188*/
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uint16_t rxirq; /*address 0x18A*/
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uint8_t usbirq; /*address 0x18C*/
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uint8_t reserved4;
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uint16_t rxpngirq; /*address 0x18E*/
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uint16_t txfullirq; /*address 0x190*/
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uint16_t rxemptirq; /*address 0x192*/
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uint16_t txien; /*address 0x194*/
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uint16_t rxien; /*address 0x196*/
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uint8_t usbien; /*address 0x198*/
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uint8_t reserved6;
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uint16_t rxpngien; /*address 0x19A*/
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uint16_t txfullien; /*address 0x19C*/
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uint16_t rxemptien; /*address 0x19E*/
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uint8_t usbivect; /*address 0x1A0*/
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uint8_t fifoivect; /*address 0x1A1*/
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uint8_t endprst; /*address 0x1A2*/
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uint8_t usbcs; /*address 0x1A3*/
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uint16_t frmnr; /*address 0x1A4*/
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uint8_t fnaddr; /*address 0x1A6*/
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uint8_t clkgate; /*address 0x1A7*/
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uint8_t fifoctrl; /*address 0x1A8*/
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uint8_t speedctrl; /*address 0x1A9*/
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uint8_t reserved8[1]; /*address 0x1AA*/
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uint8_t portctrl; /*address 0x1AB*/
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uint16_t hcfrmnr; /*address 0x1AC*/
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uint16_t hcfrmremain; /*address 0x1AE*/
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uint8_t reserved9[4]; /*address 0x1B0*/
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uint16_t rxerrirq; /*address 0x1B4*/
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uint16_t txerrirq; /*address 0x1B6*/
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uint16_t rxerrien; /*address 0x1B8*/
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uint16_t txerrien; /*address 0x1BA*/
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/*OTG extension*/
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uint8_t otgirq; /*address 0x1BC*/
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uint8_t otgstate; /*address 0x1BD*/
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uint8_t otgctrl; /*address 0x1BE*/
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uint8_t otgstatus; /*address 0x1BF*/
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uint8_t otgien; /*address 0x1C0*/
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uint8_t taaidlbdis; /*address 0x1C1*/
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uint8_t tawaitbcon; /*address 0x1C2*/
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uint8_t tbvbuspls; /*address 0x1C3*/
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uint8_t otg2ctrl; /*address 0x1C4*/
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uint8_t reserved10[2]; /*address 0x1C5*/
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uint8_t tbvbusdispls; /*address 0x1C7*/
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uint8_t traddr; /*address 0x1C8*/
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uint8_t trwdata; /*address 0x1C9*/
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uint8_t trrdata; /*address 0x1CA*/
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uint8_t trctrl; /*address 0x1CB*/
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uint16_t isoautoarm; /*address 0x1CC*/
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uint8_t adpbc1ien; /*address 0x1CE*/
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uint8_t adpbc2ien; /*address 0x1CF*/
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uint8_t adpbcctr0; /*address 0x1D0*/
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uint8_t adpbcctr1; /*address 0x1D1*/
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uint8_t adpbcctr2; /*address 0x1D2*/
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uint8_t adpbc1irq; /*address 0x1D3*/
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uint8_t adpbc0status; /*address 0x1D4*/
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uint8_t adpbc1status; /*address 0x1D5*/
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uint8_t adpbc2status; /*address 0x1D6*/
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uint8_t adpbc2irq; /*address 0x1D7*/
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uint16_t isodctrl; /*address 0x1D8*/
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uint8_t reserved11[2];
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uint16_t isoautodump; /*address 0x1DC*/
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uint8_t reserved12[2];
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uint8_t ep0maxpack; /*address 0x1E0*/
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uint8_t reserved13;
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uint16_t rxmaxpack[15]; /*address 0x1E2*/
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struct rxsoftimer { /*address 0x200 to 0x23F*/
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uint16_t timer;
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uint8_t reserved;
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uint8_t ctrl;
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} rxsoftimer[16];
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struct txsoftimer { /*address 0x240 to 0x27F*/
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uint16_t timer;
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uint8_t reserved;
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uint8_t ctrl;
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} txsoftimer[16];
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uint8_t reserved14[132];
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struct rxstaddr { /*address 0x304*/
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uint16_t addr;
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uint16_t reserved;
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} rxstaddr[15];
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uint8_t reserved15[4];
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struct txstaddr { /*address 0x344*/
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uint16_t addr;
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uint16_t reserved;
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} txstaddr[15];
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int8_t reserved16[4]; /*address 0x380*/
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struct irqmode { /*address 0x384*/
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int8_t inirqmode;
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int8_t reserved21;
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int8_t outirqmode;
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int8_t reserved22;
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} irqmode[15];
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/*The Microprocessor control*/
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uint8_t cpuctrl; /*address 0x3C0*/
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int8_t reserved17[15];
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/*The debug counters and workarounds*/
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uint8_t debug_rx_bcl; /*address 0x3D0*/
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uint8_t debug_rx_bch; /*address 0x3D1*/
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uint8_t debug_rx_status; /*address 0x3D2*/
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uint8_t debug_irq; /*address 0x3D3*/
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uint8_t debug_tx_bcl; /*address 0x3D4*/
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uint8_t debug_tx_bch; /*address 0x3D5*/
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uint8_t debug_tx_status; /*address 0x3D6*/
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uint8_t debug_ien; /*address 0x3D7*/
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uint8_t phywa_en; /*address 0x3D8*/
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/*endian*/
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uint8_t wa1_cnt; /*address 0x3D9*/
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int8_t reserved18[2]; /*address 0x3DA*/
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uint8_t endian_sfr_cs; /*address 0x3DC*/
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int8_t reserved19[2]; /*address 0x3DD*/
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uint8_t endian_sfr_s; /*address 0x3DF*/
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int8_t reserved20[2]; /*address 0x3E0*/
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uint16_t txmaxpack[15]; /*address 0x3E2*/
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};
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struct CUSTOM_REGS {
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uint32_t secure_ctrl; /*address 0x80000*/
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uint32_t secsid_atst; /*address 0x80004*/
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uint32_t nsaid_smmuid; /*address 0x80008*/
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uint32_t ace; /*address 0x8000c*/
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uint32_t wakeup; /*address 0x80010*/
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uint32_t debug; /*address 0x80014*/
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};
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struct VHUB_REGS {
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uint32_t gen_cfg; /*address 0x00*/
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uint32_t gen_st; /*address 0x04*/
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uint32_t bc_cfg; /*address 0x08*/
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uint32_t bc_st; /*address 0x0c*/
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uint32_t adp_cfg; /*address 0x10*/
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uint32_t adp_st; /*address 0x14*/
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uint32_t dbg_cfg; /*address 0x18*/
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uint32_t dbg_st; /*address 0x1c*/
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uint32_t utmip_cfg; /*address 0x20*/
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uint32_t utmip_st; /*address 0x24*/
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};
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struct DMARegs {
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uint32_t conf; /*address 0x400*/
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uint32_t sts; /*address 0x404*/
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uint32_t reserved5[5];
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uint32_t ep_sel; /*address 0x41C*/
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uint32_t traddr; /*address 0x420*/
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uint32_t ep_cfg; /*address 0x424*/
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uint32_t ep_cmd; /*address 0x428*/
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uint32_t ep_sts; /*address 0x42c*/
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uint32_t ep_sts_sid;/*address 0x430*/
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uint32_t ep_sts_en; /*address 0x434*/
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uint32_t drbl; /*address 0x438*/
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uint32_t ep_ien; /*address 0x43C*/
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uint32_t ep_ists; /*address 0x440*/
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};
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#endif
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